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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.89 97.82 96.03 93.31 97.62 98.52 99.00 95.94


Total test records in report: 1003
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T818 /workspace/coverage/default/20.lc_ctrl_prog_failure.3484676427 May 30 02:46:57 PM PDT 24 May 30 02:47:02 PM PDT 24 67220109 ps
T819 /workspace/coverage/default/37.lc_ctrl_sec_mubi.2446095060 May 30 02:47:55 PM PDT 24 May 30 02:48:10 PM PDT 24 357460090 ps
T820 /workspace/coverage/default/17.lc_ctrl_stress_all.1429053541 May 30 02:46:44 PM PDT 24 May 30 02:47:12 PM PDT 24 4720800846 ps
T821 /workspace/coverage/default/33.lc_ctrl_sec_mubi.2147992835 May 30 02:47:42 PM PDT 24 May 30 02:48:06 PM PDT 24 2803800294 ps
T822 /workspace/coverage/default/8.lc_ctrl_state_failure.2386782342 May 30 02:45:47 PM PDT 24 May 30 02:46:18 PM PDT 24 1552210810 ps
T823 /workspace/coverage/default/45.lc_ctrl_sec_token_mux.960917723 May 30 02:48:27 PM PDT 24 May 30 02:48:47 PM PDT 24 700534253 ps
T824 /workspace/coverage/default/28.lc_ctrl_jtag_access.389140891 May 30 02:47:15 PM PDT 24 May 30 02:47:19 PM PDT 24 391400777 ps
T825 /workspace/coverage/default/22.lc_ctrl_prog_failure.151439109 May 30 02:47:00 PM PDT 24 May 30 02:47:06 PM PDT 24 219299145 ps
T826 /workspace/coverage/default/1.lc_ctrl_sec_mubi.3377125341 May 30 02:44:57 PM PDT 24 May 30 02:45:15 PM PDT 24 330434508 ps
T827 /workspace/coverage/default/18.lc_ctrl_errors.2450572998 May 30 02:46:48 PM PDT 24 May 30 02:47:00 PM PDT 24 364233195 ps
T828 /workspace/coverage/default/41.lc_ctrl_prog_failure.135893457 May 30 02:48:09 PM PDT 24 May 30 02:48:15 PM PDT 24 258028801 ps
T829 /workspace/coverage/default/32.lc_ctrl_sec_mubi.2371030885 May 30 02:47:35 PM PDT 24 May 30 02:47:50 PM PDT 24 1868320764 ps
T830 /workspace/coverage/default/37.lc_ctrl_stress_all.3057666688 May 30 02:47:56 PM PDT 24 May 30 02:49:01 PM PDT 24 4141155353 ps
T831 /workspace/coverage/default/12.lc_ctrl_state_post_trans.1355644758 May 30 02:46:04 PM PDT 24 May 30 02:46:14 PM PDT 24 293921691 ps
T832 /workspace/coverage/default/12.lc_ctrl_sec_token_mux.2899832214 May 30 02:46:06 PM PDT 24 May 30 02:46:19 PM PDT 24 299346560 ps
T833 /workspace/coverage/default/42.lc_ctrl_sec_token_digest.2903201075 May 30 02:48:09 PM PDT 24 May 30 02:48:21 PM PDT 24 625849882 ps
T834 /workspace/coverage/default/27.lc_ctrl_stress_all.3216701108 May 30 02:47:10 PM PDT 24 May 30 02:48:27 PM PDT 24 20790101442 ps
T835 /workspace/coverage/default/12.lc_ctrl_jtag_smoke.2166945741 May 30 02:46:00 PM PDT 24 May 30 02:46:10 PM PDT 24 270538556 ps
T836 /workspace/coverage/default/48.lc_ctrl_sec_mubi.352361641 May 30 02:48:31 PM PDT 24 May 30 02:48:44 PM PDT 24 286149593 ps
T837 /workspace/coverage/default/9.lc_ctrl_sec_mubi.2532354079 May 30 02:45:49 PM PDT 24 May 30 02:46:04 PM PDT 24 528611597 ps
T838 /workspace/coverage/default/9.lc_ctrl_security_escalation.1794711194 May 30 02:45:49 PM PDT 24 May 30 02:45:59 PM PDT 24 278285870 ps
T839 /workspace/coverage/default/44.lc_ctrl_state_post_trans.2032485104 May 30 02:48:11 PM PDT 24 May 30 02:48:16 PM PDT 24 180043058 ps
T840 /workspace/coverage/default/41.lc_ctrl_smoke.869073557 May 30 02:48:08 PM PDT 24 May 30 02:48:13 PM PDT 24 190279936 ps
T841 /workspace/coverage/default/3.lc_ctrl_volatile_unlock_smoke.2571700406 May 30 02:45:01 PM PDT 24 May 30 02:45:04 PM PDT 24 15218171 ps
T842 /workspace/coverage/default/30.lc_ctrl_alert_test.1117804363 May 30 02:47:19 PM PDT 24 May 30 02:47:22 PM PDT 24 118002113 ps
T843 /workspace/coverage/default/5.lc_ctrl_alert_test.1434897704 May 30 02:45:17 PM PDT 24 May 30 02:45:20 PM PDT 24 22726894 ps
T844 /workspace/coverage/default/38.lc_ctrl_errors.1183511107 May 30 02:48:00 PM PDT 24 May 30 02:48:15 PM PDT 24 508818157 ps
T845 /workspace/coverage/default/41.lc_ctrl_alert_test.2979996526 May 30 02:48:06 PM PDT 24 May 30 02:48:08 PM PDT 24 17210766 ps
T846 /workspace/coverage/default/24.lc_ctrl_prog_failure.1205035322 May 30 02:47:12 PM PDT 24 May 30 02:47:16 PM PDT 24 97920506 ps
T847 /workspace/coverage/default/33.lc_ctrl_smoke.1465714778 May 30 02:47:35 PM PDT 24 May 30 02:47:41 PM PDT 24 308153500 ps
T848 /workspace/coverage/default/44.lc_ctrl_stress_all.2323193 May 30 02:48:18 PM PDT 24 May 30 02:49:40 PM PDT 24 2191511447 ps
T849 /workspace/coverage/default/7.lc_ctrl_jtag_state_post_trans.3787985560 May 30 02:45:45 PM PDT 24 May 30 02:45:57 PM PDT 24 5060656122 ps
T850 /workspace/coverage/default/40.lc_ctrl_state_post_trans.3926139199 May 30 02:47:57 PM PDT 24 May 30 02:48:03 PM PDT 24 130349223 ps
T851 /workspace/coverage/default/45.lc_ctrl_alert_test.2469488678 May 30 02:48:17 PM PDT 24 May 30 02:48:20 PM PDT 24 27012771 ps
T852 /workspace/coverage/default/15.lc_ctrl_state_failure.2145632628 May 30 02:46:13 PM PDT 24 May 30 02:46:41 PM PDT 24 259431080 ps
T853 /workspace/coverage/default/21.lc_ctrl_prog_failure.2195776884 May 30 02:46:59 PM PDT 24 May 30 02:47:04 PM PDT 24 159563500 ps
T854 /workspace/coverage/default/23.lc_ctrl_sec_mubi.3445696574 May 30 02:46:57 PM PDT 24 May 30 02:47:11 PM PDT 24 479612410 ps
T855 /workspace/coverage/default/47.lc_ctrl_sec_token_mux.3185713091 May 30 02:48:20 PM PDT 24 May 30 02:48:30 PM PDT 24 926698917 ps
T856 /workspace/coverage/default/26.lc_ctrl_volatile_unlock_smoke.4226379295 May 30 02:47:20 PM PDT 24 May 30 02:47:24 PM PDT 24 14104380 ps
T857 /workspace/coverage/default/5.lc_ctrl_jtag_priority.3519841264 May 30 02:45:22 PM PDT 24 May 30 02:45:30 PM PDT 24 526210385 ps
T858 /workspace/coverage/default/13.lc_ctrl_alert_test.275925718 May 30 02:46:13 PM PDT 24 May 30 02:46:16 PM PDT 24 43285590 ps
T859 /workspace/coverage/default/41.lc_ctrl_sec_mubi.2627150616 May 30 02:48:10 PM PDT 24 May 30 02:48:23 PM PDT 24 686847146 ps
T860 /workspace/coverage/default/15.lc_ctrl_sec_token_mux.756782263 May 30 02:46:26 PM PDT 24 May 30 02:46:40 PM PDT 24 1409982894 ps
T861 /workspace/coverage/default/0.lc_ctrl_errors.3459578394 May 30 02:44:50 PM PDT 24 May 30 02:45:03 PM PDT 24 370180044 ps
T862 /workspace/coverage/default/5.lc_ctrl_sec_token_mux.4153235311 May 30 02:45:27 PM PDT 24 May 30 02:45:37 PM PDT 24 243160061 ps
T863 /workspace/coverage/default/11.lc_ctrl_jtag_errors.2727853745 May 30 02:45:59 PM PDT 24 May 30 02:47:04 PM PDT 24 6453565926 ps
T864 /workspace/coverage/default/36.lc_ctrl_sec_mubi.2287173226 May 30 02:47:55 PM PDT 24 May 30 02:48:13 PM PDT 24 680950657 ps
T865 /workspace/coverage/default/32.lc_ctrl_state_failure.1260152110 May 30 02:47:35 PM PDT 24 May 30 02:48:14 PM PDT 24 1648765970 ps
T866 /workspace/coverage/default/31.lc_ctrl_security_escalation.4225643516 May 30 02:47:35 PM PDT 24 May 30 02:47:47 PM PDT 24 383218106 ps
T867 /workspace/coverage/default/26.lc_ctrl_prog_failure.136487352 May 30 02:47:13 PM PDT 24 May 30 02:47:17 PM PDT 24 164972577 ps
T868 /workspace/coverage/default/46.lc_ctrl_state_failure.2885506679 May 30 02:48:19 PM PDT 24 May 30 02:48:41 PM PDT 24 879504550 ps
T869 /workspace/coverage/default/20.lc_ctrl_stress_all.1090433510 May 30 02:46:57 PM PDT 24 May 30 02:50:49 PM PDT 24 60208309023 ps
T105 /workspace/coverage/default/2.lc_ctrl_sec_cm.2102623156 May 30 02:45:01 PM PDT 24 May 30 02:45:27 PM PDT 24 104985685 ps
T870 /workspace/coverage/default/22.lc_ctrl_sec_token_mux.3843817802 May 30 02:47:02 PM PDT 24 May 30 02:47:20 PM PDT 24 8348008809 ps
T871 /workspace/coverage/default/21.lc_ctrl_state_post_trans.1423697309 May 30 02:46:58 PM PDT 24 May 30 02:47:03 PM PDT 24 194589226 ps
T872 /workspace/coverage/default/29.lc_ctrl_smoke.360586983 May 30 02:47:18 PM PDT 24 May 30 02:47:23 PM PDT 24 77553346 ps
T873 /workspace/coverage/default/41.lc_ctrl_sec_token_digest.3060531119 May 30 02:48:09 PM PDT 24 May 30 02:48:28 PM PDT 24 1781211578 ps
T874 /workspace/coverage/default/0.lc_ctrl_jtag_state_failure.2706541833 May 30 02:44:52 PM PDT 24 May 30 02:45:28 PM PDT 24 3621595441 ps
T875 /workspace/coverage/default/2.lc_ctrl_sec_token_mux.873999369 May 30 02:44:57 PM PDT 24 May 30 02:45:07 PM PDT 24 3638003882 ps
T876 /workspace/coverage/default/45.lc_ctrl_sec_mubi.2215650773 May 30 02:48:18 PM PDT 24 May 30 02:48:34 PM PDT 24 1478081870 ps
T877 /workspace/coverage/default/13.lc_ctrl_sec_token_mux.277432014 May 30 02:46:15 PM PDT 24 May 30 02:46:24 PM PDT 24 224541393 ps
T878 /workspace/coverage/default/10.lc_ctrl_volatile_unlock_smoke.3830573898 May 30 02:45:59 PM PDT 24 May 30 02:46:02 PM PDT 24 125604888 ps
T879 /workspace/coverage/default/6.lc_ctrl_errors.2937040853 May 30 02:45:24 PM PDT 24 May 30 02:45:36 PM PDT 24 2178015921 ps
T880 /workspace/coverage/default/0.lc_ctrl_jtag_regwen_during_op.2647324130 May 30 02:44:54 PM PDT 24 May 30 02:45:16 PM PDT 24 5466855261 ps
T881 /workspace/coverage/default/7.lc_ctrl_smoke.156031011 May 30 02:45:43 PM PDT 24 May 30 02:45:49 PM PDT 24 98115559 ps
T882 /workspace/coverage/default/42.lc_ctrl_security_escalation.4029156040 May 30 02:48:08 PM PDT 24 May 30 02:48:22 PM PDT 24 4047669752 ps
T883 /workspace/coverage/default/21.lc_ctrl_sec_token_digest.4196731454 May 30 02:46:59 PM PDT 24 May 30 02:47:11 PM PDT 24 683408528 ps
T884 /workspace/coverage/default/16.lc_ctrl_errors.4056555827 May 30 02:46:25 PM PDT 24 May 30 02:46:47 PM PDT 24 2181920897 ps
T121 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.2291683126 May 30 02:29:51 PM PDT 24 May 30 02:29:57 PM PDT 24 1764503963 ps
T116 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.1296241425 May 30 02:30:13 PM PDT 24 May 30 02:30:15 PM PDT 24 84304434 ps
T127 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.1326458429 May 30 02:30:27 PM PDT 24 May 30 02:30:29 PM PDT 24 19739581 ps
T153 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.3508790587 May 30 02:30:35 PM PDT 24 May 30 02:30:37 PM PDT 24 16658075 ps
T206 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.3665140855 May 30 02:30:26 PM PDT 24 May 30 02:30:28 PM PDT 24 29057018 ps
T201 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.3555095109 May 30 02:30:21 PM PDT 24 May 30 02:30:23 PM PDT 24 26643829 ps
T207 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.4254704447 May 30 02:30:06 PM PDT 24 May 30 02:30:09 PM PDT 24 250873064 ps
T122 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.3178847684 May 30 02:30:38 PM PDT 24 May 30 02:30:40 PM PDT 24 23523330 ps
T150 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.1428392532 May 30 02:30:22 PM PDT 24 May 30 02:30:29 PM PDT 24 596130053 ps
T159 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.2913063840 May 30 02:30:29 PM PDT 24 May 30 02:30:31 PM PDT 24 164799257 ps
T202 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.3240963960 May 30 02:30:22 PM PDT 24 May 30 02:30:24 PM PDT 24 210446391 ps
T113 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.2680184587 May 30 02:30:28 PM PDT 24 May 30 02:30:32 PM PDT 24 159750579 ps
T114 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.606429234 May 30 02:30:33 PM PDT 24 May 30 02:30:38 PM PDT 24 227962581 ps
T151 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.4283352230 May 30 02:30:07 PM PDT 24 May 30 02:30:10 PM PDT 24 311476664 ps
T119 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2266742955 May 30 02:30:18 PM PDT 24 May 30 02:30:22 PM PDT 24 344118274 ps
T115 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.1033237623 May 30 02:30:29 PM PDT 24 May 30 02:30:32 PM PDT 24 291023442 ps
T160 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.3303700285 May 30 02:30:28 PM PDT 24 May 30 02:30:31 PM PDT 24 101089458 ps
T203 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.2643977711 May 30 02:30:21 PM PDT 24 May 30 02:30:23 PM PDT 24 79631418 ps
T149 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.3986175882 May 30 02:30:08 PM PDT 24 May 30 02:30:17 PM PDT 24 6985895449 ps
T152 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.1686678263 May 30 02:30:30 PM PDT 24 May 30 02:30:33 PM PDT 24 72391483 ps
T885 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.3129183837 May 30 02:30:18 PM PDT 24 May 30 02:30:27 PM PDT 24 558816999 ps
T886 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.3558973380 May 30 02:30:28 PM PDT 24 May 30 02:30:30 PM PDT 24 39297212 ps
T120 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1158225840 May 30 02:30:32 PM PDT 24 May 30 02:30:41 PM PDT 24 600880367 ps
T204 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.3227669424 May 30 02:30:06 PM PDT 24 May 30 02:30:08 PM PDT 24 204291741 ps
T887 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.3536310449 May 30 02:30:17 PM PDT 24 May 30 02:30:38 PM PDT 24 3152387460 ps
T118 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.2414741303 May 30 02:30:20 PM PDT 24 May 30 02:30:24 PM PDT 24 66415670 ps
T205 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.1240138413 May 30 02:30:26 PM PDT 24 May 30 02:30:28 PM PDT 24 66460711 ps
T888 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.1374220255 May 30 02:30:19 PM PDT 24 May 30 02:31:12 PM PDT 24 2475476005 ps
T130 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.3601800286 May 30 02:30:34 PM PDT 24 May 30 02:30:38 PM PDT 24 27037349 ps
T161 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.819552899 May 30 02:30:22 PM PDT 24 May 30 02:30:25 PM PDT 24 31991823 ps
T889 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1756987807 May 30 02:30:19 PM PDT 24 May 30 02:30:26 PM PDT 24 1812733136 ps
T117 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.2650710782 May 30 02:30:33 PM PDT 24 May 30 02:30:38 PM PDT 24 615368405 ps
T890 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.3909192573 May 30 02:30:07 PM PDT 24 May 30 02:30:09 PM PDT 24 12400702 ps
T181 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.1317582119 May 30 02:30:29 PM PDT 24 May 30 02:30:32 PM PDT 24 79020920 ps
T182 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.887501629 May 30 02:30:23 PM PDT 24 May 30 02:30:25 PM PDT 24 59673163 ps
T183 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.1813776515 May 30 02:30:18 PM PDT 24 May 30 02:30:20 PM PDT 24 80152492 ps
T189 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.2608091567 May 30 02:30:38 PM PDT 24 May 30 02:30:40 PM PDT 24 71280838 ps
T891 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.1377212958 May 30 02:30:16 PM PDT 24 May 30 02:30:44 PM PDT 24 5771480537 ps
T892 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.882451228 May 30 02:30:30 PM PDT 24 May 30 02:30:33 PM PDT 24 39508333 ps
T138 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.1554066121 May 30 02:29:49 PM PDT 24 May 30 02:29:52 PM PDT 24 49005202 ps
T893 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.2365255474 May 30 02:30:35 PM PDT 24 May 30 02:30:39 PM PDT 24 60680703 ps
T131 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.3650412091 May 30 02:30:06 PM PDT 24 May 30 02:30:09 PM PDT 24 69924918 ps
T894 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.341701467 May 30 02:30:05 PM PDT 24 May 30 02:30:09 PM PDT 24 638646447 ps
T132 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.472990885 May 30 02:30:08 PM PDT 24 May 30 02:30:10 PM PDT 24 164507875 ps
T895 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.1099940371 May 30 02:30:15 PM PDT 24 May 30 02:30:17 PM PDT 24 112728666 ps
T896 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.449597593 May 30 02:30:24 PM PDT 24 May 30 02:30:34 PM PDT 24 370564088 ps
T123 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.3029300052 May 30 02:30:33 PM PDT 24 May 30 02:30:38 PM PDT 24 1270329369 ps
T897 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.2169893022 May 30 02:30:04 PM PDT 24 May 30 02:30:06 PM PDT 24 764186471 ps
T898 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.2895712754 May 30 02:30:38 PM PDT 24 May 30 02:30:40 PM PDT 24 22588649 ps
T190 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.607812279 May 30 02:30:38 PM PDT 24 May 30 02:30:40 PM PDT 24 53369519 ps
T124 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.3089964890 May 30 02:30:19 PM PDT 24 May 30 02:30:26 PM PDT 24 1648279411 ps
T135 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.1253867677 May 30 02:30:21 PM PDT 24 May 30 02:30:24 PM PDT 24 31386938 ps
T899 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.1679536165 May 30 02:30:29 PM PDT 24 May 30 02:30:31 PM PDT 24 50064700 ps
T148 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.4293825702 May 30 02:30:27 PM PDT 24 May 30 02:30:30 PM PDT 24 439041191 ps
T133 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.1461987279 May 30 02:30:30 PM PDT 24 May 30 02:30:35 PM PDT 24 72585239 ps
T900 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.2747515221 May 30 02:30:22 PM PDT 24 May 30 02:30:48 PM PDT 24 18113304964 ps
T901 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.3715933818 May 30 02:30:07 PM PDT 24 May 30 02:30:10 PM PDT 24 955789451 ps
T136 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.1337203253 May 30 02:30:04 PM PDT 24 May 30 02:30:07 PM PDT 24 185142530 ps
T191 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.1031133235 May 30 02:30:17 PM PDT 24 May 30 02:30:20 PM PDT 24 39180786 ps
T141 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.323368046 May 30 02:30:31 PM PDT 24 May 30 02:30:36 PM PDT 24 126706856 ps
T902 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.3715505369 May 30 02:30:30 PM PDT 24 May 30 02:30:33 PM PDT 24 54847085 ps
T192 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.3489346684 May 30 02:30:05 PM PDT 24 May 30 02:30:08 PM PDT 24 23839538 ps
T903 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.384761236 May 30 02:30:30 PM PDT 24 May 30 02:30:33 PM PDT 24 104174629 ps
T904 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.876121940 May 30 02:29:51 PM PDT 24 May 30 02:29:56 PM PDT 24 235858740 ps
T193 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.3628004189 May 30 02:30:05 PM PDT 24 May 30 02:30:08 PM PDT 24 37096297 ps
T142 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.2875585226 May 30 02:30:14 PM PDT 24 May 30 02:30:18 PM PDT 24 190450199 ps
T139 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.271470157 May 30 02:30:17 PM PDT 24 May 30 02:30:21 PM PDT 24 178107727 ps
T905 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.1091297238 May 30 02:30:24 PM PDT 24 May 30 02:30:26 PM PDT 24 117148716 ps
T128 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.1771413150 May 30 02:30:27 PM PDT 24 May 30 02:30:31 PM PDT 24 435030359 ps
T143 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.3736067126 May 30 02:30:33 PM PDT 24 May 30 02:30:38 PM PDT 24 296076390 ps
T906 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.4195991461 May 30 02:30:07 PM PDT 24 May 30 02:30:31 PM PDT 24 1028278939 ps
T907 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.734265757 May 30 02:30:05 PM PDT 24 May 30 02:30:08 PM PDT 24 204622883 ps
T908 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.2693723341 May 30 02:30:21 PM PDT 24 May 30 02:30:24 PM PDT 24 134336922 ps
T909 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.351813299 May 30 02:30:34 PM PDT 24 May 30 02:30:37 PM PDT 24 44606508 ps
T910 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.4213904010 May 30 02:30:16 PM PDT 24 May 30 02:30:19 PM PDT 24 64822536 ps
T125 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.1406915466 May 30 02:30:34 PM PDT 24 May 30 02:30:36 PM PDT 24 26697741 ps
T126 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.3491220187 May 30 02:30:17 PM PDT 24 May 30 02:30:22 PM PDT 24 337586540 ps
T911 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.2735935792 May 30 02:30:23 PM PDT 24 May 30 02:30:26 PM PDT 24 50501640 ps
T912 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3102540974 May 30 02:30:16 PM PDT 24 May 30 02:30:22 PM PDT 24 306484398 ps
T913 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.616573656 May 30 02:30:20 PM PDT 24 May 30 02:30:23 PM PDT 24 130832073 ps
T914 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.3907816701 May 30 02:30:32 PM PDT 24 May 30 02:30:36 PM PDT 24 33140844 ps
T915 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.44411259 May 30 02:29:53 PM PDT 24 May 30 02:29:56 PM PDT 24 60003977 ps
T194 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.2981987171 May 30 02:30:21 PM PDT 24 May 30 02:30:23 PM PDT 24 19481435 ps
T916 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.120661775 May 30 02:30:06 PM PDT 24 May 30 02:30:10 PM PDT 24 332774919 ps
T917 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.314729749 May 30 02:30:07 PM PDT 24 May 30 02:30:09 PM PDT 24 62828170 ps
T918 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.3392513293 May 30 02:30:17 PM PDT 24 May 30 02:30:35 PM PDT 24 1455864146 ps
T919 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.4085660783 May 30 02:29:51 PM PDT 24 May 30 02:29:53 PM PDT 24 318168982 ps
T920 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.1034773680 May 30 02:30:29 PM PDT 24 May 30 02:30:32 PM PDT 24 77284556 ps
T921 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.3308358414 May 30 02:30:04 PM PDT 24 May 30 02:30:06 PM PDT 24 67996540 ps
T922 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.580717255 May 30 02:30:18 PM PDT 24 May 30 02:30:21 PM PDT 24 27684681 ps
T923 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.391245985 May 30 02:30:22 PM PDT 24 May 30 02:30:27 PM PDT 24 508574604 ps
T924 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.1468345695 May 30 02:30:07 PM PDT 24 May 30 02:30:10 PM PDT 24 28440616 ps
T925 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.190588454 May 30 02:30:33 PM PDT 24 May 30 02:30:36 PM PDT 24 33926777 ps
T195 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.230550727 May 30 02:30:32 PM PDT 24 May 30 02:30:35 PM PDT 24 18297997 ps
T926 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.2624750568 May 30 02:30:05 PM PDT 24 May 30 02:30:08 PM PDT 24 150450201 ps
T927 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.384991198 May 30 02:30:20 PM PDT 24 May 30 02:30:28 PM PDT 24 4228941830 ps
T928 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.1433327426 May 30 02:30:17 PM PDT 24 May 30 02:30:20 PM PDT 24 84000538 ps
T196 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.857971332 May 30 02:30:15 PM PDT 24 May 30 02:30:17 PM PDT 24 55564082 ps
T197 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.1442850416 May 30 02:30:08 PM PDT 24 May 30 02:30:10 PM PDT 24 16872620 ps
T929 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.4124514934 May 30 02:30:38 PM PDT 24 May 30 02:30:41 PM PDT 24 164790350 ps
T930 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.1630787652 May 30 02:30:19 PM PDT 24 May 30 02:30:23 PM PDT 24 112158086 ps
T931 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.1273376059 May 30 02:30:18 PM PDT 24 May 30 02:30:21 PM PDT 24 148891304 ps
T932 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2744171129 May 30 02:30:15 PM PDT 24 May 30 02:30:19 PM PDT 24 2007411428 ps
T933 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.1044801918 May 30 02:30:17 PM PDT 24 May 30 02:30:19 PM PDT 24 17716686 ps
T934 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.1739734047 May 30 02:30:20 PM PDT 24 May 30 02:30:23 PM PDT 24 127906724 ps
T935 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.3279125974 May 30 02:30:16 PM PDT 24 May 30 02:30:24 PM PDT 24 6335048143 ps
T936 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.3261425323 May 30 02:30:15 PM PDT 24 May 30 02:30:18 PM PDT 24 64951086 ps
T937 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.3177620145 May 30 02:30:04 PM PDT 24 May 30 02:30:06 PM PDT 24 35474658 ps
T938 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.2279764902 May 30 02:29:51 PM PDT 24 May 30 02:29:55 PM PDT 24 158239233 ps
T939 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.2637398714 May 30 02:30:10 PM PDT 24 May 30 02:30:12 PM PDT 24 92655357 ps
T940 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.1323663527 May 30 02:30:22 PM PDT 24 May 30 02:30:24 PM PDT 24 124442986 ps
T941 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.3571592665 May 30 02:30:07 PM PDT 24 May 30 02:30:09 PM PDT 24 20844605 ps
T942 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.345223495 May 30 02:30:34 PM PDT 24 May 30 02:30:39 PM PDT 24 79111914 ps
T943 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.1902447127 May 30 02:30:20 PM PDT 24 May 30 02:30:24 PM PDT 24 187710059 ps
T944 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.3079274655 May 30 02:30:23 PM PDT 24 May 30 02:30:25 PM PDT 24 23390041 ps
T945 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.1517865325 May 30 02:30:24 PM PDT 24 May 30 02:30:28 PM PDT 24 642663447 ps
T946 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.181185363 May 30 02:29:52 PM PDT 24 May 30 02:29:54 PM PDT 24 174148090 ps
T947 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.3427685630 May 30 02:30:22 PM PDT 24 May 30 02:30:24 PM PDT 24 15021348 ps
T948 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.622070331 May 30 02:30:17 PM PDT 24 May 30 02:30:19 PM PDT 24 13963755 ps
T140 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.2612797910 May 30 02:30:10 PM PDT 24 May 30 02:30:14 PM PDT 24 108332509 ps
T949 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.2371126125 May 30 02:29:52 PM PDT 24 May 30 02:29:53 PM PDT 24 13110913 ps
T950 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.1379268564 May 30 02:30:21 PM PDT 24 May 30 02:30:23 PM PDT 24 68306904 ps
T198 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.2064463154 May 30 02:30:16 PM PDT 24 May 30 02:30:19 PM PDT 24 44863593 ps
T951 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.2577570371 May 30 02:30:30 PM PDT 24 May 30 02:30:32 PM PDT 24 13257314 ps
T952 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.1581260001 May 30 02:30:20 PM PDT 24 May 30 02:30:27 PM PDT 24 10414469934 ps
T953 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.1169512539 May 30 02:30:15 PM PDT 24 May 30 02:30:17 PM PDT 24 20684294 ps
T954 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.3727425297 May 30 02:30:34 PM PDT 24 May 30 02:30:37 PM PDT 24 23362360 ps
T134 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.2284225656 May 30 02:30:17 PM PDT 24 May 30 02:30:22 PM PDT 24 463558715 ps
T955 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.3252351532 May 30 02:30:20 PM PDT 24 May 30 02:30:24 PM PDT 24 143096284 ps
T956 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.1174531077 May 30 02:30:30 PM PDT 24 May 30 02:30:37 PM PDT 24 574136981 ps
T144 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.3098080026 May 30 02:30:33 PM PDT 24 May 30 02:30:36 PM PDT 24 243927890 ps
T957 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.2615971096 May 30 02:30:28 PM PDT 24 May 30 02:30:30 PM PDT 24 78308869 ps
T958 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.3623096719 May 30 02:30:06 PM PDT 24 May 30 02:30:19 PM PDT 24 831754969 ps
T959 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.1117467333 May 30 02:30:30 PM PDT 24 May 30 02:30:33 PM PDT 24 34923206 ps
T960 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.1294864102 May 30 02:30:17 PM PDT 24 May 30 02:30:19 PM PDT 24 113006221 ps
T145 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.4164063178 May 30 02:30:09 PM PDT 24 May 30 02:30:13 PM PDT 24 79598613 ps
T961 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.399792640 May 30 02:30:17 PM PDT 24 May 30 02:30:19 PM PDT 24 19458284 ps
T129 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.3991293351 May 30 02:30:31 PM PDT 24 May 30 02:30:36 PM PDT 24 114214735 ps
T137 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.2826549517 May 30 02:30:16 PM PDT 24 May 30 02:30:19 PM PDT 24 45758283 ps
T962 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.769261964 May 30 02:30:16 PM PDT 24 May 30 02:30:23 PM PDT 24 192385346 ps
T963 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.2787806161 May 30 02:30:06 PM PDT 24 May 30 02:30:08 PM PDT 24 88875651 ps
T964 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.208658919 May 30 02:30:21 PM PDT 24 May 30 02:30:25 PM PDT 24 168646168 ps
T965 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.2640344405 May 30 02:30:21 PM PDT 24 May 30 02:30:24 PM PDT 24 44168980 ps
T966 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.456723522 May 30 02:30:17 PM PDT 24 May 30 02:30:20 PM PDT 24 40705520 ps
T967 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.1845535249 May 30 02:30:24 PM PDT 24 May 30 02:30:29 PM PDT 24 93548064 ps
T199 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.740447611 May 30 02:29:52 PM PDT 24 May 30 02:29:54 PM PDT 24 33064555 ps
T968 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.934145566 May 30 02:30:16 PM PDT 24 May 30 02:30:49 PM PDT 24 6068695530 ps
T969 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.1477383055 May 30 02:30:21 PM PDT 24 May 30 02:30:24 PM PDT 24 160344679 ps
T970 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.3220688586 May 30 02:30:38 PM PDT 24 May 30 02:30:41 PM PDT 24 21606776 ps
T971 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.1963980665 May 30 02:30:28 PM PDT 24 May 30 02:30:30 PM PDT 24 20955031 ps
T972 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.4173667931 May 30 02:30:27 PM PDT 24 May 30 02:30:30 PM PDT 24 66240603 ps
T973 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.3758384765 May 30 02:30:04 PM PDT 24 May 30 02:30:07 PM PDT 24 95713259 ps
T974 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.1550645950 May 30 02:30:21 PM PDT 24 May 30 02:30:24 PM PDT 24 223011332 ps
T975 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.2713410852 May 30 02:30:33 PM PDT 24 May 30 02:30:36 PM PDT 24 30294814 ps
T976 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.4281988770 May 30 02:30:32 PM PDT 24 May 30 02:30:35 PM PDT 24 48569452 ps
T977 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3000539809 May 30 02:30:22 PM PDT 24 May 30 02:30:27 PM PDT 24 232179329 ps
T978 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.3196375262 May 30 02:30:08 PM PDT 24 May 30 02:30:11 PM PDT 24 73497066 ps
T979 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.1066298506 May 30 02:30:07 PM PDT 24 May 30 02:30:18 PM PDT 24 832859077 ps
T980 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.726701036 May 30 02:30:22 PM PDT 24 May 30 02:30:25 PM PDT 24 777295521 ps
T981 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.1390413036 May 30 02:30:29 PM PDT 24 May 30 02:30:31 PM PDT 24 27415228 ps
T146 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1754506491 May 30 02:30:14 PM PDT 24 May 30 02:30:17 PM PDT 24 816197623 ps
T982 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.280561911 May 30 02:29:50 PM PDT 24 May 30 02:29:53 PM PDT 24 263133843 ps
T983 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.1955123275 May 30 02:29:52 PM PDT 24 May 30 02:29:55 PM PDT 24 128472053 ps
T984 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.2979284547 May 30 02:30:17 PM PDT 24 May 30 02:30:20 PM PDT 24 65642009 ps
T985 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.80440333 May 30 02:30:24 PM PDT 24 May 30 02:30:26 PM PDT 24 304237451 ps
T986 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.2033282777 May 30 02:30:29 PM PDT 24 May 30 02:30:31 PM PDT 24 15273128 ps
T987 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.2463834373 May 30 02:30:31 PM PDT 24 May 30 02:30:33 PM PDT 24 56939857 ps
T988 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.2277321357 May 30 02:30:23 PM PDT 24 May 30 02:30:25 PM PDT 24 27364028 ps
T989 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.1783249154 May 30 02:30:07 PM PDT 24 May 30 02:30:14 PM PDT 24 188979300 ps
T990 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.1908204021 May 30 02:30:16 PM PDT 24 May 30 02:30:18 PM PDT 24 62698083 ps
T991 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.86145326 May 30 02:30:16 PM PDT 24 May 30 02:30:19 PM PDT 24 51254978 ps
T992 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1799930056 May 30 02:30:25 PM PDT 24 May 30 02:30:29 PM PDT 24 841751464 ps
T993 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.3841088416 May 30 02:30:16 PM PDT 24 May 30 02:30:19 PM PDT 24 36943515 ps
T147 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.1809526236 May 30 02:30:28 PM PDT 24 May 30 02:30:32 PM PDT 24 436777309 ps
T994 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.2648708992 May 30 02:30:07 PM PDT 24 May 30 02:30:08 PM PDT 24 11891326 ps
T995 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.3509617810 May 30 02:30:05 PM PDT 24 May 30 02:30:08 PM PDT 24 41489328 ps
T996 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.1422529753 May 30 02:29:52 PM PDT 24 May 30 02:30:07 PM PDT 24 1328554799 ps
T200 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.1892156167 May 30 02:30:04 PM PDT 24 May 30 02:30:06 PM PDT 24 172478576 ps
T997 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.785779687 May 30 02:30:29 PM PDT 24 May 30 02:30:33 PM PDT 24 49502245 ps
T998 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.2003159172 May 30 02:30:17 PM PDT 24 May 30 02:30:21 PM PDT 24 124799790 ps
T999 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.828500038 May 30 02:30:35 PM PDT 24 May 30 02:30:39 PM PDT 24 1549654937 ps
T1000 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.542877705 May 30 02:30:15 PM PDT 24 May 30 02:30:17 PM PDT 24 66132491 ps
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