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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.84 97.92 95.66 93.40 97.62 98.52 98.51 96.29


Total test records in report: 1001
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T820 /workspace/coverage/default/7.lc_ctrl_sec_mubi.650379015 Jul 31 07:18:10 PM PDT 24 Jul 31 07:18:20 PM PDT 24 387401042 ps
T821 /workspace/coverage/default/2.lc_ctrl_smoke.17850536 Jul 31 07:17:46 PM PDT 24 Jul 31 07:17:51 PM PDT 24 155997055 ps
T822 /workspace/coverage/default/44.lc_ctrl_errors.2694948055 Jul 31 07:20:51 PM PDT 24 Jul 31 07:21:04 PM PDT 24 246528096 ps
T823 /workspace/coverage/default/38.lc_ctrl_security_escalation.873347186 Jul 31 07:20:32 PM PDT 24 Jul 31 07:20:43 PM PDT 24 1473377656 ps
T824 /workspace/coverage/default/26.lc_ctrl_alert_test.263050165 Jul 31 07:19:49 PM PDT 24 Jul 31 07:19:51 PM PDT 24 14716647 ps
T825 /workspace/coverage/default/13.lc_ctrl_stress_all.3848038585 Jul 31 07:18:49 PM PDT 24 Jul 31 07:20:06 PM PDT 24 15162683577 ps
T826 /workspace/coverage/default/44.lc_ctrl_alert_test.1483354666 Jul 31 07:21:08 PM PDT 24 Jul 31 07:21:09 PM PDT 24 15362798 ps
T827 /workspace/coverage/default/18.lc_ctrl_jtag_state_post_trans.2854932681 Jul 31 07:19:06 PM PDT 24 Jul 31 07:19:24 PM PDT 24 460253425 ps
T828 /workspace/coverage/default/47.lc_ctrl_state_failure.3201585276 Jul 31 07:20:59 PM PDT 24 Jul 31 07:21:35 PM PDT 24 724101663 ps
T829 /workspace/coverage/default/13.lc_ctrl_sec_token_mux.3938291539 Jul 31 07:18:49 PM PDT 24 Jul 31 07:18:59 PM PDT 24 970924430 ps
T830 /workspace/coverage/default/8.lc_ctrl_jtag_access.1046759768 Jul 31 07:18:13 PM PDT 24 Jul 31 07:18:18 PM PDT 24 170583879 ps
T831 /workspace/coverage/default/17.lc_ctrl_jtag_access.2996706720 Jul 31 07:19:01 PM PDT 24 Jul 31 07:19:22 PM PDT 24 3089218465 ps
T832 /workspace/coverage/default/6.lc_ctrl_state_failure.2469485267 Jul 31 07:18:00 PM PDT 24 Jul 31 07:18:23 PM PDT 24 312995822 ps
T833 /workspace/coverage/default/25.lc_ctrl_alert_test.2897071454 Jul 31 07:19:38 PM PDT 24 Jul 31 07:19:39 PM PDT 24 37975707 ps
T834 /workspace/coverage/default/3.lc_ctrl_sec_mubi.2339239404 Jul 31 07:17:50 PM PDT 24 Jul 31 07:18:01 PM PDT 24 1071296350 ps
T835 /workspace/coverage/default/29.lc_ctrl_sec_mubi.1310709788 Jul 31 07:19:53 PM PDT 24 Jul 31 07:20:07 PM PDT 24 288076449 ps
T836 /workspace/coverage/default/20.lc_ctrl_volatile_unlock_smoke.668648887 Jul 31 07:19:15 PM PDT 24 Jul 31 07:19:16 PM PDT 24 14029169 ps
T837 /workspace/coverage/default/12.lc_ctrl_sec_token_mux.3723311661 Jul 31 07:18:40 PM PDT 24 Jul 31 07:18:48 PM PDT 24 2006170774 ps
T838 /workspace/coverage/default/7.lc_ctrl_state_post_trans.3954026184 Jul 31 07:18:07 PM PDT 24 Jul 31 07:18:11 PM PDT 24 265076379 ps
T839 /workspace/coverage/default/2.lc_ctrl_state_failure.101102107 Jul 31 07:17:47 PM PDT 24 Jul 31 07:18:04 PM PDT 24 507891475 ps
T840 /workspace/coverage/default/15.lc_ctrl_state_post_trans.155945812 Jul 31 07:18:57 PM PDT 24 Jul 31 07:19:04 PM PDT 24 132381160 ps
T841 /workspace/coverage/default/30.lc_ctrl_sec_mubi.1496718155 Jul 31 07:19:55 PM PDT 24 Jul 31 07:20:10 PM PDT 24 296895988 ps
T842 /workspace/coverage/default/34.lc_ctrl_jtag_access.2843162027 Jul 31 07:20:11 PM PDT 24 Jul 31 07:20:26 PM PDT 24 546520927 ps
T843 /workspace/coverage/default/48.lc_ctrl_errors.992555443 Jul 31 07:21:09 PM PDT 24 Jul 31 07:21:21 PM PDT 24 863082448 ps
T844 /workspace/coverage/default/44.lc_ctrl_sec_mubi.2964379194 Jul 31 07:21:01 PM PDT 24 Jul 31 07:21:15 PM PDT 24 666325853 ps
T845 /workspace/coverage/default/42.lc_ctrl_alert_test.3600197329 Jul 31 07:20:53 PM PDT 24 Jul 31 07:20:54 PM PDT 24 42184690 ps
T846 /workspace/coverage/default/13.lc_ctrl_jtag_state_post_trans.920575694 Jul 31 07:18:41 PM PDT 24 Jul 31 07:18:58 PM PDT 24 426333158 ps
T847 /workspace/coverage/default/38.lc_ctrl_smoke.1123801459 Jul 31 07:20:19 PM PDT 24 Jul 31 07:20:23 PM PDT 24 61314121 ps
T848 /workspace/coverage/default/29.lc_ctrl_alert_test.2621357595 Jul 31 07:19:57 PM PDT 24 Jul 31 07:19:58 PM PDT 24 30166852 ps
T849 /workspace/coverage/default/9.lc_ctrl_prog_failure.2454782549 Jul 31 07:18:18 PM PDT 24 Jul 31 07:18:20 PM PDT 24 81437652 ps
T850 /workspace/coverage/default/41.lc_ctrl_sec_token_mux.2294841376 Jul 31 07:20:50 PM PDT 24 Jul 31 07:21:05 PM PDT 24 449633499 ps
T851 /workspace/coverage/default/9.lc_ctrl_jtag_errors.2966523802 Jul 31 07:18:24 PM PDT 24 Jul 31 07:19:08 PM PDT 24 5553866965 ps
T852 /workspace/coverage/default/48.lc_ctrl_stress_all.1099883960 Jul 31 07:21:06 PM PDT 24 Jul 31 07:21:12 PM PDT 24 119716277 ps
T853 /workspace/coverage/default/47.lc_ctrl_errors.1332707597 Jul 31 07:21:00 PM PDT 24 Jul 31 07:21:12 PM PDT 24 807165432 ps
T854 /workspace/coverage/default/28.lc_ctrl_volatile_unlock_smoke.3188287849 Jul 31 07:19:51 PM PDT 24 Jul 31 07:19:52 PM PDT 24 14078517 ps
T855 /workspace/coverage/default/30.lc_ctrl_state_failure.3785189085 Jul 31 07:19:53 PM PDT 24 Jul 31 07:20:19 PM PDT 24 1120724745 ps
T856 /workspace/coverage/default/18.lc_ctrl_jtag_state_failure.1294006176 Jul 31 07:19:08 PM PDT 24 Jul 31 07:19:58 PM PDT 24 2969170276 ps
T857 /workspace/coverage/default/10.lc_ctrl_sec_token_mux.1798916926 Jul 31 07:18:30 PM PDT 24 Jul 31 07:18:40 PM PDT 24 348883770 ps
T858 /workspace/coverage/default/1.lc_ctrl_errors.4111859176 Jul 31 07:17:33 PM PDT 24 Jul 31 07:17:47 PM PDT 24 385978116 ps
T859 /workspace/coverage/default/33.lc_ctrl_volatile_unlock_smoke.652184348 Jul 31 07:20:03 PM PDT 24 Jul 31 07:20:04 PM PDT 24 21764101 ps
T860 /workspace/coverage/default/18.lc_ctrl_sec_token_mux.2773775848 Jul 31 07:19:07 PM PDT 24 Jul 31 07:19:16 PM PDT 24 2946758545 ps
T861 /workspace/coverage/default/5.lc_ctrl_jtag_state_failure.3843888227 Jul 31 07:18:01 PM PDT 24 Jul 31 07:18:29 PM PDT 24 5225472539 ps
T862 /workspace/coverage/default/19.lc_ctrl_jtag_access.3730461988 Jul 31 07:19:15 PM PDT 24 Jul 31 07:19:24 PM PDT 24 1772115901 ps
T863 /workspace/coverage/default/3.lc_ctrl_volatile_unlock_smoke.3371818394 Jul 31 07:17:46 PM PDT 24 Jul 31 07:17:47 PM PDT 24 11027384 ps
T864 /workspace/coverage/default/42.lc_ctrl_errors.2777834142 Jul 31 07:20:48 PM PDT 24 Jul 31 07:21:00 PM PDT 24 675351593 ps
T865 /workspace/coverage/default/35.lc_ctrl_stress_all.3285195113 Jul 31 07:20:09 PM PDT 24 Jul 31 07:22:36 PM PDT 24 6943912807 ps
T866 /workspace/coverage/default/43.lc_ctrl_stress_all.563929006 Jul 31 07:20:51 PM PDT 24 Jul 31 07:23:27 PM PDT 24 8741531022 ps
T867 /workspace/coverage/default/24.lc_ctrl_smoke.3614508916 Jul 31 07:19:32 PM PDT 24 Jul 31 07:19:34 PM PDT 24 42363462 ps
T868 /workspace/coverage/default/34.lc_ctrl_prog_failure.2613665476 Jul 31 07:20:13 PM PDT 24 Jul 31 07:20:15 PM PDT 24 37936382 ps
T869 /workspace/coverage/default/33.lc_ctrl_state_post_trans.3724077675 Jul 31 07:20:03 PM PDT 24 Jul 31 07:20:09 PM PDT 24 214132410 ps
T870 /workspace/coverage/default/14.lc_ctrl_security_escalation.2382645416 Jul 31 07:18:47 PM PDT 24 Jul 31 07:19:00 PM PDT 24 1510228623 ps
T871 /workspace/coverage/default/28.lc_ctrl_stress_all_with_rand_reset.3015727725 Jul 31 07:19:51 PM PDT 24 Jul 31 07:22:44 PM PDT 24 8484823156 ps
T872 /workspace/coverage/default/25.lc_ctrl_state_failure.303936484 Jul 31 07:19:40 PM PDT 24 Jul 31 07:20:07 PM PDT 24 337967627 ps
T873 /workspace/coverage/default/10.lc_ctrl_alert_test.3169762823 Jul 31 07:18:26 PM PDT 24 Jul 31 07:18:27 PM PDT 24 14308950 ps
T874 /workspace/coverage/default/15.lc_ctrl_sec_token_digest.2032571595 Jul 31 07:18:55 PM PDT 24 Jul 31 07:19:05 PM PDT 24 492120756 ps
T875 /workspace/coverage/default/9.lc_ctrl_jtag_state_post_trans.2387733313 Jul 31 07:18:19 PM PDT 24 Jul 31 07:18:29 PM PDT 24 2540769859 ps
T876 /workspace/coverage/default/19.lc_ctrl_sec_token_mux.2808237627 Jul 31 07:19:15 PM PDT 24 Jul 31 07:19:23 PM PDT 24 354274472 ps
T877 /workspace/coverage/default/17.lc_ctrl_alert_test.2494340360 Jul 31 07:19:04 PM PDT 24 Jul 31 07:19:05 PM PDT 24 15299927 ps
T878 /workspace/coverage/default/29.lc_ctrl_security_escalation.2947522584 Jul 31 07:19:50 PM PDT 24 Jul 31 07:20:11 PM PDT 24 3546567163 ps
T879 /workspace/coverage/default/31.lc_ctrl_volatile_unlock_smoke.1619492786 Jul 31 07:19:54 PM PDT 24 Jul 31 07:19:55 PM PDT 24 59255558 ps
T880 /workspace/coverage/default/39.lc_ctrl_prog_failure.4222817122 Jul 31 07:20:33 PM PDT 24 Jul 31 07:20:36 PM PDT 24 157402418 ps
T881 /workspace/coverage/default/49.lc_ctrl_sec_mubi.2404429166 Jul 31 07:21:12 PM PDT 24 Jul 31 07:21:24 PM PDT 24 320223751 ps
T882 /workspace/coverage/default/17.lc_ctrl_volatile_unlock_smoke.601337855 Jul 31 07:19:01 PM PDT 24 Jul 31 07:19:01 PM PDT 24 68162007 ps
T883 /workspace/coverage/default/29.lc_ctrl_smoke.4157718075 Jul 31 07:19:53 PM PDT 24 Jul 31 07:19:54 PM PDT 24 50517853 ps
T884 /workspace/coverage/default/42.lc_ctrl_smoke.3295856447 Jul 31 07:20:55 PM PDT 24 Jul 31 07:20:59 PM PDT 24 506550058 ps
T885 /workspace/coverage/default/22.lc_ctrl_alert_test.1242159841 Jul 31 07:19:25 PM PDT 24 Jul 31 07:19:26 PM PDT 24 17376471 ps
T86 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.4191948659 Jul 31 05:09:29 PM PDT 24 Jul 31 05:09:31 PM PDT 24 90169224 ps
T100 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.2931759890 Jul 31 05:09:18 PM PDT 24 Jul 31 05:09:19 PM PDT 24 61598859 ps
T101 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.1919157101 Jul 31 05:09:33 PM PDT 24 Jul 31 05:09:36 PM PDT 24 156469622 ps
T93 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.3557571031 Jul 31 05:09:26 PM PDT 24 Jul 31 05:09:28 PM PDT 24 109440909 ps
T89 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.1256672959 Jul 31 05:09:34 PM PDT 24 Jul 31 05:09:36 PM PDT 24 219538707 ps
T134 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.2193307952 Jul 31 05:09:22 PM PDT 24 Jul 31 05:09:23 PM PDT 24 26668698 ps
T126 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.2021571369 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:25 PM PDT 24 116201324 ps
T94 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.2997049457 Jul 31 05:09:25 PM PDT 24 Jul 31 05:09:26 PM PDT 24 18672562 ps
T191 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.3031878441 Jul 31 05:09:17 PM PDT 24 Jul 31 05:09:19 PM PDT 24 33617939 ps
T87 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.1680031406 Jul 31 05:09:33 PM PDT 24 Jul 31 05:09:35 PM PDT 24 117971501 ps
T92 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.3821278032 Jul 31 05:09:19 PM PDT 24 Jul 31 05:09:20 PM PDT 24 60083531 ps
T124 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.559173982 Jul 31 05:09:12 PM PDT 24 Jul 31 05:09:13 PM PDT 24 64548917 ps
T88 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.483015671 Jul 31 05:09:18 PM PDT 24 Jul 31 05:09:20 PM PDT 24 169224584 ps
T176 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.1047986780 Jul 31 05:09:15 PM PDT 24 Jul 31 05:09:16 PM PDT 24 14967502 ps
T886 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.2447324616 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:26 PM PDT 24 51200340 ps
T125 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.196988017 Jul 31 05:09:17 PM PDT 24 Jul 31 05:09:41 PM PDT 24 1010955602 ps
T123 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.4128293093 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:37 PM PDT 24 42295961 ps
T192 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.4010980218 Jul 31 05:09:17 PM PDT 24 Jul 31 05:09:20 PM PDT 24 129558411 ps
T193 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.3957089887 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:25 PM PDT 24 27294586 ps
T887 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.1638693042 Jul 31 05:09:41 PM PDT 24 Jul 31 05:09:42 PM PDT 24 121114462 ps
T90 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.3339103249 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:37 PM PDT 24 54798862 ps
T148 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2467340315 Jul 31 05:09:29 PM PDT 24 Jul 31 05:09:32 PM PDT 24 635338420 ps
T177 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.1305071393 Jul 31 05:09:19 PM PDT 24 Jul 31 05:09:21 PM PDT 24 26430540 ps
T103 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.4019383084 Jul 31 05:09:27 PM PDT 24 Jul 31 05:09:30 PM PDT 24 84952764 ps
T888 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.589476533 Jul 31 05:09:17 PM PDT 24 Jul 31 05:09:19 PM PDT 24 325936816 ps
T135 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.4203242242 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:25 PM PDT 24 90246297 ps
T194 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.2545854045 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:38 PM PDT 24 23325662 ps
T889 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.3653063278 Jul 31 05:09:13 PM PDT 24 Jul 31 05:09:15 PM PDT 24 90799362 ps
T136 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.1440265211 Jul 31 05:09:43 PM PDT 24 Jul 31 05:09:45 PM PDT 24 289378980 ps
T890 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.2043715775 Jul 31 05:09:18 PM PDT 24 Jul 31 05:09:22 PM PDT 24 1270081570 ps
T137 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.1903899513 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:37 PM PDT 24 29823268 ps
T891 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.1326987038 Jul 31 05:09:37 PM PDT 24 Jul 31 05:09:46 PM PDT 24 1771818827 ps
T149 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.970998604 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:24 PM PDT 24 18129539 ps
T138 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.1614533537 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:24 PM PDT 24 46688201 ps
T150 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.825655522 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:25 PM PDT 24 125185848 ps
T91 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.467557802 Jul 31 05:09:20 PM PDT 24 Jul 31 05:09:24 PM PDT 24 110827838 ps
T892 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.1415534542 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:26 PM PDT 24 74362296 ps
T104 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.4032837427 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:38 PM PDT 24 71824691 ps
T95 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.3177335010 Jul 31 05:09:29 PM PDT 24 Jul 31 05:09:32 PM PDT 24 111556811 ps
T96 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.3871636521 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:25 PM PDT 24 29655320 ps
T893 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.919398469 Jul 31 05:09:25 PM PDT 24 Jul 31 05:09:35 PM PDT 24 5136539125 ps
T894 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.3621068279 Jul 31 05:09:40 PM PDT 24 Jul 31 05:09:42 PM PDT 24 116057833 ps
T895 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.1894252162 Jul 31 05:09:32 PM PDT 24 Jul 31 05:09:35 PM PDT 24 126392697 ps
T896 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.2481753380 Jul 31 05:09:26 PM PDT 24 Jul 31 05:09:28 PM PDT 24 29024016 ps
T106 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.4285475178 Jul 31 05:09:26 PM PDT 24 Jul 31 05:09:27 PM PDT 24 18716480 ps
T897 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.701347531 Jul 31 05:09:25 PM PDT 24 Jul 31 05:09:27 PM PDT 24 223496646 ps
T898 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.962339109 Jul 31 05:09:16 PM PDT 24 Jul 31 05:09:17 PM PDT 24 221350547 ps
T195 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.3278074899 Jul 31 05:09:17 PM PDT 24 Jul 31 05:09:19 PM PDT 24 30940469 ps
T899 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.1596923937 Jul 31 05:09:30 PM PDT 24 Jul 31 05:09:31 PM PDT 24 72909634 ps
T900 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.2961785291 Jul 31 05:09:30 PM PDT 24 Jul 31 05:09:31 PM PDT 24 34484317 ps
T901 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.2769741911 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:38 PM PDT 24 66424181 ps
T902 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.1235845547 Jul 31 05:09:18 PM PDT 24 Jul 31 05:09:20 PM PDT 24 90180900 ps
T903 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.565678489 Jul 31 05:09:42 PM PDT 24 Jul 31 05:09:43 PM PDT 24 18275336 ps
T105 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.2067234485 Jul 31 05:09:22 PM PDT 24 Jul 31 05:09:24 PM PDT 24 56103175 ps
T121 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.1824545446 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:38 PM PDT 24 84490482 ps
T904 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.501158015 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:25 PM PDT 24 88075073 ps
T99 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.1307778640 Jul 31 05:09:37 PM PDT 24 Jul 31 05:09:39 PM PDT 24 74292150 ps
T108 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.3664434433 Jul 31 05:09:22 PM PDT 24 Jul 31 05:09:26 PM PDT 24 58973859 ps
T905 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.3610222198 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:37 PM PDT 24 146850686 ps
T906 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.3901701791 Jul 31 05:09:18 PM PDT 24 Jul 31 05:09:20 PM PDT 24 22856512 ps
T907 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.2749439183 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:38 PM PDT 24 18033345 ps
T908 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1308642516 Jul 31 05:09:14 PM PDT 24 Jul 31 05:09:17 PM PDT 24 337572423 ps
T909 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.1239171185 Jul 31 05:09:21 PM PDT 24 Jul 31 05:09:22 PM PDT 24 15442916 ps
T910 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1727478507 Jul 31 05:09:26 PM PDT 24 Jul 31 05:09:29 PM PDT 24 408178201 ps
T911 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.2815427251 Jul 31 05:09:27 PM PDT 24 Jul 31 05:09:32 PM PDT 24 2283692768 ps
T912 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.2148475283 Jul 31 05:09:34 PM PDT 24 Jul 31 05:09:35 PM PDT 24 12954829 ps
T913 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.3109706940 Jul 31 05:09:17 PM PDT 24 Jul 31 05:09:19 PM PDT 24 260790383 ps
T914 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.4280977009 Jul 31 05:09:37 PM PDT 24 Jul 31 05:09:39 PM PDT 24 103657073 ps
T915 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.2462726799 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:37 PM PDT 24 22215362 ps
T916 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.3891073942 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:37 PM PDT 24 20427759 ps
T109 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.1031136545 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:38 PM PDT 24 325170927 ps
T917 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.212655287 Jul 31 05:09:34 PM PDT 24 Jul 31 05:09:36 PM PDT 24 77401084 ps
T918 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.1205175509 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:37 PM PDT 24 23248974 ps
T919 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.3671930324 Jul 31 05:09:31 PM PDT 24 Jul 31 05:09:34 PM PDT 24 90553655 ps
T920 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.242152428 Jul 31 05:09:15 PM PDT 24 Jul 31 05:09:21 PM PDT 24 1462423701 ps
T178 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.1947281633 Jul 31 05:09:37 PM PDT 24 Jul 31 05:09:38 PM PDT 24 35093514 ps
T921 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.1099586705 Jul 31 05:09:43 PM PDT 24 Jul 31 05:09:44 PM PDT 24 30923250 ps
T922 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1403670724 Jul 31 05:09:27 PM PDT 24 Jul 31 05:10:06 PM PDT 24 6210763272 ps
T923 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.3769368954 Jul 31 05:09:37 PM PDT 24 Jul 31 05:09:40 PM PDT 24 63526157 ps
T924 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.374647345 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:27 PM PDT 24 95921449 ps
T925 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.3756625658 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:25 PM PDT 24 126974616 ps
T926 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.3763628411 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:25 PM PDT 24 109629395 ps
T927 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.2441734399 Jul 31 05:09:41 PM PDT 24 Jul 31 05:09:43 PM PDT 24 47674114 ps
T115 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.425584842 Jul 31 05:09:48 PM PDT 24 Jul 31 05:09:51 PM PDT 24 157654634 ps
T928 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.4058995652 Jul 31 05:09:29 PM PDT 24 Jul 31 05:09:55 PM PDT 24 10828702342 ps
T929 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.1427788955 Jul 31 05:09:18 PM PDT 24 Jul 31 05:09:20 PM PDT 24 115258670 ps
T930 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.2132739569 Jul 31 05:09:19 PM PDT 24 Jul 31 05:09:22 PM PDT 24 49307588 ps
T931 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.3415885187 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:52 PM PDT 24 1363953146 ps
T97 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.3825211564 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:41 PM PDT 24 117357242 ps
T118 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.2696136725 Jul 31 05:09:17 PM PDT 24 Jul 31 05:09:20 PM PDT 24 112448946 ps
T932 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.3207648963 Jul 31 05:09:40 PM PDT 24 Jul 31 05:09:41 PM PDT 24 84227260 ps
T933 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.3756695312 Jul 31 05:09:25 PM PDT 24 Jul 31 05:09:26 PM PDT 24 468014084 ps
T934 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.3123209735 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:37 PM PDT 24 13365949 ps
T935 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.3979108593 Jul 31 05:09:16 PM PDT 24 Jul 31 05:09:32 PM PDT 24 1379842362 ps
T936 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.804174357 Jul 31 05:09:32 PM PDT 24 Jul 31 05:09:34 PM PDT 24 39103117 ps
T937 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.4184571371 Jul 31 05:09:34 PM PDT 24 Jul 31 05:09:35 PM PDT 24 31756473 ps
T938 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.405396858 Jul 31 05:09:47 PM PDT 24 Jul 31 05:09:49 PM PDT 24 59871774 ps
T939 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.3611203167 Jul 31 05:09:34 PM PDT 24 Jul 31 05:09:38 PM PDT 24 1825615072 ps
T940 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.4017704394 Jul 31 05:09:16 PM PDT 24 Jul 31 05:09:17 PM PDT 24 53950350 ps
T111 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.743073061 Jul 31 05:09:39 PM PDT 24 Jul 31 05:09:43 PM PDT 24 138253780 ps
T941 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.1775029826 Jul 31 05:09:17 PM PDT 24 Jul 31 05:09:19 PM PDT 24 168710027 ps
T113 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.2685173680 Jul 31 05:09:37 PM PDT 24 Jul 31 05:09:41 PM PDT 24 1613770601 ps
T119 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.2028929138 Jul 31 05:09:26 PM PDT 24 Jul 31 05:09:29 PM PDT 24 62844580 ps
T942 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.1800381550 Jul 31 05:09:21 PM PDT 24 Jul 31 05:09:26 PM PDT 24 743975916 ps
T943 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.2690532250 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:31 PM PDT 24 1044663120 ps
T120 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.2712536345 Jul 31 05:09:15 PM PDT 24 Jul 31 05:09:17 PM PDT 24 561925506 ps
T944 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.1885841218 Jul 31 05:09:27 PM PDT 24 Jul 31 05:09:29 PM PDT 24 100465919 ps
T98 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.1826776306 Jul 31 05:09:32 PM PDT 24 Jul 31 05:09:34 PM PDT 24 196455312 ps
T945 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.3636617766 Jul 31 05:09:18 PM PDT 24 Jul 31 05:09:19 PM PDT 24 43302595 ps
T946 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.2547780202 Jul 31 05:09:21 PM PDT 24 Jul 31 05:09:23 PM PDT 24 335572011 ps
T947 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.952985086 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:34 PM PDT 24 446554019 ps
T179 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.3593740754 Jul 31 05:09:19 PM PDT 24 Jul 31 05:09:20 PM PDT 24 91321776 ps
T948 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.861052918 Jul 31 05:09:13 PM PDT 24 Jul 31 05:09:32 PM PDT 24 5066798392 ps
T949 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.3802271421 Jul 31 05:09:13 PM PDT 24 Jul 31 05:09:18 PM PDT 24 204829124 ps
T180 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.1437341967 Jul 31 05:09:15 PM PDT 24 Jul 31 05:09:16 PM PDT 24 21303624 ps
T950 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.503826734 Jul 31 05:09:18 PM PDT 24 Jul 31 05:09:20 PM PDT 24 25072676 ps
T951 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.2061382211 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:26 PM PDT 24 47953795 ps
T181 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.3704308767 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:25 PM PDT 24 44915829 ps
T952 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.4056279610 Jul 31 05:09:17 PM PDT 24 Jul 31 05:09:20 PM PDT 24 620177257 ps
T102 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.882809219 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:37 PM PDT 24 68663984 ps
T953 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.943419676 Jul 31 05:09:13 PM PDT 24 Jul 31 05:09:15 PM PDT 24 307522813 ps
T954 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.3731587482 Jul 31 05:09:20 PM PDT 24 Jul 31 05:09:30 PM PDT 24 3197289607 ps
T955 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.3872097032 Jul 31 05:09:39 PM PDT 24 Jul 31 05:09:41 PM PDT 24 27632956 ps
T956 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.2108363413 Jul 31 05:09:29 PM PDT 24 Jul 31 05:09:30 PM PDT 24 20962677 ps
T957 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.935266776 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:27 PM PDT 24 558631122 ps
T182 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.92810061 Jul 31 05:09:34 PM PDT 24 Jul 31 05:09:35 PM PDT 24 24295642 ps
T958 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.3561642871 Jul 31 05:09:33 PM PDT 24 Jul 31 05:09:34 PM PDT 24 26814466 ps
T959 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2185326600 Jul 31 05:09:41 PM PDT 24 Jul 31 05:09:47 PM PDT 24 941384850 ps
T960 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.1801563690 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:39 PM PDT 24 79561013 ps
T961 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.3247267097 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:38 PM PDT 24 32101373 ps
T962 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.3316595979 Jul 31 05:09:19 PM PDT 24 Jul 31 05:09:24 PM PDT 24 511196158 ps
T183 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.2504316276 Jul 31 05:09:27 PM PDT 24 Jul 31 05:09:28 PM PDT 24 136006385 ps
T963 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.1560384091 Jul 31 05:09:26 PM PDT 24 Jul 31 05:09:31 PM PDT 24 3841041411 ps
T184 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.3739035446 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:25 PM PDT 24 32932031 ps
T116 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.3073998748 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:37 PM PDT 24 705673878 ps
T964 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.3519160201 Jul 31 05:09:41 PM PDT 24 Jul 31 05:09:43 PM PDT 24 19160971 ps
T965 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.748577925 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:36 PM PDT 24 28655200 ps
T966 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.3811823912 Jul 31 05:09:12 PM PDT 24 Jul 31 05:09:14 PM PDT 24 14032916 ps
T967 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.3327381548 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:37 PM PDT 24 26110150 ps
T968 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.3944282146 Jul 31 05:09:26 PM PDT 24 Jul 31 05:09:28 PM PDT 24 39502787 ps
T122 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.1485946096 Jul 31 05:09:33 PM PDT 24 Jul 31 05:09:36 PM PDT 24 45023856 ps
T110 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1624412840 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:29 PM PDT 24 106341918 ps
T969 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.2337038099 Jul 31 05:09:19 PM PDT 24 Jul 31 05:09:36 PM PDT 24 1398037184 ps
T970 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.1021456490 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:38 PM PDT 24 736220491 ps
T971 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.2158925972 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:37 PM PDT 24 136341110 ps
T188 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.3425678244 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:25 PM PDT 24 51912058 ps
T972 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.1081442443 Jul 31 05:09:41 PM PDT 24 Jul 31 05:09:42 PM PDT 24 41994567 ps
T973 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.406356154 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:37 PM PDT 24 15871288 ps
T974 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.3049846780 Jul 31 05:09:14 PM PDT 24 Jul 31 05:09:20 PM PDT 24 1474761392 ps
T185 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.226975730 Jul 31 05:09:17 PM PDT 24 Jul 31 05:09:19 PM PDT 24 70381775 ps
T975 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.781005974 Jul 31 05:09:12 PM PDT 24 Jul 31 05:09:14 PM PDT 24 88978594 ps
T117 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.2965917845 Jul 31 05:09:25 PM PDT 24 Jul 31 05:09:28 PM PDT 24 215192314 ps
T976 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.3961141513 Jul 31 05:09:27 PM PDT 24 Jul 31 05:09:28 PM PDT 24 46585533 ps
T977 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.3846044241 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:26 PM PDT 24 74818336 ps
T114 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.2907307171 Jul 31 05:09:34 PM PDT 24 Jul 31 05:09:36 PM PDT 24 138353282 ps
T978 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.4041446007 Jul 31 05:09:30 PM PDT 24 Jul 31 05:09:42 PM PDT 24 627466536 ps
T979 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.2260680427 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:25 PM PDT 24 50394158 ps
T189 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.146617285 Jul 31 05:09:32 PM PDT 24 Jul 31 05:09:33 PM PDT 24 12865986 ps
T980 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4277257795 Jul 31 05:09:19 PM PDT 24 Jul 31 05:09:22 PM PDT 24 677942203 ps
T981 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.647052929 Jul 31 05:09:41 PM PDT 24 Jul 31 05:09:43 PM PDT 24 76293798 ps
T982 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.4016243685 Jul 31 05:09:34 PM PDT 24 Jul 31 05:09:36 PM PDT 24 61118909 ps
T983 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.1402670464 Jul 31 05:09:30 PM PDT 24 Jul 31 05:09:45 PM PDT 24 5652323556 ps
T984 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.2507756698 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:37 PM PDT 24 16618545 ps
T985 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.2980018118 Jul 31 05:09:24 PM PDT 24 Jul 31 05:09:27 PM PDT 24 160288376 ps
T986 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.1517609821 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:24 PM PDT 24 711832748 ps
T987 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.2005286426 Jul 31 05:09:33 PM PDT 24 Jul 31 05:09:35 PM PDT 24 119781086 ps
T988 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.1119043219 Jul 31 05:09:40 PM PDT 24 Jul 31 05:09:42 PM PDT 24 233487971 ps
T989 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.1421480034 Jul 31 05:09:29 PM PDT 24 Jul 31 05:09:31 PM PDT 24 99346465 ps
T186 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.1470054226 Jul 31 05:09:22 PM PDT 24 Jul 31 05:09:23 PM PDT 24 91083949 ps
T990 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.4029266271 Jul 31 05:09:20 PM PDT 24 Jul 31 05:09:22 PM PDT 24 65765980 ps
T991 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.2670144174 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:37 PM PDT 24 113726348 ps
T992 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.3612583576 Jul 31 05:09:23 PM PDT 24 Jul 31 05:09:25 PM PDT 24 16521841 ps
T993 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.3474302092 Jul 31 05:09:19 PM PDT 24 Jul 31 05:09:20 PM PDT 24 19001789 ps
T112 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.2112839176 Jul 31 05:09:35 PM PDT 24 Jul 31 05:09:38 PM PDT 24 73163306 ps
T994 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1954469021 Jul 31 05:09:38 PM PDT 24 Jul 31 05:09:40 PM PDT 24 87634015 ps
T107 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.935845196 Jul 31 05:09:44 PM PDT 24 Jul 31 05:09:46 PM PDT 24 45346681 ps
T187 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.4060863252 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:37 PM PDT 24 64666154 ps
T995 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.3258610959 Jul 31 05:09:33 PM PDT 24 Jul 31 05:09:35 PM PDT 24 198771595 ps
T996 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.791741194 Jul 31 05:09:18 PM PDT 24 Jul 31 05:09:20 PM PDT 24 101652320 ps
T997 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.2545146924 Jul 31 05:09:41 PM PDT 24 Jul 31 05:09:42 PM PDT 24 27621122 ps
T998 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.257934327 Jul 31 05:09:18 PM PDT 24 Jul 31 05:09:20 PM PDT 24 75593130 ps
T999 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.184410986 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:41 PM PDT 24 128556757 ps
T1000 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.3231423918 Jul 31 05:09:13 PM PDT 24 Jul 31 05:09:15 PM PDT 24 124784219 ps
T1001 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.3079824032 Jul 31 05:09:36 PM PDT 24 Jul 31 05:09:37 PM PDT 24 16307262 ps
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