Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.23 97.92 95.75 93.40 100.00 98.52 98.76 96.29


Total test records in report: 1002
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T811 /workspace/coverage/default/20.lc_ctrl_stress_all_with_rand_reset.3442302361 Aug 07 07:00:29 PM PDT 24 Aug 07 07:13:52 PM PDT 24 155320756099 ps
T812 /workspace/coverage/default/29.lc_ctrl_state_post_trans.33538057 Aug 07 07:00:57 PM PDT 24 Aug 07 07:01:06 PM PDT 24 158923028 ps
T813 /workspace/coverage/default/3.lc_ctrl_jtag_access.252754266 Aug 07 06:58:18 PM PDT 24 Aug 07 06:58:33 PM PDT 24 1198491814 ps
T814 /workspace/coverage/default/7.lc_ctrl_stress_all.2552441380 Aug 07 06:59:03 PM PDT 24 Aug 07 07:01:59 PM PDT 24 8351604712 ps
T815 /workspace/coverage/default/4.lc_ctrl_claim_transition_if.255369254 Aug 07 06:58:22 PM PDT 24 Aug 07 06:58:23 PM PDT 24 12173498 ps
T816 /workspace/coverage/default/40.lc_ctrl_volatile_unlock_smoke.977090889 Aug 07 07:01:32 PM PDT 24 Aug 07 07:01:33 PM PDT 24 67339082 ps
T817 /workspace/coverage/default/24.lc_ctrl_errors.4180703468 Aug 07 07:00:41 PM PDT 24 Aug 07 07:00:58 PM PDT 24 2168136449 ps
T818 /workspace/coverage/default/29.lc_ctrl_sec_mubi.2257644880 Aug 07 07:01:01 PM PDT 24 Aug 07 07:01:17 PM PDT 24 1007847218 ps
T819 /workspace/coverage/default/15.lc_ctrl_jtag_errors.379075123 Aug 07 07:00:08 PM PDT 24 Aug 07 07:00:34 PM PDT 24 6313235803 ps
T820 /workspace/coverage/default/44.lc_ctrl_stress_all.3908330521 Aug 07 07:02:00 PM PDT 24 Aug 07 07:05:55 PM PDT 24 25782474252 ps
T821 /workspace/coverage/default/18.lc_ctrl_jtag_smoke.334387179 Aug 07 07:00:18 PM PDT 24 Aug 07 07:00:20 PM PDT 24 220737912 ps
T822 /workspace/coverage/default/46.lc_ctrl_prog_failure.2221368058 Aug 07 07:02:10 PM PDT 24 Aug 07 07:02:13 PM PDT 24 55511777 ps
T823 /workspace/coverage/default/10.lc_ctrl_jtag_smoke.3930493035 Aug 07 06:59:32 PM PDT 24 Aug 07 06:59:39 PM PDT 24 1360630115 ps
T824 /workspace/coverage/default/2.lc_ctrl_errors.318784873 Aug 07 06:58:05 PM PDT 24 Aug 07 06:58:18 PM PDT 24 1417927854 ps
T825 /workspace/coverage/default/32.lc_ctrl_stress_all.1350965461 Aug 07 07:01:03 PM PDT 24 Aug 07 07:06:32 PM PDT 24 94189182041 ps
T826 /workspace/coverage/default/15.lc_ctrl_sec_mubi.304066042 Aug 07 07:00:09 PM PDT 24 Aug 07 07:00:23 PM PDT 24 1337287425 ps
T827 /workspace/coverage/default/16.lc_ctrl_sec_mubi.1786517361 Aug 07 07:00:08 PM PDT 24 Aug 07 07:00:22 PM PDT 24 275603219 ps
T828 /workspace/coverage/default/24.lc_ctrl_sec_token_digest.953836258 Aug 07 07:00:42 PM PDT 24 Aug 07 07:00:50 PM PDT 24 284270945 ps
T829 /workspace/coverage/default/5.lc_ctrl_sec_mubi.2522705742 Aug 07 06:58:38 PM PDT 24 Aug 07 06:58:49 PM PDT 24 667018372 ps
T830 /workspace/coverage/default/44.lc_ctrl_state_post_trans.4091659215 Aug 07 07:01:56 PM PDT 24 Aug 07 07:02:04 PM PDT 24 232573820 ps
T831 /workspace/coverage/default/2.lc_ctrl_volatile_unlock_smoke.3659561792 Aug 07 06:58:01 PM PDT 24 Aug 07 06:58:02 PM PDT 24 21164707 ps
T832 /workspace/coverage/default/3.lc_ctrl_sec_mubi.2492531671 Aug 07 06:58:15 PM PDT 24 Aug 07 06:58:28 PM PDT 24 351419912 ps
T833 /workspace/coverage/default/18.lc_ctrl_sec_mubi.3110413934 Aug 07 07:00:19 PM PDT 24 Aug 07 07:00:31 PM PDT 24 1933569599 ps
T834 /workspace/coverage/default/10.lc_ctrl_jtag_state_post_trans.1745520762 Aug 07 06:59:33 PM PDT 24 Aug 07 06:59:47 PM PDT 24 617977003 ps
T835 /workspace/coverage/default/17.lc_ctrl_alert_test.1992023888 Aug 07 07:00:14 PM PDT 24 Aug 07 07:00:15 PM PDT 24 37942801 ps
T836 /workspace/coverage/default/41.lc_ctrl_security_escalation.2523874733 Aug 07 07:01:37 PM PDT 24 Aug 07 07:01:47 PM PDT 24 5281238062 ps
T837 /workspace/coverage/default/9.lc_ctrl_state_failure.1348210132 Aug 07 06:59:28 PM PDT 24 Aug 07 07:00:02 PM PDT 24 1517603312 ps
T838 /workspace/coverage/default/17.lc_ctrl_jtag_errors.3852678747 Aug 07 07:00:14 PM PDT 24 Aug 07 07:00:53 PM PDT 24 9083174283 ps
T839 /workspace/coverage/default/11.lc_ctrl_smoke.2067550196 Aug 07 06:59:36 PM PDT 24 Aug 07 06:59:39 PM PDT 24 63364265 ps
T840 /workspace/coverage/default/2.lc_ctrl_regwen_during_op.421907690 Aug 07 06:58:06 PM PDT 24 Aug 07 06:58:16 PM PDT 24 356140645 ps
T841 /workspace/coverage/default/26.lc_ctrl_state_post_trans.2924438777 Aug 07 07:00:47 PM PDT 24 Aug 07 07:00:55 PM PDT 24 173253265 ps
T842 /workspace/coverage/default/47.lc_ctrl_prog_failure.3707446742 Aug 07 07:02:14 PM PDT 24 Aug 07 07:02:16 PM PDT 24 38267032 ps
T843 /workspace/coverage/default/3.lc_ctrl_jtag_state_failure.2398749422 Aug 07 06:58:14 PM PDT 24 Aug 07 07:00:22 PM PDT 24 4273259993 ps
T844 /workspace/coverage/default/18.lc_ctrl_jtag_access.3013783537 Aug 07 07:00:18 PM PDT 24 Aug 07 07:00:23 PM PDT 24 972514859 ps
T845 /workspace/coverage/default/13.lc_ctrl_sec_token_digest.2022767051 Aug 07 06:59:58 PM PDT 24 Aug 07 07:00:12 PM PDT 24 3418550968 ps
T846 /workspace/coverage/default/9.lc_ctrl_smoke.3026387106 Aug 07 06:59:18 PM PDT 24 Aug 07 06:59:21 PM PDT 24 42213745 ps
T847 /workspace/coverage/default/16.lc_ctrl_jtag_state_post_trans.3725863081 Aug 07 07:00:07 PM PDT 24 Aug 07 07:00:33 PM PDT 24 8196277504 ps
T848 /workspace/coverage/default/14.lc_ctrl_jtag_errors.2780697475 Aug 07 07:00:05 PM PDT 24 Aug 07 07:01:45 PM PDT 24 3702437252 ps
T849 /workspace/coverage/default/45.lc_ctrl_volatile_unlock_smoke.2746220078 Aug 07 07:01:56 PM PDT 24 Aug 07 07:01:57 PM PDT 24 18886060 ps
T850 /workspace/coverage/default/18.lc_ctrl_volatile_unlock_smoke.719368609 Aug 07 07:00:16 PM PDT 24 Aug 07 07:00:17 PM PDT 24 11494285 ps
T851 /workspace/coverage/default/28.lc_ctrl_sec_token_mux.620815145 Aug 07 07:00:57 PM PDT 24 Aug 07 07:01:07 PM PDT 24 385038100 ps
T852 /workspace/coverage/default/3.lc_ctrl_alert_test.2024242524 Aug 07 06:58:25 PM PDT 24 Aug 07 06:58:26 PM PDT 24 20060391 ps
T853 /workspace/coverage/default/10.lc_ctrl_state_failure.2675373700 Aug 07 06:59:29 PM PDT 24 Aug 07 06:59:58 PM PDT 24 535851631 ps
T854 /workspace/coverage/default/40.lc_ctrl_sec_token_digest.1238414165 Aug 07 07:01:36 PM PDT 24 Aug 07 07:01:49 PM PDT 24 1031268368 ps
T855 /workspace/coverage/default/21.lc_ctrl_sec_token_digest.1505843648 Aug 07 07:00:30 PM PDT 24 Aug 07 07:00:42 PM PDT 24 1349585745 ps
T856 /workspace/coverage/default/48.lc_ctrl_prog_failure.1365767699 Aug 07 07:02:23 PM PDT 24 Aug 07 07:02:25 PM PDT 24 32512487 ps
T857 /workspace/coverage/default/1.lc_ctrl_state_post_trans.865938044 Aug 07 06:57:52 PM PDT 24 Aug 07 06:58:01 PM PDT 24 364585495 ps
T858 /workspace/coverage/default/41.lc_ctrl_sec_token_digest.1042818061 Aug 07 07:01:39 PM PDT 24 Aug 07 07:01:51 PM PDT 24 310176117 ps
T859 /workspace/coverage/default/21.lc_ctrl_security_escalation.3127683825 Aug 07 07:00:31 PM PDT 24 Aug 07 07:00:38 PM PDT 24 156012260 ps
T860 /workspace/coverage/default/15.lc_ctrl_sec_token_mux.232854528 Aug 07 07:00:08 PM PDT 24 Aug 07 07:00:19 PM PDT 24 376310863 ps
T861 /workspace/coverage/default/29.lc_ctrl_prog_failure.3163383385 Aug 07 07:00:56 PM PDT 24 Aug 07 07:00:59 PM PDT 24 63996325 ps
T102 /workspace/coverage/default/19.lc_ctrl_stress_all_with_rand_reset.4034383404 Aug 07 07:00:29 PM PDT 24 Aug 07 07:10:00 PM PDT 24 12899963792 ps
T862 /workspace/coverage/default/45.lc_ctrl_state_post_trans.2231205893 Aug 07 07:01:57 PM PDT 24 Aug 07 07:02:06 PM PDT 24 311926642 ps
T863 /workspace/coverage/default/47.lc_ctrl_sec_token_digest.909013918 Aug 07 07:02:21 PM PDT 24 Aug 07 07:02:36 PM PDT 24 831047176 ps
T864 /workspace/coverage/default/40.lc_ctrl_stress_all.2243285391 Aug 07 07:01:36 PM PDT 24 Aug 07 07:05:06 PM PDT 24 12380329546 ps
T865 /workspace/coverage/default/48.lc_ctrl_sec_mubi.2660464785 Aug 07 07:02:22 PM PDT 24 Aug 07 07:02:37 PM PDT 24 1475896919 ps
T866 /workspace/coverage/default/38.lc_ctrl_smoke.3675242617 Aug 07 07:01:28 PM PDT 24 Aug 07 07:01:30 PM PDT 24 72077368 ps
T67 /workspace/coverage/default/37.lc_ctrl_stress_all.1397572700 Aug 07 07:01:26 PM PDT 24 Aug 07 07:02:09 PM PDT 24 11077035808 ps
T867 /workspace/coverage/default/8.lc_ctrl_sec_token_digest.2699699025 Aug 07 06:59:18 PM PDT 24 Aug 07 06:59:25 PM PDT 24 231308698 ps
T868 /workspace/coverage/default/19.lc_ctrl_prog_failure.2991503431 Aug 07 07:00:21 PM PDT 24 Aug 07 07:00:23 PM PDT 24 71818704 ps
T869 /workspace/coverage/default/11.lc_ctrl_security_escalation.365145368 Aug 07 06:59:38 PM PDT 24 Aug 07 06:59:52 PM PDT 24 1429992029 ps
T870 /workspace/coverage/default/18.lc_ctrl_jtag_state_failure.1557179878 Aug 07 07:00:16 PM PDT 24 Aug 07 07:01:19 PM PDT 24 3523895825 ps
T871 /workspace/coverage/default/12.lc_ctrl_jtag_smoke.1063244364 Aug 07 06:59:49 PM PDT 24 Aug 07 07:00:04 PM PDT 24 590381262 ps
T872 /workspace/coverage/default/27.lc_ctrl_volatile_unlock_smoke.2567637133 Aug 07 07:00:51 PM PDT 24 Aug 07 07:00:52 PM PDT 24 76462551 ps
T873 /workspace/coverage/default/0.lc_ctrl_state_failure.4229253423 Aug 07 06:57:37 PM PDT 24 Aug 07 06:57:54 PM PDT 24 186372438 ps
T874 /workspace/coverage/default/38.lc_ctrl_sec_mubi.1560571533 Aug 07 07:01:34 PM PDT 24 Aug 07 07:01:46 PM PDT 24 1784483846 ps
T875 /workspace/coverage/default/4.lc_ctrl_state_post_trans.3160000701 Aug 07 06:58:22 PM PDT 24 Aug 07 06:58:30 PM PDT 24 168693174 ps
T105 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1323355427 Aug 07 06:53:22 PM PDT 24 Aug 07 06:53:24 PM PDT 24 118170259 ps
T110 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.1697404766 Aug 07 06:54:12 PM PDT 24 Aug 07 06:54:13 PM PDT 24 18091217 ps
T111 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.262867743 Aug 07 06:54:17 PM PDT 24 Aug 07 06:54:18 PM PDT 24 24678937 ps
T135 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.3020497468 Aug 07 06:53:59 PM PDT 24 Aug 07 06:54:12 PM PDT 24 2763102576 ps
T103 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.2166070854 Aug 07 06:53:58 PM PDT 24 Aug 07 06:54:01 PM PDT 24 31160439 ps
T141 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.3791188932 Aug 07 06:53:58 PM PDT 24 Aug 07 06:53:59 PM PDT 24 29936433 ps
T104 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.3914264648 Aug 07 06:53:57 PM PDT 24 Aug 07 06:53:59 PM PDT 24 222700626 ps
T134 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.1716416665 Aug 07 06:53:57 PM PDT 24 Aug 07 06:53:59 PM PDT 24 151153976 ps
T106 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.1629593843 Aug 07 06:53:32 PM PDT 24 Aug 07 06:53:36 PM PDT 24 82086442 ps
T177 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.3747792343 Aug 07 06:53:22 PM PDT 24 Aug 07 06:53:23 PM PDT 24 22443919 ps
T178 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.1772772098 Aug 07 06:53:56 PM PDT 24 Aug 07 06:53:57 PM PDT 24 158811493 ps
T121 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.207627654 Aug 07 06:54:13 PM PDT 24 Aug 07 06:54:14 PM PDT 24 502252669 ps
T163 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.3242603003 Aug 07 06:54:13 PM PDT 24 Aug 07 06:54:14 PM PDT 24 56290334 ps
T146 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.4092507892 Aug 07 06:53:51 PM PDT 24 Aug 07 06:53:52 PM PDT 24 44485725 ps
T142 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.1642577814 Aug 07 06:54:21 PM PDT 24 Aug 07 06:54:22 PM PDT 24 23702153 ps
T133 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.287061643 Aug 07 06:53:56 PM PDT 24 Aug 07 06:54:10 PM PDT 24 2256859409 ps
T876 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.1241518145 Aug 07 06:53:46 PM PDT 24 Aug 07 06:53:51 PM PDT 24 1187692462 ps
T877 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.2462656974 Aug 07 06:53:17 PM PDT 24 Aug 07 06:53:19 PM PDT 24 230093886 ps
T878 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.1664462353 Aug 07 06:53:57 PM PDT 24 Aug 07 06:53:58 PM PDT 24 23597490 ps
T879 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.859452485 Aug 07 06:53:57 PM PDT 24 Aug 07 06:54:02 PM PDT 24 187322315 ps
T880 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.1859207347 Aug 07 06:53:47 PM PDT 24 Aug 07 06:53:49 PM PDT 24 495308438 ps
T107 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.269707953 Aug 07 06:54:02 PM PDT 24 Aug 07 06:54:03 PM PDT 24 69911042 ps
T108 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2481741750 Aug 07 06:53:56 PM PDT 24 Aug 07 06:53:58 PM PDT 24 139785275 ps
T109 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.435415601 Aug 07 06:53:26 PM PDT 24 Aug 07 06:53:28 PM PDT 24 148545092 ps
T164 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.95074719 Aug 07 06:54:07 PM PDT 24 Aug 07 06:54:08 PM PDT 24 14857269 ps
T881 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.2652145722 Aug 07 06:54:01 PM PDT 24 Aug 07 06:54:12 PM PDT 24 949843630 ps
T127 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.155690879 Aug 07 06:53:58 PM PDT 24 Aug 07 06:54:01 PM PDT 24 1220301160 ps
T114 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.1744790255 Aug 07 06:54:17 PM PDT 24 Aug 07 06:54:19 PM PDT 24 67350519 ps
T882 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.1088530283 Aug 07 06:53:21 PM PDT 24 Aug 07 06:53:22 PM PDT 24 45466895 ps
T883 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.781158339 Aug 07 06:53:40 PM PDT 24 Aug 07 06:53:52 PM PDT 24 964107663 ps
T884 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.4151271900 Aug 07 06:53:51 PM PDT 24 Aug 07 06:53:55 PM PDT 24 168704505 ps
T885 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.1501734378 Aug 07 06:53:51 PM PDT 24 Aug 07 06:53:56 PM PDT 24 1858833592 ps
T115 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.1392751539 Aug 07 06:54:07 PM PDT 24 Aug 07 06:54:09 PM PDT 24 52288394 ps
T122 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.1105988564 Aug 07 06:54:07 PM PDT 24 Aug 07 06:54:11 PM PDT 24 414807504 ps
T143 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.322147187 Aug 07 06:54:10 PM PDT 24 Aug 07 06:54:12 PM PDT 24 149599397 ps
T116 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.871204472 Aug 07 06:53:45 PM PDT 24 Aug 07 06:53:49 PM PDT 24 48364792 ps
T179 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.541044069 Aug 07 06:54:07 PM PDT 24 Aug 07 06:54:08 PM PDT 24 12884497 ps
T112 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.1998147645 Aug 07 06:54:18 PM PDT 24 Aug 07 06:54:21 PM PDT 24 140913484 ps
T886 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.725797079 Aug 07 06:53:28 PM PDT 24 Aug 07 06:53:29 PM PDT 24 51398227 ps
T887 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.2257803873 Aug 07 06:53:56 PM PDT 24 Aug 07 06:53:57 PM PDT 24 55452996 ps
T144 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1063148105 Aug 07 06:53:35 PM PDT 24 Aug 07 06:53:37 PM PDT 24 73134528 ps
T165 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.2631498414 Aug 07 06:53:16 PM PDT 24 Aug 07 06:53:17 PM PDT 24 23330184 ps
T888 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.2338869088 Aug 07 06:53:41 PM PDT 24 Aug 07 06:54:21 PM PDT 24 3561307390 ps
T145 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.3086893125 Aug 07 06:53:57 PM PDT 24 Aug 07 06:53:58 PM PDT 24 43574400 ps
T889 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.1746861541 Aug 07 06:53:26 PM PDT 24 Aug 07 06:53:28 PM PDT 24 51840115 ps
T180 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.3012755378 Aug 07 06:53:26 PM PDT 24 Aug 07 06:53:27 PM PDT 24 17624922 ps
T890 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.2881511505 Aug 07 06:54:00 PM PDT 24 Aug 07 06:54:05 PM PDT 24 1459818976 ps
T891 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.1384738031 Aug 07 06:53:57 PM PDT 24 Aug 07 06:54:08 PM PDT 24 799391237 ps
T181 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.844139263 Aug 07 06:53:35 PM PDT 24 Aug 07 06:53:36 PM PDT 24 110088102 ps
T892 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.74502986 Aug 07 06:54:12 PM PDT 24 Aug 07 06:54:14 PM PDT 24 17828365 ps
T893 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.2127178638 Aug 07 06:53:59 PM PDT 24 Aug 07 06:54:00 PM PDT 24 97739065 ps
T117 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.4002168429 Aug 07 06:54:13 PM PDT 24 Aug 07 06:54:17 PM PDT 24 476770188 ps
T894 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.3524218823 Aug 07 06:54:08 PM PDT 24 Aug 07 06:54:09 PM PDT 24 31077457 ps
T895 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.1769775573 Aug 07 06:54:17 PM PDT 24 Aug 07 06:54:18 PM PDT 24 89634687 ps
T166 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.2234620217 Aug 07 06:53:32 PM PDT 24 Aug 07 06:53:33 PM PDT 24 16156912 ps
T896 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.2628261300 Aug 07 06:53:24 PM PDT 24 Aug 07 06:53:26 PM PDT 24 89481896 ps
T118 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.2137640736 Aug 07 06:54:14 PM PDT 24 Aug 07 06:54:18 PM PDT 24 249672185 ps
T897 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.3638647303 Aug 07 06:53:54 PM PDT 24 Aug 07 06:53:57 PM PDT 24 274137778 ps
T898 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.1138265868 Aug 07 06:54:02 PM PDT 24 Aug 07 06:54:03 PM PDT 24 144248032 ps
T899 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.3507105393 Aug 07 06:53:36 PM PDT 24 Aug 07 06:53:37 PM PDT 24 37608943 ps
T900 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.771021967 Aug 07 06:53:37 PM PDT 24 Aug 07 06:53:43 PM PDT 24 190548690 ps
T901 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.3806937429 Aug 07 06:54:02 PM PDT 24 Aug 07 06:54:03 PM PDT 24 440091030 ps
T902 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.3377086746 Aug 07 06:53:35 PM PDT 24 Aug 07 06:53:41 PM PDT 24 608609255 ps
T903 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.641929028 Aug 07 06:54:22 PM PDT 24 Aug 07 06:54:25 PM PDT 24 60214942 ps
T904 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.1444461363 Aug 07 06:54:18 PM PDT 24 Aug 07 06:54:19 PM PDT 24 43229181 ps
T132 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.3908847655 Aug 07 06:53:52 PM PDT 24 Aug 07 06:53:54 PM PDT 24 89107683 ps
T905 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.1280359843 Aug 07 06:53:58 PM PDT 24 Aug 07 06:54:01 PM PDT 24 166059397 ps
T906 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.1884482788 Aug 07 06:53:26 PM PDT 24 Aug 07 06:53:27 PM PDT 24 13715975 ps
T907 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.4047759346 Aug 07 06:53:18 PM PDT 24 Aug 07 06:53:20 PM PDT 24 185178040 ps
T908 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.3666773010 Aug 07 06:53:41 PM PDT 24 Aug 07 06:53:43 PM PDT 24 48655282 ps
T909 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.3211902860 Aug 07 06:54:12 PM PDT 24 Aug 07 06:54:13 PM PDT 24 13276325 ps
T167 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.899319386 Aug 07 06:54:24 PM PDT 24 Aug 07 06:54:25 PM PDT 24 45041632 ps
T910 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.1585090062 Aug 07 06:53:32 PM PDT 24 Aug 07 06:53:35 PM PDT 24 146164778 ps
T168 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.1685749738 Aug 07 06:54:17 PM PDT 24 Aug 07 06:54:19 PM PDT 24 15487279 ps
T911 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.1991879611 Aug 07 06:53:45 PM PDT 24 Aug 07 06:53:46 PM PDT 24 25376869 ps
T912 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.619698428 Aug 07 06:54:22 PM PDT 24 Aug 07 06:54:23 PM PDT 24 39659143 ps
T123 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.3655071082 Aug 07 06:54:18 PM PDT 24 Aug 07 06:54:20 PM PDT 24 53831866 ps
T913 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.3546420406 Aug 07 06:53:51 PM PDT 24 Aug 07 06:53:54 PM PDT 24 35527728 ps
T914 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.1587855833 Aug 07 06:54:11 PM PDT 24 Aug 07 06:54:13 PM PDT 24 174742100 ps
T915 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.905518602 Aug 07 06:53:30 PM PDT 24 Aug 07 06:53:31 PM PDT 24 53553697 ps
T916 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.4196387349 Aug 07 06:53:16 PM PDT 24 Aug 07 06:53:32 PM PDT 24 3192811304 ps
T917 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.3172796531 Aug 07 06:53:51 PM PDT 24 Aug 07 06:54:40 PM PDT 24 2195842393 ps
T918 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.961460321 Aug 07 06:53:32 PM PDT 24 Aug 07 06:53:34 PM PDT 24 178761265 ps
T919 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.3235309178 Aug 07 06:54:16 PM PDT 24 Aug 07 06:54:18 PM PDT 24 19012911 ps
T126 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.1416136364 Aug 07 06:53:48 PM PDT 24 Aug 07 06:53:50 PM PDT 24 234121517 ps
T920 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.1904564344 Aug 07 06:54:12 PM PDT 24 Aug 07 06:54:13 PM PDT 24 57317234 ps
T921 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.1844422053 Aug 07 06:53:35 PM PDT 24 Aug 07 06:53:37 PM PDT 24 294270740 ps
T113 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.2253558110 Aug 07 06:53:17 PM PDT 24 Aug 07 06:53:20 PM PDT 24 75132446 ps
T922 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.4029692560 Aug 07 06:53:16 PM PDT 24 Aug 07 06:53:17 PM PDT 24 50013227 ps
T923 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.1285507830 Aug 07 06:54:13 PM PDT 24 Aug 07 06:54:16 PM PDT 24 70295131 ps
T924 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.3091298625 Aug 07 06:54:02 PM PDT 24 Aug 07 06:54:15 PM PDT 24 9303961874 ps
T925 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.2689358987 Aug 07 06:53:47 PM PDT 24 Aug 07 06:53:48 PM PDT 24 82645706 ps
T926 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.3893407246 Aug 07 06:54:02 PM PDT 24 Aug 07 06:54:02 PM PDT 24 142181562 ps
T927 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3110245094 Aug 07 06:53:53 PM PDT 24 Aug 07 06:53:56 PM PDT 24 180472925 ps
T928 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3338452104 Aug 07 06:53:56 PM PDT 24 Aug 07 06:53:58 PM PDT 24 200611184 ps
T929 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.3181951153 Aug 07 06:53:28 PM PDT 24 Aug 07 06:53:34 PM PDT 24 732728188 ps
T930 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.3808543982 Aug 07 06:54:01 PM PDT 24 Aug 07 06:54:03 PM PDT 24 170656209 ps
T931 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.3083310218 Aug 07 06:54:13 PM PDT 24 Aug 07 06:54:15 PM PDT 24 78958292 ps
T932 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.3002987736 Aug 07 06:53:51 PM PDT 24 Aug 07 06:53:55 PM PDT 24 533435729 ps
T933 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.2752786201 Aug 07 06:53:21 PM PDT 24 Aug 07 06:53:22 PM PDT 24 17193900 ps
T934 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.4056142810 Aug 07 06:53:52 PM PDT 24 Aug 07 06:53:53 PM PDT 24 24182824 ps
T935 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.2104506896 Aug 07 06:53:41 PM PDT 24 Aug 07 06:53:42 PM PDT 24 97659005 ps
T936 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.4148230781 Aug 07 06:53:17 PM PDT 24 Aug 07 06:53:19 PM PDT 24 363095971 ps
T937 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.3849667849 Aug 07 06:53:20 PM PDT 24 Aug 07 06:53:21 PM PDT 24 92136405 ps
T938 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.3081286417 Aug 07 06:53:27 PM PDT 24 Aug 07 06:53:28 PM PDT 24 21384879 ps
T939 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.2072760963 Aug 07 06:54:21 PM PDT 24 Aug 07 06:54:22 PM PDT 24 208669424 ps
T129 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.2786547741 Aug 07 06:53:51 PM PDT 24 Aug 07 06:53:54 PM PDT 24 326482627 ps
T940 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.4045231114 Aug 07 06:54:13 PM PDT 24 Aug 07 06:54:14 PM PDT 24 52561693 ps
T941 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.608085183 Aug 07 06:53:40 PM PDT 24 Aug 07 06:53:42 PM PDT 24 201946509 ps
T942 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.671477867 Aug 07 06:53:45 PM PDT 24 Aug 07 06:53:47 PM PDT 24 105144311 ps
T130 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.1209419201 Aug 07 06:54:18 PM PDT 24 Aug 07 06:54:20 PM PDT 24 196287674 ps
T169 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.3317691253 Aug 07 06:53:46 PM PDT 24 Aug 07 06:53:47 PM PDT 24 19538822 ps
T943 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.1116203125 Aug 07 06:53:50 PM PDT 24 Aug 07 06:53:52 PM PDT 24 230632008 ps
T944 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.93470264 Aug 07 06:54:07 PM PDT 24 Aug 07 06:54:09 PM PDT 24 49627441 ps
T945 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.3008183180 Aug 07 06:53:57 PM PDT 24 Aug 07 06:53:59 PM PDT 24 459202232 ps
T946 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.3053341391 Aug 07 06:53:45 PM PDT 24 Aug 07 06:53:48 PM PDT 24 133980221 ps
T947 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.155503083 Aug 07 06:53:27 PM PDT 24 Aug 07 06:53:29 PM PDT 24 84711691 ps
T124 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.2267535194 Aug 07 06:54:18 PM PDT 24 Aug 07 06:54:21 PM PDT 24 44878913 ps
T948 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.2335801943 Aug 07 06:53:58 PM PDT 24 Aug 07 06:54:00 PM PDT 24 158320732 ps
T949 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.310960489 Aug 07 06:53:37 PM PDT 24 Aug 07 06:53:39 PM PDT 24 48039751 ps
T950 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1087971583 Aug 07 06:54:03 PM PDT 24 Aug 07 06:54:05 PM PDT 24 116243570 ps
T951 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.1272073354 Aug 07 06:53:17 PM PDT 24 Aug 07 06:53:19 PM PDT 24 97603188 ps
T952 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.3623890098 Aug 07 06:53:56 PM PDT 24 Aug 07 06:54:01 PM PDT 24 941990103 ps
T170 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.2035930176 Aug 07 06:53:42 PM PDT 24 Aug 07 06:53:43 PM PDT 24 55460938 ps
T953 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.268875791 Aug 07 06:53:22 PM PDT 24 Aug 07 06:53:23 PM PDT 24 167028696 ps
T171 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.2351896963 Aug 07 06:54:03 PM PDT 24 Aug 07 06:54:04 PM PDT 24 84456447 ps
T954 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.139196458 Aug 07 06:53:28 PM PDT 24 Aug 07 06:53:30 PM PDT 24 204236455 ps
T955 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.3184538615 Aug 07 06:54:14 PM PDT 24 Aug 07 06:54:19 PM PDT 24 585172633 ps
T956 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.2086078064 Aug 07 06:53:39 PM PDT 24 Aug 07 06:53:40 PM PDT 24 21088654 ps
T957 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.3063502770 Aug 07 06:53:27 PM PDT 24 Aug 07 06:53:28 PM PDT 24 86286708 ps
T958 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.2436247858 Aug 07 06:53:51 PM PDT 24 Aug 07 06:53:52 PM PDT 24 47947582 ps
T959 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2364953084 Aug 07 06:53:15 PM PDT 24 Aug 07 06:53:18 PM PDT 24 145944459 ps
T960 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.888671918 Aug 07 06:54:18 PM PDT 24 Aug 07 06:54:19 PM PDT 24 103507717 ps
T961 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.1072278135 Aug 07 06:53:22 PM PDT 24 Aug 07 06:53:27 PM PDT 24 8650469065 ps
T962 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.607755753 Aug 07 06:53:52 PM PDT 24 Aug 07 06:53:53 PM PDT 24 15693881 ps
T963 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.3358748257 Aug 07 06:53:46 PM PDT 24 Aug 07 06:53:47 PM PDT 24 69600231 ps
T964 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.2515604790 Aug 07 06:53:36 PM PDT 24 Aug 07 06:53:38 PM PDT 24 39699157 ps
T965 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.2263953381 Aug 07 06:54:24 PM PDT 24 Aug 07 06:54:26 PM PDT 24 53759960 ps
T966 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.2734402107 Aug 07 06:53:23 PM PDT 24 Aug 07 06:53:42 PM PDT 24 1527425210 ps
T172 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.2446305316 Aug 07 06:53:45 PM PDT 24 Aug 07 06:53:46 PM PDT 24 12794192 ps
T120 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.2762896603 Aug 07 06:54:07 PM PDT 24 Aug 07 06:54:11 PM PDT 24 118549836 ps
T967 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.968105359 Aug 07 06:53:36 PM PDT 24 Aug 07 06:53:38 PM PDT 24 92063888 ps
T968 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.59113094 Aug 07 06:54:07 PM PDT 24 Aug 07 06:54:09 PM PDT 24 53911121 ps
T969 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.1331288736 Aug 07 06:53:53 PM PDT 24 Aug 07 06:53:56 PM PDT 24 1041225744 ps
T970 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.996138433 Aug 07 06:54:10 PM PDT 24 Aug 07 06:54:13 PM PDT 24 70129983 ps
T174 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.356204327 Aug 07 06:53:45 PM PDT 24 Aug 07 06:53:46 PM PDT 24 18843867 ps
T971 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.2012296152 Aug 07 06:53:31 PM PDT 24 Aug 07 06:53:33 PM PDT 24 114919325 ps
T972 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.3839660679 Aug 07 06:53:28 PM PDT 24 Aug 07 06:53:30 PM PDT 24 137105828 ps
T973 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.3597325267 Aug 07 06:53:51 PM PDT 24 Aug 07 06:53:53 PM PDT 24 264920769 ps
T974 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.4092028563 Aug 07 06:53:17 PM PDT 24 Aug 07 06:53:18 PM PDT 24 137876774 ps
T975 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.4082409546 Aug 07 06:53:48 PM PDT 24 Aug 07 06:53:49 PM PDT 24 13799078 ps
T976 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3776466987 Aug 07 06:53:51 PM PDT 24 Aug 07 06:53:53 PM PDT 24 450159424 ps
T977 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.4031455693 Aug 07 06:53:26 PM PDT 24 Aug 07 06:53:36 PM PDT 24 352117891 ps
T978 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.208794843 Aug 07 06:54:16 PM PDT 24 Aug 07 06:54:19 PM PDT 24 193239020 ps
T979 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.1246249022 Aug 07 06:54:18 PM PDT 24 Aug 07 06:54:20 PM PDT 24 81087304 ps
T128 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.1080880688 Aug 07 06:54:05 PM PDT 24 Aug 07 06:54:10 PM PDT 24 113404472 ps
T175 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.1481504331 Aug 07 06:53:36 PM PDT 24 Aug 07 06:53:38 PM PDT 24 46431373 ps
T980 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.3449620713 Aug 07 06:54:02 PM PDT 24 Aug 07 06:54:03 PM PDT 24 28116493 ps
T981 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.2201470991 Aug 07 06:54:02 PM PDT 24 Aug 07 06:54:04 PM PDT 24 69127364 ps
T982 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.4091649731 Aug 07 06:54:02 PM PDT 24 Aug 07 06:54:03 PM PDT 24 76855012 ps
T983 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.332234263 Aug 07 06:54:12 PM PDT 24 Aug 07 06:54:14 PM PDT 24 257871032 ps
T984 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.2066990801 Aug 07 06:53:40 PM PDT 24 Aug 07 06:53:41 PM PDT 24 17434292 ps
T985 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.1770978767 Aug 07 06:53:53 PM PDT 24 Aug 07 06:53:55 PM PDT 24 50404631 ps
T986 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.3537968970 Aug 07 06:53:40 PM PDT 24 Aug 07 06:53:42 PM PDT 24 374238673 ps
T987 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.1380300526 Aug 07 06:53:37 PM PDT 24 Aug 07 06:53:56 PM PDT 24 5836157567 ps
T988 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.2338291450 Aug 07 06:53:27 PM PDT 24 Aug 07 06:53:29 PM PDT 24 400056540 ps
T125 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.613584649 Aug 07 06:54:19 PM PDT 24 Aug 07 06:54:23 PM PDT 24 1760810015 ps
T989 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.1380287560 Aug 07 06:53:17 PM PDT 24 Aug 07 06:53:19 PM PDT 24 29408777 ps
T990 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.3193157599 Aug 07 06:54:12 PM PDT 24 Aug 07 06:54:13 PM PDT 24 34956919 ps
T991 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.3778164029 Aug 07 06:53:57 PM PDT 24 Aug 07 06:53:58 PM PDT 24 73992711 ps
T992 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.115880424 Aug 07 06:54:17 PM PDT 24 Aug 07 06:54:19 PM PDT 24 46854415 ps
T993 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.28524154 Aug 07 06:53:50 PM PDT 24 Aug 07 06:53:52 PM PDT 24 46393283 ps
T994 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.397722715 Aug 07 06:54:22 PM PDT 24 Aug 07 06:54:24 PM PDT 24 35501195 ps
T995 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.191847548 Aug 07 06:53:57 PM PDT 24 Aug 07 06:54:00 PM PDT 24 347691461 ps
T996 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.328454621 Aug 07 06:54:01 PM PDT 24 Aug 07 06:54:05 PM PDT 24 527417869 ps
T119 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1037014193 Aug 07 06:53:37 PM PDT 24 Aug 07 06:53:41 PM PDT 24 215271716 ps
T173 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.4203098839 Aug 07 06:54:18 PM PDT 24 Aug 07 06:54:19 PM PDT 24 113342245 ps
T176 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.1038925079 Aug 07 06:53:32 PM PDT 24 Aug 07 06:53:33 PM PDT 24 26910113 ps
T997 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2851533931 Aug 07 06:53:26 PM PDT 24 Aug 07 06:53:29 PM PDT 24 133626209 ps
T998 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.4161487044 Aug 07 06:54:01 PM PDT 24 Aug 07 06:54:03 PM PDT 24 51248969 ps
T999 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.4245534250 Aug 07 06:54:18 PM PDT 24 Aug 07 06:54:19 PM PDT 24 25482034 ps
T1000 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.2656318196 Aug 07 06:53:22 PM PDT 24 Aug 07 06:53:23 PM PDT 24 19362284 ps
T1001 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.1024981259 Aug 07 06:53:17 PM PDT 24 Aug 07 06:53:23 PM PDT 24 694191738 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%