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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.24 97.92 96.03 93.40 100.00 98.52 98.51 96.29


Total test records in report: 1002
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T816 /workspace/coverage/default/6.lc_ctrl_jtag_priority.2168314883 Aug 08 05:52:54 PM PDT 24 Aug 08 05:53:04 PM PDT 24 2859224077 ps
T817 /workspace/coverage/default/25.lc_ctrl_alert_test.2290496246 Aug 08 05:54:27 PM PDT 24 Aug 08 05:54:28 PM PDT 24 54172733 ps
T818 /workspace/coverage/default/3.lc_ctrl_smoke.2630188287 Aug 08 05:52:26 PM PDT 24 Aug 08 05:52:28 PM PDT 24 93700005 ps
T819 /workspace/coverage/default/25.lc_ctrl_stress_all.3900158237 Aug 08 05:54:27 PM PDT 24 Aug 08 05:54:58 PM PDT 24 4375776931 ps
T820 /workspace/coverage/default/29.lc_ctrl_state_failure.178602987 Aug 08 05:54:40 PM PDT 24 Aug 08 05:55:01 PM PDT 24 1342934495 ps
T821 /workspace/coverage/default/14.lc_ctrl_state_post_trans.1437625785 Aug 08 05:53:42 PM PDT 24 Aug 08 05:53:46 PM PDT 24 134907966 ps
T822 /workspace/coverage/default/5.lc_ctrl_jtag_errors.1424559259 Aug 08 05:53:04 PM PDT 24 Aug 08 05:54:41 PM PDT 24 14963556855 ps
T823 /workspace/coverage/default/38.lc_ctrl_alert_test.2142526804 Aug 08 05:55:02 PM PDT 24 Aug 08 05:55:04 PM PDT 24 23228855 ps
T824 /workspace/coverage/default/9.lc_ctrl_sec_token_digest.1188659325 Aug 08 05:53:25 PM PDT 24 Aug 08 05:53:39 PM PDT 24 659810464 ps
T825 /workspace/coverage/default/22.lc_ctrl_sec_token_digest.4096307755 Aug 08 05:54:15 PM PDT 24 Aug 08 05:54:24 PM PDT 24 423117280 ps
T826 /workspace/coverage/default/48.lc_ctrl_errors.1579781640 Aug 08 05:55:31 PM PDT 24 Aug 08 05:55:40 PM PDT 24 486134998 ps
T827 /workspace/coverage/default/20.lc_ctrl_security_escalation.1999856258 Aug 08 05:54:06 PM PDT 24 Aug 08 05:54:15 PM PDT 24 223181982 ps
T828 /workspace/coverage/default/28.lc_ctrl_state_failure.1264178981 Aug 08 05:54:36 PM PDT 24 Aug 08 05:55:01 PM PDT 24 2780144833 ps
T829 /workspace/coverage/default/3.lc_ctrl_jtag_smoke.2540961911 Aug 08 05:52:35 PM PDT 24 Aug 08 05:52:51 PM PDT 24 577288846 ps
T830 /workspace/coverage/default/16.lc_ctrl_errors.1090510279 Aug 08 05:53:45 PM PDT 24 Aug 08 05:53:58 PM PDT 24 4907470215 ps
T831 /workspace/coverage/default/10.lc_ctrl_jtag_access.340871691 Aug 08 05:53:24 PM PDT 24 Aug 08 05:53:29 PM PDT 24 1166803391 ps
T832 /workspace/coverage/default/32.lc_ctrl_sec_mubi.3731890209 Aug 08 05:54:43 PM PDT 24 Aug 08 05:54:57 PM PDT 24 359470204 ps
T833 /workspace/coverage/default/4.lc_ctrl_security_escalation.872766949 Aug 08 05:52:36 PM PDT 24 Aug 08 05:52:46 PM PDT 24 3224128673 ps
T834 /workspace/coverage/default/6.lc_ctrl_stress_all.3645510574 Aug 08 05:52:54 PM PDT 24 Aug 08 05:54:03 PM PDT 24 7682370577 ps
T835 /workspace/coverage/default/23.lc_ctrl_stress_all.2308267426 Aug 08 05:54:15 PM PDT 24 Aug 08 05:57:16 PM PDT 24 6603334201 ps
T836 /workspace/coverage/default/10.lc_ctrl_jtag_state_failure.3665725532 Aug 08 05:53:26 PM PDT 24 Aug 08 05:54:06 PM PDT 24 5607182684 ps
T837 /workspace/coverage/default/1.lc_ctrl_state_failure.2107890688 Aug 08 05:53:21 PM PDT 24 Aug 08 05:53:44 PM PDT 24 265702178 ps
T838 /workspace/coverage/default/8.lc_ctrl_errors.3162551461 Aug 08 05:53:05 PM PDT 24 Aug 08 05:53:16 PM PDT 24 670442760 ps
T839 /workspace/coverage/default/13.lc_ctrl_prog_failure.4263193651 Aug 08 05:53:33 PM PDT 24 Aug 08 05:53:36 PM PDT 24 125309221 ps
T840 /workspace/coverage/default/16.lc_ctrl_smoke.1403125809 Aug 08 05:53:46 PM PDT 24 Aug 08 05:53:47 PM PDT 24 67174147 ps
T841 /workspace/coverage/default/18.lc_ctrl_prog_failure.1150411482 Aug 08 05:53:53 PM PDT 24 Aug 08 05:53:57 PM PDT 24 303230208 ps
T211 /workspace/coverage/default/4.lc_ctrl_claim_transition_if.3985357990 Aug 08 05:52:35 PM PDT 24 Aug 08 05:52:36 PM PDT 24 25744842 ps
T842 /workspace/coverage/default/2.lc_ctrl_state_post_trans.2505682246 Aug 08 05:52:16 PM PDT 24 Aug 08 05:52:22 PM PDT 24 318103133 ps
T843 /workspace/coverage/default/39.lc_ctrl_volatile_unlock_smoke.1994770598 Aug 08 05:55:04 PM PDT 24 Aug 08 05:55:05 PM PDT 24 14539604 ps
T844 /workspace/coverage/default/22.lc_ctrl_volatile_unlock_smoke.2772032000 Aug 08 05:54:12 PM PDT 24 Aug 08 05:54:13 PM PDT 24 35946953 ps
T845 /workspace/coverage/default/2.lc_ctrl_prog_failure.496451165 Aug 08 05:52:19 PM PDT 24 Aug 08 05:52:23 PM PDT 24 80115481 ps
T846 /workspace/coverage/default/18.lc_ctrl_smoke.3687378457 Aug 08 05:53:59 PM PDT 24 Aug 08 05:54:02 PM PDT 24 54337044 ps
T847 /workspace/coverage/default/39.lc_ctrl_state_post_trans.4084383436 Aug 08 05:55:03 PM PDT 24 Aug 08 05:55:06 PM PDT 24 281384980 ps
T848 /workspace/coverage/default/38.lc_ctrl_state_failure.415826952 Aug 08 05:55:04 PM PDT 24 Aug 08 05:55:39 PM PDT 24 388662719 ps
T849 /workspace/coverage/default/8.lc_ctrl_sec_token_mux.1892331102 Aug 08 05:53:15 PM PDT 24 Aug 08 05:53:24 PM PDT 24 2993935171 ps
T850 /workspace/coverage/default/21.lc_ctrl_state_post_trans.134398114 Aug 08 05:54:07 PM PDT 24 Aug 08 05:54:10 PM PDT 24 279214253 ps
T851 /workspace/coverage/default/38.lc_ctrl_stress_all.2625553407 Aug 08 05:55:04 PM PDT 24 Aug 08 05:57:52 PM PDT 24 19189893286 ps
T852 /workspace/coverage/default/43.lc_ctrl_jtag_access.770783980 Aug 08 05:55:21 PM PDT 24 Aug 08 05:55:23 PM PDT 24 109931359 ps
T853 /workspace/coverage/default/44.lc_ctrl_state_failure.4216673479 Aug 08 05:55:20 PM PDT 24 Aug 08 05:55:44 PM PDT 24 674346914 ps
T165 /workspace/coverage/default/19.lc_ctrl_stress_all_with_rand_reset.3347725075 Aug 08 05:54:09 PM PDT 24 Aug 08 06:04:29 PM PDT 24 18373800491 ps
T854 /workspace/coverage/default/13.lc_ctrl_jtag_state_failure.3838676111 Aug 08 05:53:35 PM PDT 24 Aug 08 05:54:20 PM PDT 24 1166165288 ps
T855 /workspace/coverage/default/24.lc_ctrl_smoke.3543464750 Aug 08 05:54:21 PM PDT 24 Aug 08 05:54:24 PM PDT 24 83816147 ps
T856 /workspace/coverage/default/3.lc_ctrl_jtag_state_post_trans.3454494321 Aug 08 05:52:35 PM PDT 24 Aug 08 05:52:44 PM PDT 24 243165610 ps
T857 /workspace/coverage/default/29.lc_ctrl_security_escalation.2844829967 Aug 08 05:54:37 PM PDT 24 Aug 08 05:54:44 PM PDT 24 476325601 ps
T858 /workspace/coverage/default/23.lc_ctrl_volatile_unlock_smoke.3956785289 Aug 08 05:54:16 PM PDT 24 Aug 08 05:54:17 PM PDT 24 18128262 ps
T859 /workspace/coverage/default/9.lc_ctrl_jtag_state_post_trans.2774724468 Aug 08 05:53:16 PM PDT 24 Aug 08 05:53:47 PM PDT 24 807060706 ps
T860 /workspace/coverage/default/27.lc_ctrl_errors.1748174567 Aug 08 05:54:33 PM PDT 24 Aug 08 05:54:49 PM PDT 24 636739957 ps
T861 /workspace/coverage/default/24.lc_ctrl_stress_all.745910818 Aug 08 05:54:27 PM PDT 24 Aug 08 06:03:25 PM PDT 24 71269208365 ps
T862 /workspace/coverage/default/35.lc_ctrl_sec_token_digest.1093295735 Aug 08 05:54:53 PM PDT 24 Aug 08 05:55:02 PM PDT 24 353170607 ps
T863 /workspace/coverage/default/12.lc_ctrl_jtag_errors.4173597602 Aug 08 05:53:34 PM PDT 24 Aug 08 05:53:56 PM PDT 24 2348247542 ps
T864 /workspace/coverage/default/13.lc_ctrl_state_failure.2376686353 Aug 08 05:53:36 PM PDT 24 Aug 08 05:54:03 PM PDT 24 231792936 ps
T865 /workspace/coverage/default/12.lc_ctrl_jtag_access.518536342 Aug 08 05:53:37 PM PDT 24 Aug 08 05:53:41 PM PDT 24 330584454 ps
T866 /workspace/coverage/default/33.lc_ctrl_stress_all.896791818 Aug 08 05:54:48 PM PDT 24 Aug 08 05:57:04 PM PDT 24 8843725846 ps
T867 /workspace/coverage/default/29.lc_ctrl_jtag_access.3082016954 Aug 08 05:54:36 PM PDT 24 Aug 08 05:54:45 PM PDT 24 680585333 ps
T166 /workspace/coverage/default/35.lc_ctrl_stress_all_with_rand_reset.1420474214 Aug 08 05:54:52 PM PDT 24 Aug 08 05:58:26 PM PDT 24 11647468600 ps
T868 /workspace/coverage/default/6.lc_ctrl_claim_transition_if.3697714782 Aug 08 05:52:57 PM PDT 24 Aug 08 05:52:58 PM PDT 24 11072772 ps
T869 /workspace/coverage/default/7.lc_ctrl_state_post_trans.2977153686 Aug 08 05:52:55 PM PDT 24 Aug 08 05:53:05 PM PDT 24 95174555 ps
T870 /workspace/coverage/default/49.lc_ctrl_volatile_unlock_smoke.830178395 Aug 08 05:55:30 PM PDT 24 Aug 08 05:55:31 PM PDT 24 20431047 ps
T871 /workspace/coverage/default/17.lc_ctrl_jtag_errors.1630236308 Aug 08 05:53:59 PM PDT 24 Aug 08 05:54:36 PM PDT 24 1974095472 ps
T872 /workspace/coverage/default/8.lc_ctrl_jtag_prog_failure.800365463 Aug 08 05:53:13 PM PDT 24 Aug 08 05:53:19 PM PDT 24 207938949 ps
T873 /workspace/coverage/default/17.lc_ctrl_volatile_unlock_smoke.2793395558 Aug 08 05:53:56 PM PDT 24 Aug 08 05:53:57 PM PDT 24 31900672 ps
T874 /workspace/coverage/default/42.lc_ctrl_stress_all.641263000 Aug 08 05:55:15 PM PDT 24 Aug 08 05:56:38 PM PDT 24 2665098614 ps
T875 /workspace/coverage/default/25.lc_ctrl_sec_token_digest.3780034758 Aug 08 05:54:26 PM PDT 24 Aug 08 05:54:36 PM PDT 24 232629812 ps
T876 /workspace/coverage/default/30.lc_ctrl_state_failure.708965903 Aug 08 05:54:40 PM PDT 24 Aug 08 05:55:08 PM PDT 24 1289914505 ps
T877 /workspace/coverage/default/30.lc_ctrl_security_escalation.2909525298 Aug 08 05:54:37 PM PDT 24 Aug 08 05:54:49 PM PDT 24 311095191 ps
T878 /workspace/coverage/default/48.lc_ctrl_sec_token_mux.2607139297 Aug 08 05:55:32 PM PDT 24 Aug 08 05:55:53 PM PDT 24 706022490 ps
T879 /workspace/coverage/default/13.lc_ctrl_sec_mubi.1875237266 Aug 08 05:53:38 PM PDT 24 Aug 08 05:53:48 PM PDT 24 1610934484 ps
T99 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.3571249225 Aug 08 05:45:24 PM PDT 24 Aug 08 05:45:25 PM PDT 24 60065757 ps
T111 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.696800368 Aug 08 05:45:05 PM PDT 24 Aug 08 05:45:07 PM PDT 24 95623294 ps
T112 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.751506143 Aug 08 05:45:19 PM PDT 24 Aug 08 05:45:28 PM PDT 24 3178635732 ps
T131 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.3635500948 Aug 08 05:45:00 PM PDT 24 Aug 08 05:45:01 PM PDT 24 223018722 ps
T136 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.3413403400 Aug 08 05:45:06 PM PDT 24 Aug 08 05:45:08 PM PDT 24 66601034 ps
T158 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.280694210 Aug 08 05:45:06 PM PDT 24 Aug 08 05:45:08 PM PDT 24 47786810 ps
T137 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.476017223 Aug 08 05:45:16 PM PDT 24 Aug 08 05:45:17 PM PDT 24 68017064 ps
T95 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.3658684633 Aug 08 05:45:03 PM PDT 24 Aug 08 05:45:06 PM PDT 24 114720562 ps
T96 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.1500657122 Aug 08 05:45:21 PM PDT 24 Aug 08 05:45:24 PM PDT 24 173399426 ps
T880 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.3526912965 Aug 08 05:45:09 PM PDT 24 Aug 08 05:45:10 PM PDT 24 41691184 ps
T103 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.1147547831 Aug 08 05:45:01 PM PDT 24 Aug 08 05:45:03 PM PDT 24 152163114 ps
T138 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.2204133912 Aug 08 05:44:58 PM PDT 24 Aug 08 05:45:50 PM PDT 24 41377246409 ps
T881 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.1894079488 Aug 08 05:44:57 PM PDT 24 Aug 08 05:44:58 PM PDT 24 37423115 ps
T139 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.4220781889 Aug 08 05:44:57 PM PDT 24 Aug 08 05:45:06 PM PDT 24 697751455 ps
T134 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.1426784872 Aug 08 05:45:06 PM PDT 24 Aug 08 05:45:09 PM PDT 24 433286499 ps
T159 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.642309827 Aug 08 05:45:06 PM PDT 24 Aug 08 05:45:08 PM PDT 24 43548935 ps
T104 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.2435953728 Aug 08 05:45:04 PM PDT 24 Aug 08 05:45:07 PM PDT 24 157572923 ps
T196 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.691487377 Aug 08 05:45:05 PM PDT 24 Aug 08 05:45:07 PM PDT 24 18334641 ps
T130 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.3167275900 Aug 08 05:45:02 PM PDT 24 Aug 08 05:45:04 PM PDT 24 165508235 ps
T204 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.2942343329 Aug 08 05:45:31 PM PDT 24 Aug 08 05:45:33 PM PDT 24 54462807 ps
T882 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.2684535331 Aug 08 05:45:14 PM PDT 24 Aug 08 05:45:21 PM PDT 24 3471759798 ps
T135 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.3793969009 Aug 08 05:44:55 PM PDT 24 Aug 08 05:44:59 PM PDT 24 301153633 ps
T167 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.1554425670 Aug 08 05:45:19 PM PDT 24 Aug 08 05:45:21 PM PDT 24 33517547 ps
T205 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.2990135166 Aug 08 05:45:23 PM PDT 24 Aug 08 05:45:24 PM PDT 24 79084540 ps
T102 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.3593773007 Aug 08 05:45:08 PM PDT 24 Aug 08 05:45:10 PM PDT 24 39711976 ps
T883 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.2257006466 Aug 08 05:44:48 PM PDT 24 Aug 08 05:44:50 PM PDT 24 509419129 ps
T884 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.707948021 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:19 PM PDT 24 12780214 ps
T97 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.1853594433 Aug 08 05:45:07 PM PDT 24 Aug 08 05:45:11 PM PDT 24 120171477 ps
T132 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.2120165115 Aug 08 05:44:58 PM PDT 24 Aug 08 05:45:02 PM PDT 24 659486597 ps
T100 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.2159359403 Aug 08 05:45:09 PM PDT 24 Aug 08 05:45:12 PM PDT 24 285698824 ps
T885 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.4088793407 Aug 08 05:45:06 PM PDT 24 Aug 08 05:45:27 PM PDT 24 1645170182 ps
T197 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.1729675611 Aug 08 05:44:58 PM PDT 24 Aug 08 05:44:59 PM PDT 24 17346265 ps
T206 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.2611440395 Aug 08 05:45:11 PM PDT 24 Aug 08 05:45:13 PM PDT 24 256630351 ps
T886 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.2183144908 Aug 08 05:44:59 PM PDT 24 Aug 08 05:45:00 PM PDT 24 58669436 ps
T110 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.2375865233 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:20 PM PDT 24 24416538 ps
T887 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3595421208 Aug 08 05:45:07 PM PDT 24 Aug 08 05:45:09 PM PDT 24 312930476 ps
T101 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.3909067162 Aug 08 05:45:06 PM PDT 24 Aug 08 05:45:08 PM PDT 24 53960222 ps
T198 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.2347428657 Aug 08 05:45:16 PM PDT 24 Aug 08 05:45:17 PM PDT 24 22189742 ps
T207 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.912678875 Aug 08 05:44:57 PM PDT 24 Aug 08 05:44:59 PM PDT 24 33904580 ps
T888 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.2574281112 Aug 08 05:44:59 PM PDT 24 Aug 08 05:45:00 PM PDT 24 18156173 ps
T889 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.6335356 Aug 08 05:45:01 PM PDT 24 Aug 08 05:45:02 PM PDT 24 44455566 ps
T123 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.386210784 Aug 08 05:45:05 PM PDT 24 Aug 08 05:45:12 PM PDT 24 523412094 ps
T208 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.1517204041 Aug 08 05:45:06 PM PDT 24 Aug 08 05:45:07 PM PDT 24 22157948 ps
T890 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.1126372032 Aug 08 05:45:08 PM PDT 24 Aug 08 05:45:10 PM PDT 24 41081400 ps
T133 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.192111693 Aug 08 05:45:00 PM PDT 24 Aug 08 05:45:04 PM PDT 24 714983222 ps
T891 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.1475778848 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:19 PM PDT 24 14815030 ps
T209 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.1933984712 Aug 08 05:45:00 PM PDT 24 Aug 08 05:45:01 PM PDT 24 13689552 ps
T119 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.1653335508 Aug 08 05:44:56 PM PDT 24 Aug 08 05:44:57 PM PDT 24 215852515 ps
T113 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.4288595363 Aug 08 05:45:22 PM PDT 24 Aug 08 05:45:24 PM PDT 24 160803744 ps
T892 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.37609124 Aug 08 05:45:12 PM PDT 24 Aug 08 05:45:18 PM PDT 24 2208127976 ps
T893 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.3643155548 Aug 08 05:45:15 PM PDT 24 Aug 08 05:45:16 PM PDT 24 44511612 ps
T894 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.4104061716 Aug 08 05:45:27 PM PDT 24 Aug 08 05:45:29 PM PDT 24 59443753 ps
T121 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.3069409934 Aug 08 05:45:22 PM PDT 24 Aug 08 05:45:29 PM PDT 24 39406847 ps
T895 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.3401026596 Aug 08 05:45:21 PM PDT 24 Aug 08 05:45:23 PM PDT 24 61259406 ps
T117 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.3601497529 Aug 08 05:45:02 PM PDT 24 Aug 08 05:45:05 PM PDT 24 132575709 ps
T105 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.2170676663 Aug 08 05:45:03 PM PDT 24 Aug 08 05:45:06 PM PDT 24 319419470 ps
T106 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.952260202 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:20 PM PDT 24 94422179 ps
T116 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.1936853276 Aug 08 05:45:05 PM PDT 24 Aug 08 05:45:09 PM PDT 24 42474188 ps
T896 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.2526719721 Aug 08 05:45:12 PM PDT 24 Aug 08 05:45:14 PM PDT 24 55502406 ps
T897 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.3146825725 Aug 08 05:44:57 PM PDT 24 Aug 08 05:44:58 PM PDT 24 46972337 ps
T898 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.3090066000 Aug 08 05:45:01 PM PDT 24 Aug 08 05:45:03 PM PDT 24 89479494 ps
T899 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.582365938 Aug 08 05:44:51 PM PDT 24 Aug 08 05:45:15 PM PDT 24 4121688022 ps
T900 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.932649565 Aug 08 05:44:57 PM PDT 24 Aug 08 05:44:59 PM PDT 24 132996138 ps
T107 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.2530482805 Aug 08 05:45:15 PM PDT 24 Aug 08 05:45:17 PM PDT 24 22990240 ps
T901 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.537022205 Aug 08 05:45:13 PM PDT 24 Aug 08 05:45:15 PM PDT 24 75181236 ps
T902 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.3377566442 Aug 08 05:45:03 PM PDT 24 Aug 08 05:45:05 PM PDT 24 24349274 ps
T903 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.941606128 Aug 08 05:45:24 PM PDT 24 Aug 08 05:45:27 PM PDT 24 556048703 ps
T124 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.2988522208 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:21 PM PDT 24 59432121 ps
T904 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.519769762 Aug 08 05:44:56 PM PDT 24 Aug 08 05:44:59 PM PDT 24 65689580 ps
T905 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.3735096876 Aug 08 05:45:23 PM PDT 24 Aug 08 05:45:25 PM PDT 24 167497998 ps
T906 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.549663313 Aug 08 05:45:17 PM PDT 24 Aug 08 05:45:19 PM PDT 24 22544420 ps
T120 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.3922623899 Aug 08 05:45:17 PM PDT 24 Aug 08 05:45:20 PM PDT 24 50438703 ps
T907 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.2149568777 Aug 08 05:45:05 PM PDT 24 Aug 08 05:45:31 PM PDT 24 4664923972 ps
T908 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.1810455009 Aug 08 05:44:52 PM PDT 24 Aug 08 05:44:54 PM PDT 24 77751638 ps
T909 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.49514543 Aug 08 05:45:15 PM PDT 24 Aug 08 05:45:39 PM PDT 24 2107458983 ps
T910 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.2703907018 Aug 08 05:45:20 PM PDT 24 Aug 08 05:45:21 PM PDT 24 14686093 ps
T911 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.3789304907 Aug 08 05:45:14 PM PDT 24 Aug 08 05:45:16 PM PDT 24 253509290 ps
T114 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.653521004 Aug 08 05:45:14 PM PDT 24 Aug 08 05:45:18 PM PDT 24 2404483140 ps
T912 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.2048196601 Aug 08 05:45:20 PM PDT 24 Aug 08 05:45:22 PM PDT 24 23350707 ps
T913 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3101293786 Aug 08 05:45:00 PM PDT 24 Aug 08 05:45:02 PM PDT 24 358356098 ps
T914 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.153790785 Aug 08 05:45:20 PM PDT 24 Aug 08 05:45:22 PM PDT 24 259810969 ps
T915 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.964428889 Aug 08 05:45:00 PM PDT 24 Aug 08 05:45:00 PM PDT 24 44203724 ps
T916 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.1941731980 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:24 PM PDT 24 741825922 ps
T917 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.1727447307 Aug 08 05:45:17 PM PDT 24 Aug 08 05:45:18 PM PDT 24 14823198 ps
T918 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.1940330620 Aug 08 05:45:07 PM PDT 24 Aug 08 05:45:20 PM PDT 24 2778167372 ps
T122 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.1449879201 Aug 08 05:45:23 PM PDT 24 Aug 08 05:45:27 PM PDT 24 253764239 ps
T919 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2170076952 Aug 08 05:44:58 PM PDT 24 Aug 08 05:44:59 PM PDT 24 36759583 ps
T920 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.1961815515 Aug 08 05:44:56 PM PDT 24 Aug 08 05:44:57 PM PDT 24 20208383 ps
T921 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.3538843936 Aug 08 05:45:03 PM PDT 24 Aug 08 05:45:04 PM PDT 24 20603645 ps
T922 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2611690067 Aug 08 05:45:15 PM PDT 24 Aug 08 05:45:18 PM PDT 24 185268445 ps
T923 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.551458400 Aug 08 05:45:05 PM PDT 24 Aug 08 05:45:06 PM PDT 24 44613680 ps
T924 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3631505018 Aug 08 05:45:06 PM PDT 24 Aug 08 05:45:07 PM PDT 24 65685854 ps
T925 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.3767707311 Aug 08 05:45:09 PM PDT 24 Aug 08 05:45:11 PM PDT 24 62860011 ps
T926 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.1146899993 Aug 08 05:45:13 PM PDT 24 Aug 08 05:45:14 PM PDT 24 16844092 ps
T927 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.127210633 Aug 08 05:45:01 PM PDT 24 Aug 08 05:45:03 PM PDT 24 61445866 ps
T928 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.1813937541 Aug 08 05:45:16 PM PDT 24 Aug 08 05:45:17 PM PDT 24 19336914 ps
T929 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.1163132763 Aug 08 05:44:48 PM PDT 24 Aug 08 05:44:49 PM PDT 24 44140017 ps
T930 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.3963629853 Aug 08 05:45:03 PM PDT 24 Aug 08 05:45:04 PM PDT 24 14836279 ps
T199 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.1257252380 Aug 08 05:44:59 PM PDT 24 Aug 08 05:45:00 PM PDT 24 67014523 ps
T931 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.113260096 Aug 08 05:44:59 PM PDT 24 Aug 08 05:45:00 PM PDT 24 127906385 ps
T932 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.4135627170 Aug 08 05:44:56 PM PDT 24 Aug 08 05:44:58 PM PDT 24 97466464 ps
T933 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.2398957993 Aug 08 05:44:47 PM PDT 24 Aug 08 05:44:49 PM PDT 24 37709848 ps
T934 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.995719479 Aug 08 05:45:03 PM PDT 24 Aug 08 05:45:05 PM PDT 24 51366341 ps
T935 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.538305279 Aug 08 05:45:14 PM PDT 24 Aug 08 05:45:15 PM PDT 24 72539253 ps
T200 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.891805498 Aug 08 05:44:50 PM PDT 24 Aug 08 05:44:51 PM PDT 24 41396072 ps
T936 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.2213342306 Aug 08 05:44:45 PM PDT 24 Aug 08 05:44:46 PM PDT 24 16326084 ps
T937 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2207500053 Aug 08 05:45:02 PM PDT 24 Aug 08 05:45:05 PM PDT 24 360345917 ps
T201 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.2940080386 Aug 08 05:45:03 PM PDT 24 Aug 08 05:45:04 PM PDT 24 16609481 ps
T938 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.1909193929 Aug 08 05:44:54 PM PDT 24 Aug 08 05:44:57 PM PDT 24 44650948 ps
T939 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.2881375120 Aug 08 05:44:53 PM PDT 24 Aug 08 05:44:54 PM PDT 24 546244552 ps
T940 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.4178855330 Aug 08 05:45:15 PM PDT 24 Aug 08 05:45:19 PM PDT 24 252299004 ps
T216 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.1726244237 Aug 08 05:44:50 PM PDT 24 Aug 08 05:44:53 PM PDT 24 492132747 ps
T941 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.3994660600 Aug 08 05:45:16 PM PDT 24 Aug 08 05:45:17 PM PDT 24 14736054 ps
T942 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.3619330114 Aug 08 05:45:10 PM PDT 24 Aug 08 05:45:25 PM PDT 24 1323600728 ps
T943 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.1442420501 Aug 08 05:44:48 PM PDT 24 Aug 08 05:44:50 PM PDT 24 38406859 ps
T944 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.2697838451 Aug 08 05:45:15 PM PDT 24 Aug 08 05:45:17 PM PDT 24 154652248 ps
T945 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.2803286440 Aug 08 05:45:00 PM PDT 24 Aug 08 05:45:02 PM PDT 24 213429948 ps
T946 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.1375782989 Aug 08 05:45:17 PM PDT 24 Aug 08 05:45:19 PM PDT 24 42327224 ps
T947 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.4064809747 Aug 08 05:45:10 PM PDT 24 Aug 08 05:45:22 PM PDT 24 4153092383 ps
T948 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2861276938 Aug 08 05:44:51 PM PDT 24 Aug 08 05:44:56 PM PDT 24 704637869 ps
T949 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.3870115087 Aug 08 05:45:23 PM PDT 24 Aug 08 05:45:24 PM PDT 24 30364707 ps
T950 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.1386967841 Aug 08 05:44:59 PM PDT 24 Aug 08 05:45:01 PM PDT 24 47487409 ps
T951 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.2118742189 Aug 08 05:45:24 PM PDT 24 Aug 08 05:45:25 PM PDT 24 54216569 ps
T952 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.3096703739 Aug 08 05:44:46 PM PDT 24 Aug 08 05:44:52 PM PDT 24 1895280959 ps
T953 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3479306147 Aug 08 05:45:12 PM PDT 24 Aug 08 05:45:14 PM PDT 24 251986418 ps
T954 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.2509500624 Aug 08 05:45:20 PM PDT 24 Aug 08 05:45:22 PM PDT 24 50576368 ps
T955 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.785293617 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:19 PM PDT 24 48393299 ps
T956 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.1124347729 Aug 08 05:45:14 PM PDT 24 Aug 08 05:45:17 PM PDT 24 58889220 ps
T957 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.1810609501 Aug 08 05:44:58 PM PDT 24 Aug 08 05:45:00 PM PDT 24 436205855 ps
T958 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.2766500871 Aug 08 05:45:23 PM PDT 24 Aug 08 05:45:25 PM PDT 24 19191980 ps
T959 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.1523759345 Aug 08 05:44:59 PM PDT 24 Aug 08 05:45:00 PM PDT 24 25720063 ps
T960 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.1219356513 Aug 08 05:45:15 PM PDT 24 Aug 08 05:45:20 PM PDT 24 237193665 ps
T961 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.1733271234 Aug 08 05:44:58 PM PDT 24 Aug 08 05:45:00 PM PDT 24 91213532 ps
T962 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.875812654 Aug 08 05:45:00 PM PDT 24 Aug 08 05:45:03 PM PDT 24 94930082 ps
T963 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.3305360523 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:19 PM PDT 24 45683273 ps
T964 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.720701482 Aug 08 05:45:01 PM PDT 24 Aug 08 05:45:06 PM PDT 24 464504728 ps
T202 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.3695023606 Aug 08 05:45:15 PM PDT 24 Aug 08 05:45:16 PM PDT 24 12295091 ps
T965 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.963626707 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:20 PM PDT 24 22350767 ps
T115 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.3560724780 Aug 08 05:44:54 PM PDT 24 Aug 08 05:44:56 PM PDT 24 51997050 ps
T127 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.2407939825 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:23 PM PDT 24 306417425 ps
T129 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.2073963487 Aug 08 05:45:20 PM PDT 24 Aug 08 05:45:22 PM PDT 24 42347204 ps
T966 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.2784963468 Aug 08 05:45:05 PM PDT 24 Aug 08 05:45:23 PM PDT 24 1383973747 ps
T967 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.4079549742 Aug 08 05:45:29 PM PDT 24 Aug 08 05:45:31 PM PDT 24 14941126 ps
T968 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.1537722376 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:21 PM PDT 24 46898974 ps
T118 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.3609978229 Aug 08 05:45:01 PM PDT 24 Aug 08 05:45:04 PM PDT 24 446541697 ps
T969 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.1143211111 Aug 08 05:45:11 PM PDT 24 Aug 08 05:45:13 PM PDT 24 45735831 ps
T970 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.2182657599 Aug 08 05:44:59 PM PDT 24 Aug 08 05:45:00 PM PDT 24 68786250 ps
T971 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.2798299745 Aug 08 05:45:17 PM PDT 24 Aug 08 05:45:19 PM PDT 24 119141091 ps
T128 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.2550878960 Aug 08 05:45:17 PM PDT 24 Aug 08 05:45:24 PM PDT 24 118118992 ps
T972 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.620996668 Aug 08 05:45:01 PM PDT 24 Aug 08 05:45:06 PM PDT 24 1794626573 ps
T973 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.2453235949 Aug 08 05:45:09 PM PDT 24 Aug 08 05:45:10 PM PDT 24 117921483 ps
T974 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.2922768560 Aug 08 05:45:15 PM PDT 24 Aug 08 05:45:17 PM PDT 24 35807352 ps
T975 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.3519032078 Aug 08 05:45:10 PM PDT 24 Aug 08 05:45:11 PM PDT 24 62922289 ps
T976 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.1508557523 Aug 08 05:44:57 PM PDT 24 Aug 08 05:44:58 PM PDT 24 89227249 ps
T977 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.3742465895 Aug 08 05:45:19 PM PDT 24 Aug 08 05:45:20 PM PDT 24 16904087 ps
T978 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.2960385952 Aug 08 05:44:53 PM PDT 24 Aug 08 05:44:55 PM PDT 24 834875593 ps
T979 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.3204780869 Aug 08 05:45:21 PM PDT 24 Aug 08 05:45:22 PM PDT 24 26122391 ps
T980 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.3160593600 Aug 08 05:45:02 PM PDT 24 Aug 08 05:45:04 PM PDT 24 15374369 ps
T981 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1767779367 Aug 08 05:45:03 PM PDT 24 Aug 08 05:45:05 PM PDT 24 163707254 ps
T982 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.274762078 Aug 08 05:45:05 PM PDT 24 Aug 08 05:45:06 PM PDT 24 21465841 ps
T983 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.3461300350 Aug 08 05:45:10 PM PDT 24 Aug 08 05:45:11 PM PDT 24 28813605 ps
T984 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.51065960 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:19 PM PDT 24 15200276 ps
T985 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.3365558939 Aug 08 05:45:14 PM PDT 24 Aug 08 05:45:15 PM PDT 24 100333105 ps
T986 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.2847950859 Aug 08 05:45:00 PM PDT 24 Aug 08 05:45:01 PM PDT 24 15458942 ps
T987 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.2660824626 Aug 08 05:45:06 PM PDT 24 Aug 08 05:45:08 PM PDT 24 150157666 ps
T988 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.510622992 Aug 08 05:45:13 PM PDT 24 Aug 08 05:45:14 PM PDT 24 26355481 ps
T108 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.2831148553 Aug 08 05:45:06 PM PDT 24 Aug 08 05:45:10 PM PDT 24 218206269 ps
T989 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.3340327810 Aug 08 05:45:15 PM PDT 24 Aug 08 05:45:17 PM PDT 24 55408115 ps
T990 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.490515507 Aug 08 05:45:16 PM PDT 24 Aug 08 05:45:20 PM PDT 24 196471042 ps
T991 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.181419260 Aug 08 05:44:56 PM PDT 24 Aug 08 05:44:58 PM PDT 24 168248306 ps
T992 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.1892223517 Aug 08 05:45:18 PM PDT 24 Aug 08 05:45:20 PM PDT 24 15369666 ps
T993 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.209704949 Aug 08 05:44:56 PM PDT 24 Aug 08 05:44:57 PM PDT 24 31284592 ps
T994 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.112385609 Aug 08 05:44:59 PM PDT 24 Aug 08 05:45:00 PM PDT 24 23197833 ps
T126 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.2093916443 Aug 08 05:45:21 PM PDT 24 Aug 08 05:45:26 PM PDT 24 1512793565 ps
T995 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.2647087784 Aug 08 05:44:59 PM PDT 24 Aug 08 05:45:06 PM PDT 24 3551471107 ps
T203 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.1190292616 Aug 08 05:45:15 PM PDT 24 Aug 08 05:45:16 PM PDT 24 28343184 ps
T125 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.2903825640 Aug 08 05:45:21 PM PDT 24 Aug 08 05:45:26 PM PDT 24 528227301 ps
T996 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.3801773490 Aug 08 05:45:00 PM PDT 24 Aug 08 05:45:03 PM PDT 24 462306837 ps
T997 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.2238014793 Aug 08 05:44:56 PM PDT 24 Aug 08 05:45:10 PM PDT 24 1344364435 ps
T109 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.3863040197 Aug 08 05:44:59 PM PDT 24 Aug 08 05:45:02 PM PDT 24 120773863 ps
T998 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.2308084527 Aug 08 05:45:02 PM PDT 24 Aug 08 05:45:14 PM PDT 24 1105819618 ps
T999 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.3456084762 Aug 08 05:44:57 PM PDT 24 Aug 08 05:44:59 PM PDT 24 48414163 ps
T1000 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.477189604 Aug 08 05:44:57 PM PDT 24 Aug 08 05:45:00 PM PDT 24 74067041 ps
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