Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.60 97.97 95.84 93.40 95.24 98.73 98.76 96.29


Total test records in report: 1002
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T815 /workspace/coverage/default/0.lc_ctrl_sec_token_mux.2091909053 Aug 16 06:24:31 PM PDT 24 Aug 16 06:24:41 PM PDT 24 491144725 ps
T816 /workspace/coverage/default/48.lc_ctrl_prog_failure.1693847121 Aug 16 06:26:38 PM PDT 24 Aug 16 06:26:40 PM PDT 24 180912188 ps
T817 /workspace/coverage/default/37.lc_ctrl_stress_all.3437855334 Aug 16 06:26:41 PM PDT 24 Aug 16 06:31:20 PM PDT 24 25564086000 ps
T818 /workspace/coverage/default/29.lc_ctrl_smoke.2968309799 Aug 16 06:25:57 PM PDT 24 Aug 16 06:25:58 PM PDT 24 26911464 ps
T819 /workspace/coverage/default/38.lc_ctrl_state_failure.3908730894 Aug 16 06:26:15 PM PDT 24 Aug 16 06:26:42 PM PDT 24 211444035 ps
T820 /workspace/coverage/default/7.lc_ctrl_security_escalation.2471431328 Aug 16 06:24:49 PM PDT 24 Aug 16 06:24:58 PM PDT 24 399057582 ps
T821 /workspace/coverage/default/31.lc_ctrl_volatile_unlock_smoke.1256080726 Aug 16 06:26:01 PM PDT 24 Aug 16 06:26:02 PM PDT 24 18798833 ps
T822 /workspace/coverage/default/35.lc_ctrl_sec_mubi.1395787964 Aug 16 06:26:15 PM PDT 24 Aug 16 06:26:27 PM PDT 24 598216915 ps
T823 /workspace/coverage/default/31.lc_ctrl_stress_all.2134122007 Aug 16 06:26:16 PM PDT 24 Aug 16 06:26:42 PM PDT 24 669000319 ps
T824 /workspace/coverage/default/32.lc_ctrl_security_escalation.163044879 Aug 16 06:26:16 PM PDT 24 Aug 16 06:26:30 PM PDT 24 393937265 ps
T825 /workspace/coverage/default/27.lc_ctrl_state_post_trans.4114933689 Aug 16 06:26:01 PM PDT 24 Aug 16 06:26:06 PM PDT 24 90980911 ps
T826 /workspace/coverage/default/29.lc_ctrl_volatile_unlock_smoke.1693663370 Aug 16 06:26:10 PM PDT 24 Aug 16 06:26:11 PM PDT 24 15456817 ps
T827 /workspace/coverage/default/14.lc_ctrl_sec_token_mux.3866629900 Aug 16 06:25:24 PM PDT 24 Aug 16 06:25:39 PM PDT 24 800624705 ps
T828 /workspace/coverage/default/30.lc_ctrl_alert_test.147757630 Aug 16 06:26:02 PM PDT 24 Aug 16 06:26:03 PM PDT 24 29385433 ps
T829 /workspace/coverage/default/9.lc_ctrl_alert_test.654076093 Aug 16 06:25:23 PM PDT 24 Aug 16 06:25:24 PM PDT 24 23338783 ps
T830 /workspace/coverage/default/7.lc_ctrl_jtag_errors.1405098699 Aug 16 06:25:22 PM PDT 24 Aug 16 06:25:49 PM PDT 24 7247080542 ps
T831 /workspace/coverage/default/49.lc_ctrl_errors.2653186162 Aug 16 06:26:39 PM PDT 24 Aug 16 06:26:54 PM PDT 24 313545139 ps
T832 /workspace/coverage/default/16.lc_ctrl_smoke.4107386792 Aug 16 06:25:23 PM PDT 24 Aug 16 06:25:26 PM PDT 24 63842834 ps
T833 /workspace/coverage/default/10.lc_ctrl_prog_failure.2303787452 Aug 16 06:25:07 PM PDT 24 Aug 16 06:25:11 PM PDT 24 93461265 ps
T834 /workspace/coverage/default/17.lc_ctrl_stress_all.3210741576 Aug 16 06:25:40 PM PDT 24 Aug 16 06:28:44 PM PDT 24 5382590251 ps
T835 /workspace/coverage/default/16.lc_ctrl_state_failure.950164935 Aug 16 06:25:26 PM PDT 24 Aug 16 06:25:50 PM PDT 24 1118572666 ps
T836 /workspace/coverage/default/20.lc_ctrl_volatile_unlock_smoke.1164810597 Aug 16 06:25:41 PM PDT 24 Aug 16 06:25:42 PM PDT 24 16163242 ps
T837 /workspace/coverage/default/4.lc_ctrl_jtag_state_post_trans.624360221 Aug 16 06:24:40 PM PDT 24 Aug 16 06:24:55 PM PDT 24 1317031538 ps
T838 /workspace/coverage/default/38.lc_ctrl_stress_all.579885766 Aug 16 06:26:17 PM PDT 24 Aug 16 06:28:37 PM PDT 24 39815174251 ps
T839 /workspace/coverage/default/44.lc_ctrl_prog_failure.1333674268 Aug 16 06:26:29 PM PDT 24 Aug 16 06:26:31 PM PDT 24 28769793 ps
T840 /workspace/coverage/default/10.lc_ctrl_volatile_unlock_smoke.1192107465 Aug 16 06:25:11 PM PDT 24 Aug 16 06:25:12 PM PDT 24 31880805 ps
T841 /workspace/coverage/default/7.lc_ctrl_jtag_state_failure.2382051398 Aug 16 06:24:50 PM PDT 24 Aug 16 06:25:30 PM PDT 24 2328684707 ps
T842 /workspace/coverage/default/8.lc_ctrl_sec_mubi.86943011 Aug 16 06:25:21 PM PDT 24 Aug 16 06:25:41 PM PDT 24 1790812571 ps
T843 /workspace/coverage/default/32.lc_ctrl_stress_all.389346221 Aug 16 06:26:17 PM PDT 24 Aug 16 06:27:20 PM PDT 24 2548492585 ps
T844 /workspace/coverage/default/34.lc_ctrl_sec_mubi.3721278259 Aug 16 06:26:17 PM PDT 24 Aug 16 06:26:27 PM PDT 24 201649358 ps
T845 /workspace/coverage/default/25.lc_ctrl_sec_mubi.534077408 Aug 16 06:26:13 PM PDT 24 Aug 16 06:26:26 PM PDT 24 879556942 ps
T846 /workspace/coverage/default/1.lc_ctrl_sec_mubi.428803010 Aug 16 06:24:44 PM PDT 24 Aug 16 06:24:57 PM PDT 24 814598850 ps
T847 /workspace/coverage/default/17.lc_ctrl_jtag_access.3988176573 Aug 16 06:25:31 PM PDT 24 Aug 16 06:25:44 PM PDT 24 908964278 ps
T848 /workspace/coverage/default/13.lc_ctrl_jtag_errors.231394593 Aug 16 06:25:28 PM PDT 24 Aug 16 06:27:07 PM PDT 24 14717442945 ps
T849 /workspace/coverage/default/0.lc_ctrl_jtag_regwen_during_op.425892733 Aug 16 06:24:29 PM PDT 24 Aug 16 06:24:47 PM PDT 24 1190697923 ps
T850 /workspace/coverage/default/30.lc_ctrl_sec_token_mux.2596681630 Aug 16 06:26:01 PM PDT 24 Aug 16 06:26:08 PM PDT 24 405375072 ps
T851 /workspace/coverage/default/4.lc_ctrl_jtag_priority.3062420741 Aug 16 06:24:51 PM PDT 24 Aug 16 06:24:55 PM PDT 24 733682059 ps
T852 /workspace/coverage/default/31.lc_ctrl_alert_test.2538431474 Aug 16 06:26:16 PM PDT 24 Aug 16 06:26:18 PM PDT 24 110322116 ps
T853 /workspace/coverage/default/35.lc_ctrl_smoke.1443478577 Aug 16 06:26:28 PM PDT 24 Aug 16 06:26:31 PM PDT 24 43557753 ps
T854 /workspace/coverage/default/2.lc_ctrl_jtag_state_post_trans.3968342027 Aug 16 06:24:37 PM PDT 24 Aug 16 06:24:55 PM PDT 24 1742809859 ps
T855 /workspace/coverage/default/42.lc_ctrl_sec_token_mux.3488946189 Aug 16 06:26:23 PM PDT 24 Aug 16 06:26:32 PM PDT 24 192173279 ps
T856 /workspace/coverage/default/3.lc_ctrl_jtag_access.895121709 Aug 16 06:24:42 PM PDT 24 Aug 16 06:24:44 PM PDT 24 148605336 ps
T857 /workspace/coverage/default/46.lc_ctrl_sec_token_digest.3562171053 Aug 16 06:26:59 PM PDT 24 Aug 16 06:27:11 PM PDT 24 1179685532 ps
T858 /workspace/coverage/default/21.lc_ctrl_smoke.54134717 Aug 16 06:25:40 PM PDT 24 Aug 16 06:25:43 PM PDT 24 64583652 ps
T859 /workspace/coverage/default/2.lc_ctrl_volatile_unlock_smoke.3332301037 Aug 16 06:24:41 PM PDT 24 Aug 16 06:24:42 PM PDT 24 29596512 ps
T190 /workspace/coverage/default/6.lc_ctrl_claim_transition_if.966388176 Aug 16 06:24:55 PM PDT 24 Aug 16 06:24:56 PM PDT 24 14348862 ps
T860 /workspace/coverage/default/15.lc_ctrl_security_escalation.2898235385 Aug 16 06:25:31 PM PDT 24 Aug 16 06:25:42 PM PDT 24 1557292787 ps
T145 /workspace/coverage/default/19.lc_ctrl_stress_all_with_rand_reset.2144317156 Aug 16 06:25:32 PM PDT 24 Aug 16 06:28:08 PM PDT 24 14786533499 ps
T861 /workspace/coverage/default/46.lc_ctrl_jtag_access.3268860773 Aug 16 06:26:46 PM PDT 24 Aug 16 06:26:51 PM PDT 24 1495481589 ps
T862 /workspace/coverage/default/40.lc_ctrl_state_post_trans.3235656544 Aug 16 06:26:23 PM PDT 24 Aug 16 06:26:27 PM PDT 24 112966614 ps
T863 /workspace/coverage/default/22.lc_ctrl_state_post_trans.504838370 Aug 16 06:25:38 PM PDT 24 Aug 16 06:25:41 PM PDT 24 156003862 ps
T864 /workspace/coverage/default/41.lc_ctrl_jtag_access.4218757595 Aug 16 06:26:24 PM PDT 24 Aug 16 06:26:28 PM PDT 24 2037777439 ps
T865 /workspace/coverage/default/19.lc_ctrl_prog_failure.341358023 Aug 16 06:25:33 PM PDT 24 Aug 16 06:25:36 PM PDT 24 355991575 ps
T866 /workspace/coverage/default/4.lc_ctrl_jtag_regwen_during_op.2992192021 Aug 16 06:24:46 PM PDT 24 Aug 16 06:25:03 PM PDT 24 2850498981 ps
T867 /workspace/coverage/default/7.lc_ctrl_smoke.654847363 Aug 16 06:24:51 PM PDT 24 Aug 16 06:24:56 PM PDT 24 90429314 ps
T868 /workspace/coverage/default/38.lc_ctrl_alert_test.3829233094 Aug 16 06:26:17 PM PDT 24 Aug 16 06:26:18 PM PDT 24 14526058 ps
T869 /workspace/coverage/default/1.lc_ctrl_sec_token_mux.1729618375 Aug 16 06:24:36 PM PDT 24 Aug 16 06:24:43 PM PDT 24 222156110 ps
T870 /workspace/coverage/default/1.lc_ctrl_jtag_state_post_trans.637770615 Aug 16 06:24:45 PM PDT 24 Aug 16 06:25:01 PM PDT 24 2531923787 ps
T871 /workspace/coverage/default/28.lc_ctrl_stress_all.774781974 Aug 16 06:25:56 PM PDT 24 Aug 16 06:29:33 PM PDT 24 22357503394 ps
T872 /workspace/coverage/default/22.lc_ctrl_state_failure.1536767580 Aug 16 06:25:38 PM PDT 24 Aug 16 06:25:58 PM PDT 24 330144225 ps
T873 /workspace/coverage/default/23.lc_ctrl_prog_failure.2753463761 Aug 16 06:25:45 PM PDT 24 Aug 16 06:25:48 PM PDT 24 51265330 ps
T874 /workspace/coverage/default/27.lc_ctrl_sec_mubi.321196723 Aug 16 06:26:01 PM PDT 24 Aug 16 06:26:16 PM PDT 24 6108307442 ps
T875 /workspace/coverage/default/44.lc_ctrl_errors.3885023238 Aug 16 06:26:32 PM PDT 24 Aug 16 06:26:42 PM PDT 24 292674336 ps
T876 /workspace/coverage/default/6.lc_ctrl_jtag_errors.298366199 Aug 16 06:24:50 PM PDT 24 Aug 16 06:25:17 PM PDT 24 2892920933 ps
T877 /workspace/coverage/default/29.lc_ctrl_prog_failure.190161692 Aug 16 06:25:57 PM PDT 24 Aug 16 06:25:58 PM PDT 24 16320602 ps
T878 /workspace/coverage/default/34.lc_ctrl_prog_failure.801942468 Aug 16 06:26:08 PM PDT 24 Aug 16 06:26:12 PM PDT 24 80244544 ps
T879 /workspace/coverage/default/44.lc_ctrl_stress_all_with_rand_reset.4268148226 Aug 16 06:26:34 PM PDT 24 Aug 16 06:27:34 PM PDT 24 1566472618 ps
T108 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1549387419 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:38 PM PDT 24 1379792449 ps
T100 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.2340560312 Aug 16 06:27:09 PM PDT 24 Aug 16 06:27:11 PM PDT 24 500496078 ps
T109 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.1299881666 Aug 16 06:26:50 PM PDT 24 Aug 16 06:26:52 PM PDT 24 20747712 ps
T101 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.1892048549 Aug 16 06:27:16 PM PDT 24 Aug 16 06:27:18 PM PDT 24 60262272 ps
T96 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2011628613 Aug 16 06:27:23 PM PDT 24 Aug 16 06:27:30 PM PDT 24 145877637 ps
T102 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.703486283 Aug 16 06:26:45 PM PDT 24 Aug 16 06:26:46 PM PDT 24 83168174 ps
T91 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.2611291275 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:12 PM PDT 24 108407665 ps
T166 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.2595183083 Aug 16 06:27:05 PM PDT 24 Aug 16 06:27:06 PM PDT 24 37783605 ps
T180 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.823556825 Aug 16 06:27:08 PM PDT 24 Aug 16 06:27:09 PM PDT 24 45715490 ps
T880 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.1837434642 Aug 16 06:27:04 PM PDT 24 Aug 16 06:27:05 PM PDT 24 133330946 ps
T92 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.1503088871 Aug 16 06:27:12 PM PDT 24 Aug 16 06:27:14 PM PDT 24 236025363 ps
T881 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.2857542190 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:08 PM PDT 24 16267206 ps
T93 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1423012612 Aug 16 06:26:52 PM PDT 24 Aug 16 06:26:54 PM PDT 24 265699216 ps
T882 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.58738319 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:10 PM PDT 24 475137057 ps
T97 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.3046789521 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:11 PM PDT 24 409757962 ps
T883 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.327908595 Aug 16 06:27:03 PM PDT 24 Aug 16 06:27:04 PM PDT 24 15760825 ps
T884 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.2968340270 Aug 16 06:26:54 PM PDT 24 Aug 16 06:26:55 PM PDT 24 11702003 ps
T110 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3642465340 Aug 16 06:26:53 PM PDT 24 Aug 16 06:26:55 PM PDT 24 239488525 ps
T153 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.4281561042 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:07 PM PDT 24 26654483 ps
T141 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.141357479 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:08 PM PDT 24 15502577 ps
T181 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.231413148 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:12 PM PDT 24 39055894 ps
T128 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2711843729 Aug 16 06:26:44 PM PDT 24 Aug 16 06:26:49 PM PDT 24 184275426 ps
T107 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.688603596 Aug 16 06:27:12 PM PDT 24 Aug 16 06:27:14 PM PDT 24 435309676 ps
T182 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.308983523 Aug 16 06:27:04 PM PDT 24 Aug 16 06:27:05 PM PDT 24 54695283 ps
T129 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.4074370062 Aug 16 06:27:03 PM PDT 24 Aug 16 06:27:06 PM PDT 24 147069486 ps
T98 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.597592301 Aug 16 06:27:12 PM PDT 24 Aug 16 06:27:15 PM PDT 24 57270009 ps
T183 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.3117686797 Aug 16 06:26:50 PM PDT 24 Aug 16 06:26:51 PM PDT 24 65096337 ps
T885 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.1217837448 Aug 16 06:27:08 PM PDT 24 Aug 16 06:27:14 PM PDT 24 227096099 ps
T120 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.3862021250 Aug 16 06:27:13 PM PDT 24 Aug 16 06:27:15 PM PDT 24 80920332 ps
T886 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.3091996188 Aug 16 06:27:14 PM PDT 24 Aug 16 06:27:15 PM PDT 24 14402435 ps
T887 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.3363761972 Aug 16 06:27:09 PM PDT 24 Aug 16 06:27:11 PM PDT 24 267100737 ps
T184 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.2084681322 Aug 16 06:26:55 PM PDT 24 Aug 16 06:26:56 PM PDT 24 17707174 ps
T185 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.4259462899 Aug 16 06:26:54 PM PDT 24 Aug 16 06:26:55 PM PDT 24 39064580 ps
T888 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.2482687545 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:12 PM PDT 24 42903101 ps
T889 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.1253182377 Aug 16 06:27:01 PM PDT 24 Aug 16 06:27:02 PM PDT 24 15489980 ps
T890 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.3571717233 Aug 16 06:27:17 PM PDT 24 Aug 16 06:27:18 PM PDT 24 15828902 ps
T891 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.495438663 Aug 16 06:26:45 PM PDT 24 Aug 16 06:26:48 PM PDT 24 299901277 ps
T892 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.2931033872 Aug 16 06:26:55 PM PDT 24 Aug 16 06:26:57 PM PDT 24 176130178 ps
T893 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.2397874897 Aug 16 06:27:05 PM PDT 24 Aug 16 06:27:14 PM PDT 24 333471926 ps
T186 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.2285865183 Aug 16 06:26:52 PM PDT 24 Aug 16 06:26:54 PM PDT 24 253726211 ps
T894 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.3007789847 Aug 16 06:26:55 PM PDT 24 Aug 16 06:26:56 PM PDT 24 111800772 ps
T895 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.1950694550 Aug 16 06:26:55 PM PDT 24 Aug 16 06:26:58 PM PDT 24 581570809 ps
T896 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.4148424140 Aug 16 06:26:46 PM PDT 24 Aug 16 06:26:47 PM PDT 24 27302521 ps
T187 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.210456045 Aug 16 06:26:41 PM PDT 24 Aug 16 06:26:43 PM PDT 24 173195758 ps
T897 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.2529381609 Aug 16 06:27:00 PM PDT 24 Aug 16 06:27:02 PM PDT 24 111685769 ps
T898 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.518295121 Aug 16 06:27:32 PM PDT 24 Aug 16 06:27:34 PM PDT 24 44553043 ps
T899 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.1787919984 Aug 16 06:27:20 PM PDT 24 Aug 16 06:27:21 PM PDT 24 92901525 ps
T900 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.4204358303 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:09 PM PDT 24 125647220 ps
T901 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.2139607142 Aug 16 06:27:09 PM PDT 24 Aug 16 06:27:11 PM PDT 24 25966321 ps
T99 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.3845351858 Aug 16 06:26:53 PM PDT 24 Aug 16 06:26:56 PM PDT 24 109530491 ps
T902 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.3655929271 Aug 16 06:26:46 PM PDT 24 Aug 16 06:26:48 PM PDT 24 25636269 ps
T126 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.4142714089 Aug 16 06:27:08 PM PDT 24 Aug 16 06:27:11 PM PDT 24 764081972 ps
T903 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.388808899 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:07 PM PDT 24 238042206 ps
T127 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.3683410429 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:12 PM PDT 24 75601708 ps
T904 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.76116383 Aug 16 06:27:08 PM PDT 24 Aug 16 06:27:10 PM PDT 24 342532644 ps
T905 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.993457921 Aug 16 06:27:12 PM PDT 24 Aug 16 06:27:14 PM PDT 24 189122639 ps
T906 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.507118709 Aug 16 06:27:12 PM PDT 24 Aug 16 06:27:15 PM PDT 24 256229774 ps
T907 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.549651329 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:09 PM PDT 24 120291596 ps
T908 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.347407991 Aug 16 06:27:04 PM PDT 24 Aug 16 06:27:17 PM PDT 24 4676470177 ps
T103 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.2912521034 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:08 PM PDT 24 32836745 ps
T909 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.920244707 Aug 16 06:27:13 PM PDT 24 Aug 16 06:27:15 PM PDT 24 107431187 ps
T910 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.616201040 Aug 16 06:26:39 PM PDT 24 Aug 16 06:26:43 PM PDT 24 209831202 ps
T112 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.2859667387 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:11 PM PDT 24 20568656 ps
T911 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.2523505152 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:09 PM PDT 24 122921805 ps
T118 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.1446179440 Aug 16 06:27:09 PM PDT 24 Aug 16 06:27:11 PM PDT 24 43055931 ps
T912 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3760617650 Aug 16 06:27:02 PM PDT 24 Aug 16 06:27:04 PM PDT 24 203890420 ps
T913 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.1133585495 Aug 16 06:26:53 PM PDT 24 Aug 16 06:26:55 PM PDT 24 1071475703 ps
T114 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.596064202 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:08 PM PDT 24 170576116 ps
T914 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.3876932615 Aug 16 06:27:11 PM PDT 24 Aug 16 06:27:15 PM PDT 24 408512750 ps
T915 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.682700874 Aug 16 06:27:03 PM PDT 24 Aug 16 06:27:12 PM PDT 24 2253750232 ps
T104 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.2805489865 Aug 16 06:26:45 PM PDT 24 Aug 16 06:26:48 PM PDT 24 511085891 ps
T916 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.4199396899 Aug 16 06:27:11 PM PDT 24 Aug 16 06:27:13 PM PDT 24 94229502 ps
T917 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.3987845513 Aug 16 06:27:12 PM PDT 24 Aug 16 06:27:14 PM PDT 24 51014418 ps
T918 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2300772385 Aug 16 06:27:03 PM PDT 24 Aug 16 06:27:06 PM PDT 24 149073130 ps
T919 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.2188785246 Aug 16 06:26:53 PM PDT 24 Aug 16 06:26:55 PM PDT 24 44918106 ps
T115 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.1911246497 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:08 PM PDT 24 170996677 ps
T167 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.3724764994 Aug 16 06:27:09 PM PDT 24 Aug 16 06:27:10 PM PDT 24 42833094 ps
T920 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.456825041 Aug 16 06:27:32 PM PDT 24 Aug 16 06:27:42 PM PDT 24 773237507 ps
T122 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.1471571220 Aug 16 06:26:54 PM PDT 24 Aug 16 06:26:58 PM PDT 24 46847739 ps
T921 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.733680229 Aug 16 06:27:34 PM PDT 24 Aug 16 06:27:36 PM PDT 24 31658330 ps
T922 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.722545413 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:08 PM PDT 24 82572639 ps
T923 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.725255829 Aug 16 06:26:55 PM PDT 24 Aug 16 06:27:05 PM PDT 24 3956967933 ps
T924 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.4210005693 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:08 PM PDT 24 98954637 ps
T925 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.1160861867 Aug 16 06:27:09 PM PDT 24 Aug 16 06:27:13 PM PDT 24 600599386 ps
T123 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.3272125337 Aug 16 06:27:15 PM PDT 24 Aug 16 06:27:17 PM PDT 24 225361025 ps
T926 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.1735931717 Aug 16 06:27:11 PM PDT 24 Aug 16 06:27:19 PM PDT 24 1871884300 ps
T119 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.3217720608 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:13 PM PDT 24 61630618 ps
T168 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.2503510124 Aug 16 06:27:09 PM PDT 24 Aug 16 06:27:10 PM PDT 24 14081555 ps
T176 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.1512200186 Aug 16 06:26:48 PM PDT 24 Aug 16 06:26:50 PM PDT 24 98987425 ps
T927 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.1576319464 Aug 16 06:26:51 PM PDT 24 Aug 16 06:26:55 PM PDT 24 6548007665 ps
T928 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.2881192390 Aug 16 06:27:05 PM PDT 24 Aug 16 06:27:06 PM PDT 24 29370867 ps
T929 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2732771696 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:09 PM PDT 24 90698310 ps
T930 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.1165014222 Aug 16 06:26:46 PM PDT 24 Aug 16 06:26:53 PM PDT 24 264344769 ps
T169 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.2808263684 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:08 PM PDT 24 16642899 ps
T931 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.1533952449 Aug 16 06:26:52 PM PDT 24 Aug 16 06:26:53 PM PDT 24 56889289 ps
T105 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.1111675225 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:15 PM PDT 24 385439436 ps
T170 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.3813221250 Aug 16 06:27:15 PM PDT 24 Aug 16 06:27:16 PM PDT 24 52829271 ps
T932 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.324094035 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:08 PM PDT 24 42643129 ps
T933 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.4061964721 Aug 16 06:27:11 PM PDT 24 Aug 16 06:27:12 PM PDT 24 72016547 ps
T934 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.1410278542 Aug 16 06:27:08 PM PDT 24 Aug 16 06:27:14 PM PDT 24 1375576262 ps
T935 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.457257649 Aug 16 06:27:13 PM PDT 24 Aug 16 06:27:15 PM PDT 24 28237217 ps
T936 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.1068499381 Aug 16 06:27:12 PM PDT 24 Aug 16 06:27:16 PM PDT 24 1748037744 ps
T937 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.2516927627 Aug 16 06:26:54 PM PDT 24 Aug 16 06:26:55 PM PDT 24 31444453 ps
T171 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.4028191893 Aug 16 06:27:08 PM PDT 24 Aug 16 06:27:10 PM PDT 24 46429345 ps
T172 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.3567609800 Aug 16 06:26:52 PM PDT 24 Aug 16 06:26:53 PM PDT 24 15019882 ps
T938 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.1171304283 Aug 16 06:27:13 PM PDT 24 Aug 16 06:27:15 PM PDT 24 44660525 ps
T939 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.2855735331 Aug 16 06:27:09 PM PDT 24 Aug 16 06:27:10 PM PDT 24 75809561 ps
T940 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.4244771535 Aug 16 06:26:47 PM PDT 24 Aug 16 06:26:48 PM PDT 24 46543594 ps
T941 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.2377154605 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:08 PM PDT 24 82735363 ps
T111 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.1156765261 Aug 16 06:27:13 PM PDT 24 Aug 16 06:27:19 PM PDT 24 737465087 ps
T116 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.926577543 Aug 16 06:26:40 PM PDT 24 Aug 16 06:26:43 PM PDT 24 302307959 ps
T942 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.1907040483 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:12 PM PDT 24 34033665 ps
T943 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.3487855636 Aug 16 06:27:15 PM PDT 24 Aug 16 06:27:16 PM PDT 24 80364658 ps
T944 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.3344219643 Aug 16 06:27:30 PM PDT 24 Aug 16 06:27:33 PM PDT 24 151128027 ps
T945 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.3392824457 Aug 16 06:27:12 PM PDT 24 Aug 16 06:27:14 PM PDT 24 142845317 ps
T173 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.1542954916 Aug 16 06:26:55 PM PDT 24 Aug 16 06:26:57 PM PDT 24 30284162 ps
T174 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.1549844437 Aug 16 06:26:50 PM PDT 24 Aug 16 06:26:51 PM PDT 24 12924700 ps
T946 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.2487885233 Aug 16 06:27:24 PM PDT 24 Aug 16 06:27:27 PM PDT 24 145248503 ps
T947 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3379698922 Aug 16 06:27:12 PM PDT 24 Aug 16 06:27:14 PM PDT 24 241171909 ps
T196 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.1992077688 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:08 PM PDT 24 799760625 ps
T948 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.1296810165 Aug 16 06:26:54 PM PDT 24 Aug 16 06:26:55 PM PDT 24 44900790 ps
T949 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.2886140221 Aug 16 06:27:11 PM PDT 24 Aug 16 06:27:12 PM PDT 24 53744158 ps
T106 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.4111814191 Aug 16 06:26:54 PM PDT 24 Aug 16 06:26:57 PM PDT 24 42177265 ps
T950 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.2389478386 Aug 16 06:26:57 PM PDT 24 Aug 16 06:26:58 PM PDT 24 83494908 ps
T113 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.2639673799 Aug 16 06:27:23 PM PDT 24 Aug 16 06:27:28 PM PDT 24 144550605 ps
T175 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.2674588346 Aug 16 06:27:22 PM PDT 24 Aug 16 06:27:23 PM PDT 24 18240799 ps
T951 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.1534252674 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:08 PM PDT 24 40498431 ps
T952 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.961374717 Aug 16 06:26:46 PM PDT 24 Aug 16 06:26:49 PM PDT 24 79041202 ps
T953 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.1751568736 Aug 16 06:27:03 PM PDT 24 Aug 16 06:27:06 PM PDT 24 592005840 ps
T954 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.1480775486 Aug 16 06:27:25 PM PDT 24 Aug 16 06:27:27 PM PDT 24 128124630 ps
T955 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.239955593 Aug 16 06:27:14 PM PDT 24 Aug 16 06:27:16 PM PDT 24 141008212 ps
T956 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.8722320 Aug 16 06:27:04 PM PDT 24 Aug 16 06:27:05 PM PDT 24 59612674 ps
T957 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.1728066921 Aug 16 06:26:55 PM PDT 24 Aug 16 06:27:08 PM PDT 24 2765685926 ps
T958 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.198880962 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:08 PM PDT 24 50095037 ps
T959 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.771180672 Aug 16 06:26:54 PM PDT 24 Aug 16 06:26:56 PM PDT 24 20203649 ps
T960 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.2003037296 Aug 16 06:27:05 PM PDT 24 Aug 16 06:27:13 PM PDT 24 1787785296 ps
T961 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.1821776022 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:11 PM PDT 24 35186001 ps
T962 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.988364939 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:12 PM PDT 24 44414023 ps
T963 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.597921515 Aug 16 06:27:05 PM PDT 24 Aug 16 06:27:06 PM PDT 24 67016217 ps
T117 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.3290373997 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:14 PM PDT 24 286735631 ps
T964 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.306526780 Aug 16 06:26:59 PM PDT 24 Aug 16 06:27:00 PM PDT 24 21937866 ps
T965 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.2138446704 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:08 PM PDT 24 119235253 ps
T966 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.3838556706 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:13 PM PDT 24 134975057 ps
T967 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.4048233133 Aug 16 06:26:54 PM PDT 24 Aug 16 06:26:56 PM PDT 24 116695422 ps
T968 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.2805828995 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:07 PM PDT 24 17470925 ps
T125 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.2538858928 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:09 PM PDT 24 122216772 ps
T969 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.1398001245 Aug 16 06:26:55 PM PDT 24 Aug 16 06:27:00 PM PDT 24 1216771230 ps
T970 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.3974364141 Aug 16 06:27:11 PM PDT 24 Aug 16 06:27:17 PM PDT 24 4008453346 ps
T971 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.443249431 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:12 PM PDT 24 60652742 ps
T972 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.3457755556 Aug 16 06:27:13 PM PDT 24 Aug 16 06:27:15 PM PDT 24 53169382 ps
T973 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.3406667845 Aug 16 06:27:13 PM PDT 24 Aug 16 06:27:15 PM PDT 24 54210101 ps
T974 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.2003375040 Aug 16 06:26:51 PM PDT 24 Aug 16 06:26:56 PM PDT 24 765493473 ps
T975 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.1485260882 Aug 16 06:26:45 PM PDT 24 Aug 16 06:26:47 PM PDT 24 64757631 ps
T976 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.2723289044 Aug 16 06:27:11 PM PDT 24 Aug 16 06:27:13 PM PDT 24 68869453 ps
T977 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.2595276033 Aug 16 06:27:11 PM PDT 24 Aug 16 06:27:12 PM PDT 24 115072986 ps
T978 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.3586858750 Aug 16 06:26:57 PM PDT 24 Aug 16 06:26:59 PM PDT 24 108343694 ps
T979 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.2605909853 Aug 16 06:26:41 PM PDT 24 Aug 16 06:26:44 PM PDT 24 391516688 ps
T980 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.3775798645 Aug 16 06:27:16 PM PDT 24 Aug 16 06:27:19 PM PDT 24 198693884 ps
T981 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.4244715355 Aug 16 06:26:45 PM PDT 24 Aug 16 06:26:53 PM PDT 24 697510879 ps
T982 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.252360694 Aug 16 06:27:02 PM PDT 24 Aug 16 06:27:05 PM PDT 24 176494884 ps
T983 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.1189029884 Aug 16 06:27:06 PM PDT 24 Aug 16 06:27:07 PM PDT 24 54329218 ps
T179 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.2701954759 Aug 16 06:27:41 PM PDT 24 Aug 16 06:27:42 PM PDT 24 19936038 ps
T984 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.1097640193 Aug 16 06:26:45 PM PDT 24 Aug 16 06:26:51 PM PDT 24 516913986 ps
T177 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.2116833106 Aug 16 06:26:45 PM PDT 24 Aug 16 06:26:46 PM PDT 24 47277442 ps
T985 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.2020284677 Aug 16 06:26:52 PM PDT 24 Aug 16 06:26:54 PM PDT 24 120397364 ps
T986 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.3621648642 Aug 16 06:26:42 PM PDT 24 Aug 16 06:26:52 PM PDT 24 4386003114 ps
T178 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.3531666011 Aug 16 06:26:54 PM PDT 24 Aug 16 06:26:56 PM PDT 24 73680474 ps
T987 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.4091567680 Aug 16 06:27:13 PM PDT 24 Aug 16 06:27:15 PM PDT 24 188883799 ps
T988 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.1377826342 Aug 16 06:26:42 PM PDT 24 Aug 16 06:26:44 PM PDT 24 70083183 ps
T989 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.639953323 Aug 16 06:27:11 PM PDT 24 Aug 16 06:27:13 PM PDT 24 32428209 ps
T124 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.2241878622 Aug 16 06:27:19 PM PDT 24 Aug 16 06:27:22 PM PDT 24 67574730 ps
T990 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.4125297240 Aug 16 06:27:12 PM PDT 24 Aug 16 06:27:14 PM PDT 24 249994404 ps
T991 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.2544909928 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:08 PM PDT 24 24118081 ps
T992 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.1373936055 Aug 16 06:27:04 PM PDT 24 Aug 16 06:27:07 PM PDT 24 86274486 ps
T993 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.1190337131 Aug 16 06:27:10 PM PDT 24 Aug 16 06:27:16 PM PDT 24 2159634945 ps
T994 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.2815798308 Aug 16 06:26:45 PM PDT 24 Aug 16 06:26:48 PM PDT 24 334298446 ps
T995 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.397115082 Aug 16 06:27:11 PM PDT 24 Aug 16 06:27:13 PM PDT 24 101249327 ps
T996 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.971453640 Aug 16 06:27:14 PM PDT 24 Aug 16 06:27:16 PM PDT 24 118260608 ps
T121 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.3166192865 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:10 PM PDT 24 2747100841 ps
T997 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.4282725917 Aug 16 06:27:07 PM PDT 24 Aug 16 06:27:08 PM PDT 24 26483484 ps
T998 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.2002382259 Aug 16 06:27:13 PM PDT 24 Aug 16 06:27:19 PM PDT 24 787668139 ps
T999 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.1045258332 Aug 16 06:27:12 PM PDT 24 Aug 16 06:27:14 PM PDT 24 165361453 ps
T1000 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.2244919213 Aug 16 06:27:11 PM PDT 24 Aug 16 06:27:14 PM PDT 24 400723551 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%