| T819 |
/workspace/coverage/default/16.lc_ctrl_jtag_errors.2946908431 |
|
|
Apr 25 02:40:42 PM PDT 24 |
Apr 25 02:42:14 PM PDT 24 |
3333082611 ps |
| T820 |
/workspace/coverage/default/26.lc_ctrl_sec_token_mux.3537284388 |
|
|
Apr 25 02:41:19 PM PDT 24 |
Apr 25 02:41:33 PM PDT 24 |
4087209414 ps |
| T821 |
/workspace/coverage/default/5.lc_ctrl_jtag_access.922115181 |
|
|
Apr 25 02:39:54 PM PDT 24 |
Apr 25 02:40:18 PM PDT 24 |
10043228050 ps |
| T822 |
/workspace/coverage/default/35.lc_ctrl_state_post_trans.294276617 |
|
|
Apr 25 02:41:43 PM PDT 24 |
Apr 25 02:41:53 PM PDT 24 |
414728691 ps |
| T823 |
/workspace/coverage/default/20.lc_ctrl_security_escalation.4170133982 |
|
|
Apr 25 02:40:57 PM PDT 24 |
Apr 25 02:41:13 PM PDT 24 |
1532927436 ps |
| T824 |
/workspace/coverage/default/43.lc_ctrl_volatile_unlock_smoke.3575954916 |
|
|
Apr 25 02:42:04 PM PDT 24 |
Apr 25 02:42:06 PM PDT 24 |
29811267 ps |
| T221 |
/workspace/coverage/default/5.lc_ctrl_claim_transition_if.3396967547 |
|
|
Apr 25 02:39:55 PM PDT 24 |
Apr 25 02:39:58 PM PDT 24 |
18045880 ps |
| T825 |
/workspace/coverage/default/30.lc_ctrl_sec_mubi.1600144824 |
|
|
Apr 25 02:41:35 PM PDT 24 |
Apr 25 02:41:49 PM PDT 24 |
1596095014 ps |
| T826 |
/workspace/coverage/default/25.lc_ctrl_sec_token_mux.220735067 |
|
|
Apr 25 02:41:14 PM PDT 24 |
Apr 25 02:41:24 PM PDT 24 |
1168770530 ps |
| T827 |
/workspace/coverage/default/2.lc_ctrl_volatile_unlock_smoke.1170128552 |
|
|
Apr 25 02:39:43 PM PDT 24 |
Apr 25 02:39:45 PM PDT 24 |
68481626 ps |
| T828 |
/workspace/coverage/default/2.lc_ctrl_smoke.2417309948 |
|
|
Apr 25 02:39:41 PM PDT 24 |
Apr 25 02:39:45 PM PDT 24 |
53801928 ps |
| T829 |
/workspace/coverage/default/49.lc_ctrl_sec_token_mux.945426916 |
|
|
Apr 25 02:42:27 PM PDT 24 |
Apr 25 02:42:36 PM PDT 24 |
284763641 ps |
| T830 |
/workspace/coverage/default/5.lc_ctrl_sec_token_mux.2855211468 |
|
|
Apr 25 02:39:55 PM PDT 24 |
Apr 25 02:40:04 PM PDT 24 |
182016158 ps |
| T831 |
/workspace/coverage/default/24.lc_ctrl_state_post_trans.4076842687 |
|
|
Apr 25 02:41:14 PM PDT 24 |
Apr 25 02:41:22 PM PDT 24 |
174924642 ps |
| T832 |
/workspace/coverage/default/21.lc_ctrl_security_escalation.3983365239 |
|
|
Apr 25 02:40:55 PM PDT 24 |
Apr 25 02:41:06 PM PDT 24 |
257197491 ps |
| T833 |
/workspace/coverage/default/34.lc_ctrl_security_escalation.132764574 |
|
|
Apr 25 02:41:43 PM PDT 24 |
Apr 25 02:41:52 PM PDT 24 |
624337598 ps |
| T834 |
/workspace/coverage/default/3.lc_ctrl_errors.1166330578 |
|
|
Apr 25 02:39:50 PM PDT 24 |
Apr 25 02:40:06 PM PDT 24 |
3535976259 ps |
| T835 |
/workspace/coverage/default/24.lc_ctrl_state_failure.3248571190 |
|
|
Apr 25 02:41:23 PM PDT 24 |
Apr 25 02:41:49 PM PDT 24 |
438307330 ps |
| T836 |
/workspace/coverage/default/23.lc_ctrl_sec_token_digest.2137711252 |
|
|
Apr 25 02:41:09 PM PDT 24 |
Apr 25 02:41:23 PM PDT 24 |
1041536126 ps |
| T837 |
/workspace/coverage/default/17.lc_ctrl_alert_test.3505192308 |
|
|
Apr 25 02:40:51 PM PDT 24 |
Apr 25 02:40:55 PM PDT 24 |
13557693 ps |
| T838 |
/workspace/coverage/default/12.lc_ctrl_sec_token_mux.990310115 |
|
|
Apr 25 02:40:29 PM PDT 24 |
Apr 25 02:40:38 PM PDT 24 |
624611938 ps |
| T839 |
/workspace/coverage/default/31.lc_ctrl_stress_all.3450492232 |
|
|
Apr 25 02:41:36 PM PDT 24 |
Apr 25 02:43:17 PM PDT 24 |
41766506037 ps |
| T840 |
/workspace/coverage/default/19.lc_ctrl_jtag_state_post_trans.624740321 |
|
|
Apr 25 02:40:55 PM PDT 24 |
Apr 25 02:41:10 PM PDT 24 |
909484564 ps |
| T841 |
/workspace/coverage/default/39.lc_ctrl_stress_all_with_rand_reset.1287297584 |
|
|
Apr 25 02:41:58 PM PDT 24 |
Apr 25 02:52:49 PM PDT 24 |
34394968315 ps |
| T842 |
/workspace/coverage/default/1.lc_ctrl_smoke.2411118167 |
|
|
Apr 25 02:39:38 PM PDT 24 |
Apr 25 02:39:41 PM PDT 24 |
187082891 ps |
| T843 |
/workspace/coverage/default/19.lc_ctrl_jtag_smoke.463167883 |
|
|
Apr 25 02:40:52 PM PDT 24 |
Apr 25 02:40:57 PM PDT 24 |
118674377 ps |
| T844 |
/workspace/coverage/default/11.lc_ctrl_security_escalation.2401563108 |
|
|
Apr 25 02:40:17 PM PDT 24 |
Apr 25 02:40:28 PM PDT 24 |
1531164892 ps |
| T845 |
/workspace/coverage/default/0.lc_ctrl_stress_all_with_rand_reset.2185258322 |
|
|
Apr 25 02:39:35 PM PDT 24 |
Apr 25 02:46:47 PM PDT 24 |
31982542656 ps |
| T224 |
/workspace/coverage/default/36.lc_ctrl_stress_all_with_rand_reset.3888682554 |
|
|
Apr 25 02:41:58 PM PDT 24 |
Apr 25 02:48:58 PM PDT 24 |
14191787013 ps |
| T846 |
/workspace/coverage/default/30.lc_ctrl_prog_failure.977407316 |
|
|
Apr 25 02:41:33 PM PDT 24 |
Apr 25 02:41:35 PM PDT 24 |
15634629 ps |
| T847 |
/workspace/coverage/default/7.lc_ctrl_jtag_state_post_trans.2492429793 |
|
|
Apr 25 02:40:01 PM PDT 24 |
Apr 25 02:40:18 PM PDT 24 |
349200041 ps |
| T848 |
/workspace/coverage/default/45.lc_ctrl_volatile_unlock_smoke.1821809357 |
|
|
Apr 25 02:42:17 PM PDT 24 |
Apr 25 02:42:20 PM PDT 24 |
37238242 ps |
| T849 |
/workspace/coverage/default/37.lc_ctrl_sec_mubi.1597271807 |
|
|
Apr 25 02:41:57 PM PDT 24 |
Apr 25 02:42:11 PM PDT 24 |
280910346 ps |
| T850 |
/workspace/coverage/default/8.lc_ctrl_jtag_access.1094423727 |
|
|
Apr 25 02:40:08 PM PDT 24 |
Apr 25 02:40:14 PM PDT 24 |
1002065495 ps |
| T851 |
/workspace/coverage/default/45.lc_ctrl_alert_test.3008961894 |
|
|
Apr 25 02:42:17 PM PDT 24 |
Apr 25 02:42:19 PM PDT 24 |
59172222 ps |
| T852 |
/workspace/coverage/default/22.lc_ctrl_state_failure.3851347383 |
|
|
Apr 25 02:41:02 PM PDT 24 |
Apr 25 02:41:26 PM PDT 24 |
673471268 ps |
| T853 |
/workspace/coverage/default/29.lc_ctrl_smoke.4185632871 |
|
|
Apr 25 02:41:26 PM PDT 24 |
Apr 25 02:41:30 PM PDT 24 |
353378286 ps |
| T854 |
/workspace/coverage/default/4.lc_ctrl_jtag_state_failure.2760066636 |
|
|
Apr 25 02:39:54 PM PDT 24 |
Apr 25 02:40:48 PM PDT 24 |
1357573279 ps |
| T855 |
/workspace/coverage/default/4.lc_ctrl_errors.3565315648 |
|
|
Apr 25 02:39:49 PM PDT 24 |
Apr 25 02:40:05 PM PDT 24 |
318627744 ps |
| T856 |
/workspace/coverage/default/19.lc_ctrl_security_escalation.947279073 |
|
|
Apr 25 02:40:53 PM PDT 24 |
Apr 25 02:41:02 PM PDT 24 |
505433362 ps |
| T857 |
/workspace/coverage/default/8.lc_ctrl_volatile_unlock_smoke.777916710 |
|
|
Apr 25 02:40:08 PM PDT 24 |
Apr 25 02:40:12 PM PDT 24 |
42132390 ps |
| T858 |
/workspace/coverage/default/37.lc_ctrl_state_post_trans.2098403296 |
|
|
Apr 25 02:41:53 PM PDT 24 |
Apr 25 02:42:06 PM PDT 24 |
655845669 ps |
| T859 |
/workspace/coverage/default/9.lc_ctrl_jtag_priority.1905274507 |
|
|
Apr 25 02:40:10 PM PDT 24 |
Apr 25 02:40:17 PM PDT 24 |
204495985 ps |
| T860 |
/workspace/coverage/default/0.lc_ctrl_state_failure.2483613612 |
|
|
Apr 25 02:39:29 PM PDT 24 |
Apr 25 02:39:56 PM PDT 24 |
207918198 ps |
| T861 |
/workspace/coverage/default/24.lc_ctrl_prog_failure.2810776292 |
|
|
Apr 25 02:41:09 PM PDT 24 |
Apr 25 02:41:13 PM PDT 24 |
127494809 ps |
| T862 |
/workspace/coverage/default/8.lc_ctrl_prog_failure.1742508852 |
|
|
Apr 25 02:40:09 PM PDT 24 |
Apr 25 02:40:15 PM PDT 24 |
91334486 ps |
| T863 |
/workspace/coverage/default/37.lc_ctrl_prog_failure.75815151 |
|
|
Apr 25 02:41:56 PM PDT 24 |
Apr 25 02:42:00 PM PDT 24 |
98934304 ps |
| T864 |
/workspace/coverage/default/12.lc_ctrl_security_escalation.4222435214 |
|
|
Apr 25 02:40:25 PM PDT 24 |
Apr 25 02:40:35 PM PDT 24 |
1213678288 ps |
| T865 |
/workspace/coverage/default/39.lc_ctrl_jtag_access.2398332511 |
|
|
Apr 25 02:41:58 PM PDT 24 |
Apr 25 02:42:10 PM PDT 24 |
1619592114 ps |
| T866 |
/workspace/coverage/default/47.lc_ctrl_sec_mubi.493326340 |
|
|
Apr 25 02:42:22 PM PDT 24 |
Apr 25 02:42:36 PM PDT 24 |
408078107 ps |
| T867 |
/workspace/coverage/default/2.lc_ctrl_security_escalation.3661585503 |
|
|
Apr 25 02:39:43 PM PDT 24 |
Apr 25 02:39:54 PM PDT 24 |
236164067 ps |
| T868 |
/workspace/coverage/default/15.lc_ctrl_state_post_trans.2902672536 |
|
|
Apr 25 02:40:37 PM PDT 24 |
Apr 25 02:40:48 PM PDT 24 |
52340096 ps |
| T869 |
/workspace/coverage/default/5.lc_ctrl_jtag_prog_failure.2858711607 |
|
|
Apr 25 02:39:57 PM PDT 24 |
Apr 25 02:40:04 PM PDT 24 |
260032908 ps |
| T870 |
/workspace/coverage/default/42.lc_ctrl_sec_token_digest.3836070187 |
|
|
Apr 25 02:42:07 PM PDT 24 |
Apr 25 02:42:16 PM PDT 24 |
1439828827 ps |
| T871 |
/workspace/coverage/default/20.lc_ctrl_state_post_trans.3831531044 |
|
|
Apr 25 02:40:55 PM PDT 24 |
Apr 25 02:41:04 PM PDT 24 |
177560052 ps |
| T872 |
/workspace/coverage/default/27.lc_ctrl_smoke.1298917442 |
|
|
Apr 25 02:41:20 PM PDT 24 |
Apr 25 02:41:27 PM PDT 24 |
89413008 ps |
| T873 |
/workspace/coverage/default/49.lc_ctrl_volatile_unlock_smoke.3470741125 |
|
|
Apr 25 02:42:28 PM PDT 24 |
Apr 25 02:42:30 PM PDT 24 |
30265175 ps |
| T874 |
/workspace/coverage/default/15.lc_ctrl_sec_token_mux.1471307687 |
|
|
Apr 25 02:40:40 PM PDT 24 |
Apr 25 02:40:58 PM PDT 24 |
1328447178 ps |
| T875 |
/workspace/coverage/default/2.lc_ctrl_jtag_errors.3752373425 |
|
|
Apr 25 02:39:44 PM PDT 24 |
Apr 25 02:41:33 PM PDT 24 |
7810538749 ps |
| T876 |
/workspace/coverage/default/14.lc_ctrl_jtag_access.4286679326 |
|
|
Apr 25 02:40:38 PM PDT 24 |
Apr 25 02:40:53 PM PDT 24 |
2375344566 ps |
| T877 |
/workspace/coverage/default/13.lc_ctrl_sec_mubi.2626597866 |
|
|
Apr 25 02:40:36 PM PDT 24 |
Apr 25 02:40:49 PM PDT 24 |
405694417 ps |
| T878 |
/workspace/coverage/default/36.lc_ctrl_stress_all.2256890499 |
|
|
Apr 25 02:41:55 PM PDT 24 |
Apr 25 02:46:12 PM PDT 24 |
10622006140 ps |
| T879 |
/workspace/coverage/default/26.lc_ctrl_state_post_trans.955305369 |
|
|
Apr 25 02:41:15 PM PDT 24 |
Apr 25 02:41:24 PM PDT 24 |
73114931 ps |
| T880 |
/workspace/coverage/default/39.lc_ctrl_prog_failure.2172080187 |
|
|
Apr 25 02:41:57 PM PDT 24 |
Apr 25 02:42:02 PM PDT 24 |
246401137 ps |
| T881 |
/workspace/coverage/default/4.lc_ctrl_smoke.343556892 |
|
|
Apr 25 02:39:49 PM PDT 24 |
Apr 25 02:40:01 PM PDT 24 |
151707290 ps |
| T882 |
/workspace/coverage/default/20.lc_ctrl_sec_token_mux.794800519 |
|
|
Apr 25 02:40:57 PM PDT 24 |
Apr 25 02:41:05 PM PDT 24 |
4122648341 ps |
| T883 |
/workspace/coverage/default/13.lc_ctrl_jtag_state_failure.2050965540 |
|
|
Apr 25 02:40:38 PM PDT 24 |
Apr 25 02:41:39 PM PDT 24 |
19961371808 ps |
| T884 |
/workspace/coverage/default/47.lc_ctrl_errors.2285613522 |
|
|
Apr 25 02:42:23 PM PDT 24 |
Apr 25 02:42:38 PM PDT 24 |
363413173 ps |
| T885 |
/workspace/coverage/default/30.lc_ctrl_jtag_access.999677486 |
|
|
Apr 25 02:41:35 PM PDT 24 |
Apr 25 02:41:38 PM PDT 24 |
50745437 ps |
| T886 |
/workspace/coverage/default/30.lc_ctrl_security_escalation.909768807 |
|
|
Apr 25 02:41:32 PM PDT 24 |
Apr 25 02:41:42 PM PDT 24 |
408995413 ps |
| T117 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.513925783 |
|
|
Apr 25 12:47:23 PM PDT 24 |
Apr 25 12:47:31 PM PDT 24 |
224352192 ps |
| T130 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.3605921240 |
|
|
Apr 25 12:47:22 PM PDT 24 |
Apr 25 12:47:36 PM PDT 24 |
577109053 ps |
| T131 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.1279345440 |
|
|
Apr 25 12:47:25 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
16478169 ps |
| T123 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.249721045 |
|
|
Apr 25 12:47:18 PM PDT 24 |
Apr 25 12:47:22 PM PDT 24 |
18735274 ps |
| T124 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.3471102722 |
|
|
Apr 25 12:47:31 PM PDT 24 |
Apr 25 12:47:34 PM PDT 24 |
26771937 ps |
| T118 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.2798437676 |
|
|
Apr 25 12:47:08 PM PDT 24 |
Apr 25 12:47:10 PM PDT 24 |
24191775 ps |
| T119 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.42414929 |
|
|
Apr 25 12:47:32 PM PDT 24 |
Apr 25 12:47:38 PM PDT 24 |
695181232 ps |
| T194 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.2263931653 |
|
|
Apr 25 12:47:18 PM PDT 24 |
Apr 25 12:47:22 PM PDT 24 |
111761822 ps |
| T120 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.4183895474 |
|
|
Apr 25 12:47:45 PM PDT 24 |
Apr 25 12:47:50 PM PDT 24 |
121432998 ps |
| T887 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.1296637016 |
|
|
Apr 25 12:47:22 PM PDT 24 |
Apr 25 12:47:25 PM PDT 24 |
19491482 ps |
| T211 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.3362794962 |
|
|
Apr 25 12:47:20 PM PDT 24 |
Apr 25 12:47:24 PM PDT 24 |
352110593 ps |
| T160 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.1185095250 |
|
|
Apr 25 12:47:07 PM PDT 24 |
Apr 25 12:47:11 PM PDT 24 |
164954308 ps |
| T153 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.233426641 |
|
|
Apr 25 12:47:00 PM PDT 24 |
Apr 25 12:47:03 PM PDT 24 |
191221713 ps |
| T121 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.2922389762 |
|
|
Apr 25 12:47:00 PM PDT 24 |
Apr 25 12:47:05 PM PDT 24 |
402294767 ps |
| T152 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.2953687009 |
|
|
Apr 25 12:47:14 PM PDT 24 |
Apr 25 12:47:21 PM PDT 24 |
429989982 ps |
| T122 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.319952009 |
|
|
Apr 25 12:47:22 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
144671054 ps |
| T888 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.899235045 |
|
|
Apr 25 12:47:16 PM PDT 24 |
Apr 25 12:47:19 PM PDT 24 |
23039875 ps |
| T889 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.4243462007 |
|
|
Apr 25 12:47:20 PM PDT 24 |
Apr 25 12:47:23 PM PDT 24 |
86451529 ps |
| T890 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.1061672991 |
|
|
Apr 25 12:47:10 PM PDT 24 |
Apr 25 12:47:12 PM PDT 24 |
333887460 ps |
| T149 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.1181616229 |
|
|
Apr 25 12:47:21 PM PDT 24 |
Apr 25 12:47:26 PM PDT 24 |
159213450 ps |
| T132 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.1338275131 |
|
|
Apr 25 12:47:16 PM PDT 24 |
Apr 25 12:47:21 PM PDT 24 |
105908940 ps |
| T174 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1875276094 |
|
|
Apr 25 12:47:06 PM PDT 24 |
Apr 25 12:47:09 PM PDT 24 |
394788069 ps |
| T212 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.3747554223 |
|
|
Apr 25 12:47:29 PM PDT 24 |
Apr 25 12:47:32 PM PDT 24 |
21978525 ps |
| T161 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.512797204 |
|
|
Apr 25 12:47:43 PM PDT 24 |
Apr 25 12:47:47 PM PDT 24 |
265949498 ps |
| T193 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1995512401 |
|
|
Apr 25 12:47:02 PM PDT 24 |
Apr 25 12:47:09 PM PDT 24 |
462714942 ps |
| T891 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.2566426758 |
|
|
Apr 25 12:47:23 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
359091662 ps |
| T213 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.4130752015 |
|
|
Apr 25 12:47:44 PM PDT 24 |
Apr 25 12:47:47 PM PDT 24 |
66172519 ps |
| T892 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.3080963721 |
|
|
Apr 25 12:47:16 PM PDT 24 |
Apr 25 12:47:19 PM PDT 24 |
15884049 ps |
| T214 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.3996511913 |
|
|
Apr 25 12:47:35 PM PDT 24 |
Apr 25 12:47:39 PM PDT 24 |
68613172 ps |
| T893 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.3194744298 |
|
|
Apr 25 12:47:09 PM PDT 24 |
Apr 25 12:47:14 PM PDT 24 |
1899459519 ps |
| T162 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.2376906406 |
|
|
Apr 25 12:47:01 PM PDT 24 |
Apr 25 12:47:03 PM PDT 24 |
30379426 ps |
| T894 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.1025267151 |
|
|
Apr 25 12:47:08 PM PDT 24 |
Apr 25 12:47:11 PM PDT 24 |
68761634 ps |
| T895 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2227115474 |
|
|
Apr 25 12:47:09 PM PDT 24 |
Apr 25 12:47:11 PM PDT 24 |
56099508 ps |
| T137 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.411753313 |
|
|
Apr 25 12:47:23 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
112334084 ps |
| T896 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.1481507265 |
|
|
Apr 25 12:47:20 PM PDT 24 |
Apr 25 12:47:24 PM PDT 24 |
137196972 ps |
| T897 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.3659436840 |
|
|
Apr 25 12:47:44 PM PDT 24 |
Apr 25 12:47:48 PM PDT 24 |
57222223 ps |
| T146 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.2956806638 |
|
|
Apr 25 12:47:24 PM PDT 24 |
Apr 25 12:47:29 PM PDT 24 |
154998090 ps |
| T127 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.298551472 |
|
|
Apr 25 12:47:21 PM PDT 24 |
Apr 25 12:47:25 PM PDT 24 |
25001546 ps |
| T215 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.1658454052 |
|
|
Apr 25 12:47:34 PM PDT 24 |
Apr 25 12:47:36 PM PDT 24 |
66737707 ps |
| T898 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.1051185626 |
|
|
Apr 25 12:47:01 PM PDT 24 |
Apr 25 12:47:45 PM PDT 24 |
2012529643 ps |
| T899 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.3675357124 |
|
|
Apr 25 12:47:10 PM PDT 24 |
Apr 25 12:47:12 PM PDT 24 |
130897558 ps |
| T195 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.1233564399 |
|
|
Apr 25 12:47:07 PM PDT 24 |
Apr 25 12:47:09 PM PDT 24 |
59809524 ps |
| T196 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.3165244503 |
|
|
Apr 25 12:47:38 PM PDT 24 |
Apr 25 12:47:41 PM PDT 24 |
54528178 ps |
| T128 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.2408684515 |
|
|
Apr 25 12:47:22 PM PDT 24 |
Apr 25 12:47:27 PM PDT 24 |
398597751 ps |
| T900 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.1249156587 |
|
|
Apr 25 12:47:16 PM PDT 24 |
Apr 25 12:47:37 PM PDT 24 |
811182724 ps |
| T901 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.2224258874 |
|
|
Apr 25 12:47:14 PM PDT 24 |
Apr 25 12:47:23 PM PDT 24 |
1364983819 ps |
| T902 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.933036213 |
|
|
Apr 25 12:47:06 PM PDT 24 |
Apr 25 12:47:33 PM PDT 24 |
1219405282 ps |
| T903 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.4045898027 |
|
|
Apr 25 12:47:14 PM PDT 24 |
Apr 25 12:47:16 PM PDT 24 |
33700151 ps |
| T216 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.1058520581 |
|
|
Apr 25 12:47:24 PM PDT 24 |
Apr 25 12:47:27 PM PDT 24 |
29893564 ps |
| T150 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.766240134 |
|
|
Apr 25 12:47:25 PM PDT 24 |
Apr 25 12:47:35 PM PDT 24 |
860808337 ps |
| T133 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.1737455186 |
|
|
Apr 25 12:47:20 PM PDT 24 |
Apr 25 12:47:24 PM PDT 24 |
84537996 ps |
| T151 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.4200103217 |
|
|
Apr 25 12:47:06 PM PDT 24 |
Apr 25 12:47:09 PM PDT 24 |
108568992 ps |
| T904 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.3959085673 |
|
|
Apr 25 12:47:05 PM PDT 24 |
Apr 25 12:47:08 PM PDT 24 |
905899423 ps |
| T905 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.4073773036 |
|
|
Apr 25 12:47:19 PM PDT 24 |
Apr 25 12:47:22 PM PDT 24 |
37019364 ps |
| T906 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.1746584303 |
|
|
Apr 25 12:47:25 PM PDT 24 |
Apr 25 12:47:29 PM PDT 24 |
2611176222 ps |
| T145 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.663681980 |
|
|
Apr 25 12:47:46 PM PDT 24 |
Apr 25 12:47:52 PM PDT 24 |
127277487 ps |
| T907 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.1287417020 |
|
|
Apr 25 12:47:19 PM PDT 24 |
Apr 25 12:47:23 PM PDT 24 |
20098136 ps |
| T908 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.3590234725 |
|
|
Apr 25 12:47:23 PM PDT 24 |
Apr 25 12:47:26 PM PDT 24 |
23816318 ps |
| T125 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.3116558714 |
|
|
Apr 25 12:47:07 PM PDT 24 |
Apr 25 12:47:10 PM PDT 24 |
29901160 ps |
| T909 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.1816682450 |
|
|
Apr 25 12:47:08 PM PDT 24 |
Apr 25 12:47:11 PM PDT 24 |
82346685 ps |
| T144 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.3570436979 |
|
|
Apr 25 12:47:44 PM PDT 24 |
Apr 25 12:47:49 PM PDT 24 |
206426790 ps |
| T910 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.1717834142 |
|
|
Apr 25 12:47:32 PM PDT 24 |
Apr 25 12:47:36 PM PDT 24 |
141462486 ps |
| T911 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.202825947 |
|
|
Apr 25 12:47:42 PM PDT 24 |
Apr 25 12:47:45 PM PDT 24 |
42029130 ps |
| T912 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.379733782 |
|
|
Apr 25 12:47:08 PM PDT 24 |
Apr 25 12:47:15 PM PDT 24 |
430690855 ps |
| T913 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.185804676 |
|
|
Apr 25 12:47:16 PM PDT 24 |
Apr 25 12:47:20 PM PDT 24 |
40356401 ps |
| T914 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.1151760944 |
|
|
Apr 25 12:47:03 PM PDT 24 |
Apr 25 12:47:12 PM PDT 24 |
617385456 ps |
| T915 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.2427648140 |
|
|
Apr 25 12:47:49 PM PDT 24 |
Apr 25 12:47:55 PM PDT 24 |
120698950 ps |
| T916 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.1615009452 |
|
|
Apr 25 12:47:05 PM PDT 24 |
Apr 25 12:47:07 PM PDT 24 |
14760199 ps |
| T135 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.507879983 |
|
|
Apr 25 12:47:15 PM PDT 24 |
Apr 25 12:47:19 PM PDT 24 |
217508625 ps |
| T917 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.966715875 |
|
|
Apr 25 12:47:46 PM PDT 24 |
Apr 25 12:47:49 PM PDT 24 |
42502597 ps |
| T197 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.1451537398 |
|
|
Apr 25 12:47:28 PM PDT 24 |
Apr 25 12:47:31 PM PDT 24 |
12273471 ps |
| T140 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.3202875156 |
|
|
Apr 25 12:47:02 PM PDT 24 |
Apr 25 12:47:06 PM PDT 24 |
319551457 ps |
| T918 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.398051283 |
|
|
Apr 25 12:47:12 PM PDT 24 |
Apr 25 12:47:15 PM PDT 24 |
19737686 ps |
| T129 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.2598345486 |
|
|
Apr 25 12:47:15 PM PDT 24 |
Apr 25 12:47:19 PM PDT 24 |
35715075 ps |
| T919 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.1376611332 |
|
|
Apr 25 12:47:14 PM PDT 24 |
Apr 25 12:47:24 PM PDT 24 |
673496294 ps |
| T920 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.346868870 |
|
|
Apr 25 12:47:05 PM PDT 24 |
Apr 25 12:47:08 PM PDT 24 |
133015263 ps |
| T921 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.3481658601 |
|
|
Apr 25 12:47:23 PM PDT 24 |
Apr 25 12:47:27 PM PDT 24 |
256844118 ps |
| T198 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.3645956312 |
|
|
Apr 25 12:47:12 PM PDT 24 |
Apr 25 12:47:14 PM PDT 24 |
124712878 ps |
| T922 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.797125208 |
|
|
Apr 25 12:47:47 PM PDT 24 |
Apr 25 12:47:52 PM PDT 24 |
90380481 ps |
| T923 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.2061597136 |
|
|
Apr 25 12:47:01 PM PDT 24 |
Apr 25 12:47:04 PM PDT 24 |
67020834 ps |
| T924 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.468300154 |
|
|
Apr 25 12:47:24 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
134755147 ps |
| T925 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.724860376 |
|
|
Apr 25 12:47:15 PM PDT 24 |
Apr 25 12:47:19 PM PDT 24 |
83175032 ps |
| T926 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.1182853995 |
|
|
Apr 25 12:47:34 PM PDT 24 |
Apr 25 12:47:37 PM PDT 24 |
83735725 ps |
| T199 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.4126903870 |
|
|
Apr 25 12:47:12 PM PDT 24 |
Apr 25 12:47:13 PM PDT 24 |
27747110 ps |
| T927 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.4247836274 |
|
|
Apr 25 12:47:14 PM PDT 24 |
Apr 25 12:47:17 PM PDT 24 |
18610983 ps |
| T136 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.1308850300 |
|
|
Apr 25 12:47:46 PM PDT 24 |
Apr 25 12:47:53 PM PDT 24 |
129097693 ps |
| T126 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.3573465667 |
|
|
Apr 25 12:47:24 PM PDT 24 |
Apr 25 12:47:30 PM PDT 24 |
480976635 ps |
| T928 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.2006158242 |
|
|
Apr 25 12:47:29 PM PDT 24 |
Apr 25 12:47:33 PM PDT 24 |
47782696 ps |
| T929 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.1533838462 |
|
|
Apr 25 12:47:30 PM PDT 24 |
Apr 25 12:47:34 PM PDT 24 |
123010350 ps |
| T200 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.3078010919 |
|
|
Apr 25 12:47:21 PM PDT 24 |
Apr 25 12:47:24 PM PDT 24 |
46521429 ps |
| T930 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.776849504 |
|
|
Apr 25 12:47:08 PM PDT 24 |
Apr 25 12:47:16 PM PDT 24 |
571885368 ps |
| T141 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.2553761739 |
|
|
Apr 25 12:47:36 PM PDT 24 |
Apr 25 12:47:40 PM PDT 24 |
55569182 ps |
| T201 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.7040947 |
|
|
Apr 25 12:47:08 PM PDT 24 |
Apr 25 12:47:10 PM PDT 24 |
22282581 ps |
| T931 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.2898228702 |
|
|
Apr 25 12:47:18 PM PDT 24 |
Apr 25 12:47:21 PM PDT 24 |
323348936 ps |
| T932 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3605157143 |
|
|
Apr 25 12:47:13 PM PDT 24 |
Apr 25 12:47:16 PM PDT 24 |
299735848 ps |
| T933 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.2259134179 |
|
|
Apr 25 12:47:14 PM PDT 24 |
Apr 25 12:47:18 PM PDT 24 |
411793256 ps |
| T934 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.514887392 |
|
|
Apr 25 12:47:16 PM PDT 24 |
Apr 25 12:47:20 PM PDT 24 |
16974954 ps |
| T935 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.666247865 |
|
|
Apr 25 12:47:24 PM PDT 24 |
Apr 25 12:47:29 PM PDT 24 |
93174618 ps |
| T936 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.2990335592 |
|
|
Apr 25 12:47:14 PM PDT 24 |
Apr 25 12:47:38 PM PDT 24 |
3622475347 ps |
| T937 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.3413553278 |
|
|
Apr 25 12:47:07 PM PDT 24 |
Apr 25 12:47:10 PM PDT 24 |
13461560 ps |
| T202 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.409046464 |
|
|
Apr 25 12:47:31 PM PDT 24 |
Apr 25 12:47:34 PM PDT 24 |
51857098 ps |
| T938 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.332398454 |
|
|
Apr 25 12:47:19 PM PDT 24 |
Apr 25 12:47:23 PM PDT 24 |
36505025 ps |
| T939 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.3511574935 |
|
|
Apr 25 12:47:15 PM PDT 24 |
Apr 25 12:47:18 PM PDT 24 |
160169405 ps |
| T940 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.2053512539 |
|
|
Apr 25 12:47:20 PM PDT 24 |
Apr 25 12:47:24 PM PDT 24 |
26997286 ps |
| T941 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.3930800077 |
|
|
Apr 25 12:47:14 PM PDT 24 |
Apr 25 12:47:17 PM PDT 24 |
24765781 ps |
| T942 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.2652472464 |
|
|
Apr 25 12:47:20 PM PDT 24 |
Apr 25 12:47:25 PM PDT 24 |
171795623 ps |
| T943 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.876390173 |
|
|
Apr 25 12:47:33 PM PDT 24 |
Apr 25 12:47:36 PM PDT 24 |
32828011 ps |
| T944 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1859615958 |
|
|
Apr 25 12:47:20 PM PDT 24 |
Apr 25 12:47:24 PM PDT 24 |
440361337 ps |
| T945 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.4001071348 |
|
|
Apr 25 12:47:15 PM PDT 24 |
Apr 25 12:47:18 PM PDT 24 |
24228910 ps |
| T946 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.416138482 |
|
|
Apr 25 12:47:20 PM PDT 24 |
Apr 25 12:47:25 PM PDT 24 |
1718306913 ps |
| T947 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.891218411 |
|
|
Apr 25 12:47:24 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
129401026 ps |
| T948 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.1269201990 |
|
|
Apr 25 12:47:42 PM PDT 24 |
Apr 25 12:47:44 PM PDT 24 |
86783775 ps |
| T949 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.233132337 |
|
|
Apr 25 12:47:25 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
117994692 ps |
| T950 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.4227587387 |
|
|
Apr 25 12:47:44 PM PDT 24 |
Apr 25 12:47:49 PM PDT 24 |
38579992 ps |
| T951 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.1078649372 |
|
|
Apr 25 12:47:12 PM PDT 24 |
Apr 25 12:47:13 PM PDT 24 |
121608200 ps |
| T203 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.2092095097 |
|
|
Apr 25 12:47:30 PM PDT 24 |
Apr 25 12:47:33 PM PDT 24 |
13555092 ps |
| T952 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.715965615 |
|
|
Apr 25 12:47:12 PM PDT 24 |
Apr 25 12:47:16 PM PDT 24 |
304199787 ps |
| T205 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.201825440 |
|
|
Apr 25 12:47:28 PM PDT 24 |
Apr 25 12:47:30 PM PDT 24 |
32300936 ps |
| T953 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2596023574 |
|
|
Apr 25 12:47:16 PM PDT 24 |
Apr 25 12:47:23 PM PDT 24 |
142259503 ps |
| T148 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.1839821116 |
|
|
Apr 25 12:47:26 PM PDT 24 |
Apr 25 12:47:30 PM PDT 24 |
153314890 ps |
| T143 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.3978044054 |
|
|
Apr 25 12:47:08 PM PDT 24 |
Apr 25 12:47:13 PM PDT 24 |
68903660 ps |
| T225 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.3769042836 |
|
|
Apr 25 12:47:04 PM PDT 24 |
Apr 25 12:47:08 PM PDT 24 |
180606981 ps |
| T147 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.3265647076 |
|
|
Apr 25 12:47:18 PM PDT 24 |
Apr 25 12:47:24 PM PDT 24 |
237916441 ps |
| T954 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.567256581 |
|
|
Apr 25 12:47:12 PM PDT 24 |
Apr 25 12:47:15 PM PDT 24 |
100458871 ps |
| T955 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.1299777636 |
|
|
Apr 25 12:47:10 PM PDT 24 |
Apr 25 12:47:14 PM PDT 24 |
81915120 ps |
| T956 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.2572940407 |
|
|
Apr 25 12:47:30 PM PDT 24 |
Apr 25 12:47:34 PM PDT 24 |
30498033 ps |
| T957 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.2566785911 |
|
|
Apr 25 12:47:25 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
23195566 ps |
| T958 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.2439214541 |
|
|
Apr 25 12:47:13 PM PDT 24 |
Apr 25 12:47:16 PM PDT 24 |
19531683 ps |
| T959 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.2879106073 |
|
|
Apr 25 12:47:44 PM PDT 24 |
Apr 25 12:47:49 PM PDT 24 |
70343126 ps |
| T204 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.3365225513 |
|
|
Apr 25 12:47:16 PM PDT 24 |
Apr 25 12:47:20 PM PDT 24 |
69182766 ps |
| T960 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.3259717074 |
|
|
Apr 25 12:47:16 PM PDT 24 |
Apr 25 12:47:21 PM PDT 24 |
128500905 ps |
| T961 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.208351568 |
|
|
Apr 25 12:47:13 PM PDT 24 |
Apr 25 12:47:16 PM PDT 24 |
24286633 ps |
| T962 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.1120159275 |
|
|
Apr 25 12:47:34 PM PDT 24 |
Apr 25 12:47:40 PM PDT 24 |
113492628 ps |
| T963 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.876936734 |
|
|
Apr 25 12:47:25 PM PDT 24 |
Apr 25 12:47:41 PM PDT 24 |
3028985800 ps |
| T964 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.616033237 |
|
|
Apr 25 12:47:23 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
39927282 ps |
| T139 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.1773090262 |
|
|
Apr 25 12:47:47 PM PDT 24 |
Apr 25 12:47:54 PM PDT 24 |
80865563 ps |
| T965 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.1289941566 |
|
|
Apr 25 12:47:22 PM PDT 24 |
Apr 25 12:47:29 PM PDT 24 |
6343278331 ps |
| T966 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.1815025118 |
|
|
Apr 25 12:47:05 PM PDT 24 |
Apr 25 12:47:08 PM PDT 24 |
252592562 ps |
| T967 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.645807264 |
|
|
Apr 25 12:47:33 PM PDT 24 |
Apr 25 12:47:40 PM PDT 24 |
139134263 ps |
| T968 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.2490737612 |
|
|
Apr 25 12:47:19 PM PDT 24 |
Apr 25 12:47:23 PM PDT 24 |
18670203 ps |
| T969 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.416503455 |
|
|
Apr 25 12:47:23 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
82156850 ps |
| T206 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.3448708478 |
|
|
Apr 25 12:47:35 PM PDT 24 |
Apr 25 12:47:38 PM PDT 24 |
14428720 ps |
| T138 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.1021768172 |
|
|
Apr 25 12:47:18 PM PDT 24 |
Apr 25 12:47:23 PM PDT 24 |
611703363 ps |
| T970 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.2073717624 |
|
|
Apr 25 12:47:15 PM PDT 24 |
Apr 25 12:47:18 PM PDT 24 |
15246894 ps |
| T971 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.4079977435 |
|
|
Apr 25 12:47:10 PM PDT 24 |
Apr 25 12:47:21 PM PDT 24 |
412104943 ps |
| T142 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.3900135158 |
|
|
Apr 25 12:47:45 PM PDT 24 |
Apr 25 12:47:51 PM PDT 24 |
164952046 ps |
| T972 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.3227201977 |
|
|
Apr 25 12:47:29 PM PDT 24 |
Apr 25 12:47:32 PM PDT 24 |
47749029 ps |
| T973 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.2137636328 |
|
|
Apr 25 12:47:25 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
21057990 ps |
| T974 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.2637151503 |
|
|
Apr 25 12:47:13 PM PDT 24 |
Apr 25 12:47:30 PM PDT 24 |
16514983897 ps |
| T975 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.3407738057 |
|
|
Apr 25 12:47:25 PM PDT 24 |
Apr 25 12:47:36 PM PDT 24 |
1484591468 ps |
| T976 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.773729596 |
|
|
Apr 25 12:47:16 PM PDT 24 |
Apr 25 12:47:20 PM PDT 24 |
31725485 ps |
| T977 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.3652760790 |
|
|
Apr 25 12:47:21 PM PDT 24 |
Apr 25 12:47:24 PM PDT 24 |
136991201 ps |
| T978 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.1599786339 |
|
|
Apr 25 12:47:06 PM PDT 24 |
Apr 25 12:47:17 PM PDT 24 |
1128336961 ps |
| T979 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.863128931 |
|
|
Apr 25 12:47:10 PM PDT 24 |
Apr 25 12:47:12 PM PDT 24 |
33398185 ps |
| T980 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2933409574 |
|
|
Apr 25 12:47:21 PM PDT 24 |
Apr 25 12:47:25 PM PDT 24 |
160086228 ps |
| T981 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.828718627 |
|
|
Apr 25 12:47:31 PM PDT 24 |
Apr 25 12:47:35 PM PDT 24 |
172204596 ps |
| T982 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1913658066 |
|
|
Apr 25 12:47:14 PM PDT 24 |
Apr 25 12:47:18 PM PDT 24 |
156079934 ps |
| T207 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.4223786968 |
|
|
Apr 25 12:47:45 PM PDT 24 |
Apr 25 12:47:48 PM PDT 24 |
14125018 ps |
| T983 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.284687315 |
|
|
Apr 25 12:47:29 PM PDT 24 |
Apr 25 12:47:36 PM PDT 24 |
1161046408 ps |
| T984 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.1719414137 |
|
|
Apr 25 12:47:05 PM PDT 24 |
Apr 25 12:47:08 PM PDT 24 |
48570322 ps |
| T985 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.4020513847 |
|
|
Apr 25 12:47:21 PM PDT 24 |
Apr 25 12:47:25 PM PDT 24 |
961339941 ps |
| T210 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.1594658655 |
|
|
Apr 25 12:47:25 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
31890700 ps |
| T986 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.1484725066 |
|
|
Apr 25 12:47:03 PM PDT 24 |
Apr 25 12:47:05 PM PDT 24 |
294942586 ps |
| T987 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3058118247 |
|
|
Apr 25 12:47:21 PM PDT 24 |
Apr 25 12:47:26 PM PDT 24 |
217784075 ps |
| T208 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.1099134306 |
|
|
Apr 25 12:47:07 PM PDT 24 |
Apr 25 12:47:10 PM PDT 24 |
14607406 ps |
| T988 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.762122429 |
|
|
Apr 25 12:47:20 PM PDT 24 |
Apr 25 12:47:24 PM PDT 24 |
167681709 ps |
| T989 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.641251607 |
|
|
Apr 25 12:47:47 PM PDT 24 |
Apr 25 12:47:52 PM PDT 24 |
89215919 ps |
| T209 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.4022829012 |
|
|
Apr 25 12:47:41 PM PDT 24 |
Apr 25 12:47:43 PM PDT 24 |
12256736 ps |
| T990 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.1758848655 |
|
|
Apr 25 12:47:34 PM PDT 24 |
Apr 25 12:47:37 PM PDT 24 |
39307614 ps |
| T991 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.2976021608 |
|
|
Apr 25 12:47:24 PM PDT 24 |
Apr 25 12:48:01 PM PDT 24 |
6263964409 ps |
| T992 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.3403979386 |
|
|
Apr 25 12:47:04 PM PDT 24 |
Apr 25 12:47:07 PM PDT 24 |
49761822 ps |
| T993 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.3513869125 |
|
|
Apr 25 12:47:23 PM PDT 24 |
Apr 25 12:47:28 PM PDT 24 |
144335425 ps |
| T994 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.2261990675 |
|
|
Apr 25 12:47:15 PM PDT 24 |
Apr 25 12:47:20 PM PDT 24 |
54540598 ps |
| T995 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.3296158386 |
|
|
Apr 25 12:47:17 PM PDT 24 |
Apr 25 12:47:20 PM PDT 24 |
54790405 ps |
| T996 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.2027250171 |
|
|
Apr 25 12:47:33 PM PDT 24 |
Apr 25 12:47:36 PM PDT 24 |
40559108 ps |
| T997 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.2596424187 |
|
|
Apr 25 12:47:21 PM PDT 24 |
Apr 25 12:47:25 PM PDT 24 |
38933638 ps |
| T998 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.1754789129 |
|
|
Apr 25 12:47:18 PM PDT 24 |
Apr 25 12:47:21 PM PDT 24 |
49975903 ps |
| T999 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.3675843449 |
|
|
Apr 25 12:47:04 PM PDT 24 |
Apr 25 12:47:06 PM PDT 24 |
60896868 ps |
| T1000 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.124232475 |
|
|
Apr 25 12:47:30 PM PDT 24 |
Apr 25 12:47:35 PM PDT 24 |
104749390 ps |
| T1001 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.1144365125 |
|
|
Apr 25 12:47:22 PM PDT 24 |
Apr 25 12:47:58 PM PDT 24 |
2943970956 ps |