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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.89 97.89 95.95 93.31 97.67 98.55 98.76 96.11


Total test records in report: 1004
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T816 /workspace/coverage/default/5.lc_ctrl_jtag_regwen_during_op.2105763667 May 02 01:38:39 PM PDT 24 May 02 01:38:55 PM PDT 24 916935943 ps
T817 /workspace/coverage/default/4.lc_ctrl_alert_test.24689166 May 02 01:38:31 PM PDT 24 May 02 01:38:34 PM PDT 24 25485554 ps
T818 /workspace/coverage/default/32.lc_ctrl_sec_token_mux.298404656 May 02 01:40:37 PM PDT 24 May 02 01:40:52 PM PDT 24 665465063 ps
T819 /workspace/coverage/default/0.lc_ctrl_jtag_errors.105683402 May 02 01:38:07 PM PDT 24 May 02 01:39:21 PM PDT 24 2756292344 ps
T820 /workspace/coverage/default/12.lc_ctrl_smoke.295755337 May 02 01:39:09 PM PDT 24 May 02 01:39:13 PM PDT 24 29685947 ps
T821 /workspace/coverage/default/45.lc_ctrl_stress_all.1471115029 May 02 01:41:24 PM PDT 24 May 02 01:42:56 PM PDT 24 11935649770 ps
T822 /workspace/coverage/default/23.lc_ctrl_alert_test.4209896663 May 02 01:40:05 PM PDT 24 May 02 01:40:07 PM PDT 24 25698874 ps
T823 /workspace/coverage/default/6.lc_ctrl_stress_all.3704058857 May 02 01:38:38 PM PDT 24 May 02 01:40:36 PM PDT 24 9755862275 ps
T824 /workspace/coverage/default/47.lc_ctrl_state_failure.2360268066 May 02 01:41:23 PM PDT 24 May 02 01:41:51 PM PDT 24 869869041 ps
T825 /workspace/coverage/default/49.lc_ctrl_stress_all.3982845676 May 02 01:41:42 PM PDT 24 May 02 01:44:47 PM PDT 24 108848552610 ps
T826 /workspace/coverage/default/25.lc_ctrl_jtag_access.1593486801 May 02 01:40:11 PM PDT 24 May 02 01:40:22 PM PDT 24 342298596 ps
T827 /workspace/coverage/default/11.lc_ctrl_smoke.1217710043 May 02 01:39:11 PM PDT 24 May 02 01:39:26 PM PDT 24 310451489 ps
T828 /workspace/coverage/default/9.lc_ctrl_regwen_during_op.1023726952 May 02 01:38:52 PM PDT 24 May 02 01:39:11 PM PDT 24 1076622788 ps
T829 /workspace/coverage/default/5.lc_ctrl_jtag_access.3598000344 May 02 01:38:34 PM PDT 24 May 02 01:38:37 PM PDT 24 338811554 ps
T830 /workspace/coverage/default/41.lc_ctrl_state_failure.1690635333 May 02 01:41:08 PM PDT 24 May 02 01:41:39 PM PDT 24 510302628 ps
T831 /workspace/coverage/default/2.lc_ctrl_prog_failure.3847190326 May 02 01:38:16 PM PDT 24 May 02 01:38:24 PM PDT 24 156512286 ps
T832 /workspace/coverage/default/4.lc_ctrl_state_post_trans.4186530309 May 02 01:38:23 PM PDT 24 May 02 01:38:32 PM PDT 24 240166673 ps
T833 /workspace/coverage/default/3.lc_ctrl_security_escalation.2655305329 May 02 01:38:21 PM PDT 24 May 02 01:38:30 PM PDT 24 281222803 ps
T834 /workspace/coverage/default/34.lc_ctrl_stress_all.3736130897 May 02 01:40:51 PM PDT 24 May 02 01:42:16 PM PDT 24 4667934927 ps
T835 /workspace/coverage/default/5.lc_ctrl_prog_failure.2860325146 May 02 01:38:33 PM PDT 24 May 02 01:38:37 PM PDT 24 163357173 ps
T836 /workspace/coverage/default/6.lc_ctrl_sec_mubi.3642754520 May 02 01:38:39 PM PDT 24 May 02 01:38:52 PM PDT 24 288654949 ps
T837 /workspace/coverage/default/9.lc_ctrl_jtag_errors.3599057272 May 02 01:39:00 PM PDT 24 May 02 01:39:58 PM PDT 24 18442790828 ps
T838 /workspace/coverage/default/4.lc_ctrl_state_failure.1731484580 May 02 01:38:26 PM PDT 24 May 02 01:38:56 PM PDT 24 270981481 ps
T839 /workspace/coverage/default/9.lc_ctrl_state_failure.2848057058 May 02 01:38:53 PM PDT 24 May 02 01:39:13 PM PDT 24 814931838 ps
T840 /workspace/coverage/default/18.lc_ctrl_stress_all.3920096948 May 02 01:39:48 PM PDT 24 May 02 01:43:04 PM PDT 24 31473935759 ps
T841 /workspace/coverage/default/29.lc_ctrl_prog_failure.3863284940 May 02 01:40:19 PM PDT 24 May 02 01:40:23 PM PDT 24 33637485 ps
T842 /workspace/coverage/default/4.lc_ctrl_sec_token_digest.2354042804 May 02 01:38:32 PM PDT 24 May 02 01:38:43 PM PDT 24 4055287631 ps
T843 /workspace/coverage/default/2.lc_ctrl_errors.1716115892 May 02 01:38:14 PM PDT 24 May 02 01:38:23 PM PDT 24 475901489 ps
T844 /workspace/coverage/default/38.lc_ctrl_jtag_access.4021700048 May 02 01:40:59 PM PDT 24 May 02 01:41:03 PM PDT 24 108636663 ps
T845 /workspace/coverage/default/38.lc_ctrl_sec_mubi.428082594 May 02 01:41:00 PM PDT 24 May 02 01:41:12 PM PDT 24 2446777838 ps
T846 /workspace/coverage/default/6.lc_ctrl_state_failure.2803472158 May 02 01:38:38 PM PDT 24 May 02 01:39:00 PM PDT 24 2664339012 ps
T221 /workspace/coverage/default/9.lc_ctrl_claim_transition_if.577212238 May 02 01:39:03 PM PDT 24 May 02 01:39:05 PM PDT 24 35456652 ps
T847 /workspace/coverage/default/39.lc_ctrl_prog_failure.2989096447 May 02 01:41:00 PM PDT 24 May 02 01:41:04 PM PDT 24 22521397 ps
T848 /workspace/coverage/default/30.lc_ctrl_stress_all_with_rand_reset.2663228239 May 02 01:40:32 PM PDT 24 May 02 01:50:02 PM PDT 24 15257422450 ps
T849 /workspace/coverage/default/7.lc_ctrl_errors.2961668380 May 02 01:38:45 PM PDT 24 May 02 01:39:00 PM PDT 24 3565223289 ps
T850 /workspace/coverage/default/8.lc_ctrl_stress_all.2042542766 May 02 01:38:52 PM PDT 24 May 02 01:39:02 PM PDT 24 358907765 ps
T851 /workspace/coverage/default/39.lc_ctrl_smoke.2208467797 May 02 01:41:06 PM PDT 24 May 02 01:41:11 PM PDT 24 142253758 ps
T852 /workspace/coverage/default/38.lc_ctrl_errors.2873406433 May 02 01:41:00 PM PDT 24 May 02 01:41:13 PM PDT 24 670619215 ps
T853 /workspace/coverage/default/12.lc_ctrl_sec_mubi.3247163500 May 02 01:39:10 PM PDT 24 May 02 01:39:25 PM PDT 24 349765384 ps
T854 /workspace/coverage/default/27.lc_ctrl_sec_token_mux.2220208824 May 02 01:40:24 PM PDT 24 May 02 01:40:36 PM PDT 24 2101226576 ps
T855 /workspace/coverage/default/10.lc_ctrl_jtag_state_failure.1663382826 May 02 01:39:05 PM PDT 24 May 02 01:39:51 PM PDT 24 5279756822 ps
T856 /workspace/coverage/default/38.lc_ctrl_smoke.3271274214 May 02 01:41:00 PM PDT 24 May 02 01:41:03 PM PDT 24 68319029 ps
T857 /workspace/coverage/default/21.lc_ctrl_alert_test.3228857593 May 02 01:39:53 PM PDT 24 May 02 01:39:55 PM PDT 24 15841023 ps
T858 /workspace/coverage/default/35.lc_ctrl_volatile_unlock_smoke.814942436 May 02 01:40:44 PM PDT 24 May 02 01:40:46 PM PDT 24 16073186 ps
T859 /workspace/coverage/default/25.lc_ctrl_state_post_trans.2839120037 May 02 01:40:11 PM PDT 24 May 02 01:40:19 PM PDT 24 169642743 ps
T860 /workspace/coverage/default/4.lc_ctrl_stress_all.2372970228 May 02 01:38:30 PM PDT 24 May 02 01:42:40 PM PDT 24 33674029557 ps
T861 /workspace/coverage/default/9.lc_ctrl_jtag_access.1361973324 May 02 01:39:00 PM PDT 24 May 02 01:39:05 PM PDT 24 362153059 ps
T862 /workspace/coverage/default/7.lc_ctrl_jtag_state_failure.2530271614 May 02 01:38:49 PM PDT 24 May 02 01:39:59 PM PDT 24 3535907250 ps
T42 /workspace/coverage/default/48.lc_ctrl_volatile_unlock_smoke.3127749265 May 02 01:41:48 PM PDT 24 May 02 01:41:50 PM PDT 24 16354135 ps
T863 /workspace/coverage/default/14.lc_ctrl_stress_all_with_rand_reset.2397749921 May 02 01:39:28 PM PDT 24 May 02 01:45:21 PM PDT 24 17603846960 ps
T864 /workspace/coverage/default/43.lc_ctrl_prog_failure.3731829719 May 02 01:41:20 PM PDT 24 May 02 01:41:24 PM PDT 24 337039328 ps
T865 /workspace/coverage/default/16.lc_ctrl_sec_token_mux.4233791326 May 02 01:39:33 PM PDT 24 May 02 01:39:44 PM PDT 24 975446329 ps
T866 /workspace/coverage/default/15.lc_ctrl_sec_mubi.1098047884 May 02 01:39:26 PM PDT 24 May 02 01:39:42 PM PDT 24 1992635968 ps
T867 /workspace/coverage/default/34.lc_ctrl_state_post_trans.1650126051 May 02 01:40:38 PM PDT 24 May 02 01:40:45 PM PDT 24 552207095 ps
T868 /workspace/coverage/default/6.lc_ctrl_jtag_access.2397501814 May 02 01:38:39 PM PDT 24 May 02 01:38:51 PM PDT 24 352889446 ps
T869 /workspace/coverage/default/10.lc_ctrl_sec_token_digest.2157382924 May 02 01:39:03 PM PDT 24 May 02 01:39:23 PM PDT 24 3667803316 ps
T870 /workspace/coverage/default/14.lc_ctrl_volatile_unlock_smoke.2719475508 May 02 01:39:16 PM PDT 24 May 02 01:39:18 PM PDT 24 18260779 ps
T871 /workspace/coverage/default/30.lc_ctrl_smoke.3109360937 May 02 01:40:29 PM PDT 24 May 02 01:40:39 PM PDT 24 1291990418 ps
T872 /workspace/coverage/default/40.lc_ctrl_prog_failure.2373279454 May 02 01:41:01 PM PDT 24 May 02 01:41:05 PM PDT 24 72700735 ps
T88 /workspace/coverage/default/2.lc_ctrl_jtag_smoke.770691619 May 02 01:38:21 PM PDT 24 May 02 01:38:33 PM PDT 24 3371151648 ps
T873 /workspace/coverage/default/1.lc_ctrl_security_escalation.768332877 May 02 01:38:06 PM PDT 24 May 02 01:38:16 PM PDT 24 1129081333 ps
T874 /workspace/coverage/default/44.lc_ctrl_stress_all.4025723776 May 02 01:41:18 PM PDT 24 May 02 01:41:46 PM PDT 24 746866383 ps
T875 /workspace/coverage/default/43.lc_ctrl_errors.3659105075 May 02 01:41:13 PM PDT 24 May 02 01:41:25 PM PDT 24 341709563 ps
T876 /workspace/coverage/default/26.lc_ctrl_smoke.2579971668 May 02 01:40:13 PM PDT 24 May 02 01:40:17 PM PDT 24 1028072357 ps
T877 /workspace/coverage/default/1.lc_ctrl_errors.2836922228 May 02 01:38:11 PM PDT 24 May 02 01:38:22 PM PDT 24 397432063 ps
T878 /workspace/coverage/default/18.lc_ctrl_jtag_prog_failure.2648783266 May 02 01:39:39 PM PDT 24 May 02 01:40:09 PM PDT 24 14899146934 ps
T879 /workspace/coverage/default/0.lc_ctrl_jtag_prog_failure.319584608 May 02 01:38:09 PM PDT 24 May 02 01:38:21 PM PDT 24 360497331 ps
T880 /workspace/coverage/default/19.lc_ctrl_alert_test.1955468278 May 02 01:39:47 PM PDT 24 May 02 01:39:49 PM PDT 24 20243218 ps
T881 /workspace/coverage/default/10.lc_ctrl_stress_all.2079464047 May 02 01:39:02 PM PDT 24 May 02 01:39:49 PM PDT 24 2386382427 ps
T105 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.2445174232 May 02 01:37:31 PM PDT 24 May 02 01:37:34 PM PDT 24 24810516 ps
T116 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.3589537484 May 02 01:37:30 PM PDT 24 May 02 01:37:31 PM PDT 24 12054354 ps
T102 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.2827643585 May 02 01:37:30 PM PDT 24 May 02 01:37:35 PM PDT 24 116039809 ps
T110 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.478586328 May 02 01:37:06 PM PDT 24 May 02 01:37:09 PM PDT 24 42663443 ps
T111 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.3794090301 May 02 01:36:57 PM PDT 24 May 02 01:37:00 PM PDT 24 83312020 ps
T882 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.2562609375 May 02 01:37:01 PM PDT 24 May 02 01:37:03 PM PDT 24 86493569 ps
T138 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.1850893765 May 02 01:37:15 PM PDT 24 May 02 01:37:17 PM PDT 24 175065414 ps
T140 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.1649187313 May 02 01:37:06 PM PDT 24 May 02 01:37:11 PM PDT 24 146287336 ps
T218 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.3756370176 May 02 01:36:57 PM PDT 24 May 02 01:37:11 PM PDT 24 1478342346 ps
T103 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.1151570263 May 02 01:37:16 PM PDT 24 May 02 01:37:19 PM PDT 24 26241839 ps
T141 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.1311514114 May 02 01:36:57 PM PDT 24 May 02 01:36:59 PM PDT 24 75433487 ps
T155 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.2758200401 May 02 01:36:48 PM PDT 24 May 02 01:36:51 PM PDT 24 103805435 ps
T213 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.2826898937 May 02 01:37:35 PM PDT 24 May 02 01:37:38 PM PDT 24 35074625 ps
T104 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.1289715988 May 02 01:37:13 PM PDT 24 May 02 01:37:18 PM PDT 24 137217287 ps
T883 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.4212081324 May 02 01:37:05 PM PDT 24 May 02 01:37:07 PM PDT 24 54251151 ps
T124 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.3120413628 May 02 01:37:00 PM PDT 24 May 02 01:37:03 PM PDT 24 46320571 ps
T156 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.258976020 May 02 01:37:32 PM PDT 24 May 02 01:37:35 PM PDT 24 165138350 ps
T139 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.3021231830 May 02 01:37:12 PM PDT 24 May 02 01:37:17 PM PDT 24 56431953 ps
T157 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.806894118 May 02 01:37:08 PM PDT 24 May 02 01:37:11 PM PDT 24 75147722 ps
T214 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.3462478642 May 02 01:37:32 PM PDT 24 May 02 01:37:35 PM PDT 24 18275745 ps
T106 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.293757126 May 02 01:36:58 PM PDT 24 May 02 01:37:01 PM PDT 24 44895254 ps
T158 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.3471529432 May 02 01:37:06 PM PDT 24 May 02 01:37:09 PM PDT 24 36557732 ps
T884 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.1321514500 May 02 01:37:10 PM PDT 24 May 02 01:37:40 PM PDT 24 2540865416 ps
T107 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.4038227765 May 02 01:37:30 PM PDT 24 May 02 01:37:34 PM PDT 24 80642371 ps
T885 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.3286668700 May 02 01:37:16 PM PDT 24 May 02 01:37:18 PM PDT 24 122159481 ps
T112 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.1591836642 May 02 01:37:23 PM PDT 24 May 02 01:37:28 PM PDT 24 76006964 ps
T159 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.3143019682 May 02 01:37:13 PM PDT 24 May 02 01:37:16 PM PDT 24 193770497 ps
T886 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.2416255031 May 02 01:37:24 PM PDT 24 May 02 01:37:27 PM PDT 24 62156478 ps
T186 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.1538676870 May 02 01:37:11 PM PDT 24 May 02 01:37:14 PM PDT 24 20128505 ps
T187 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4104712616 May 02 01:37:08 PM PDT 24 May 02 01:37:12 PM PDT 24 84145856 ps
T887 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1111786933 May 02 01:36:57 PM PDT 24 May 02 01:37:01 PM PDT 24 301197013 ps
T888 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.1707771555 May 02 01:36:57 PM PDT 24 May 02 01:37:08 PM PDT 24 748799257 ps
T108 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.2381693993 May 02 01:37:30 PM PDT 24 May 02 01:37:34 PM PDT 24 594146639 ps
T113 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.2664694758 May 02 01:37:34 PM PDT 24 May 02 01:37:39 PM PDT 24 438061093 ps
T123 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.1054465497 May 02 01:36:59 PM PDT 24 May 02 01:37:02 PM PDT 24 42167085 ps
T889 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.128610961 May 02 01:37:22 PM PDT 24 May 02 01:37:39 PM PDT 24 1395976749 ps
T890 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.3456808635 May 02 01:37:05 PM PDT 24 May 02 01:37:08 PM PDT 24 105736615 ps
T202 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.2274720399 May 02 01:37:01 PM PDT 24 May 02 01:37:04 PM PDT 24 230047151 ps
T215 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.1541534095 May 02 01:37:21 PM PDT 24 May 02 01:37:23 PM PDT 24 42549199 ps
T891 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.507066987 May 02 01:36:59 PM PDT 24 May 02 01:37:07 PM PDT 24 1279853195 ps
T892 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.1337082896 May 02 01:37:00 PM PDT 24 May 02 01:37:03 PM PDT 24 79446871 ps
T126 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.2358706040 May 02 01:37:14 PM PDT 24 May 02 01:37:18 PM PDT 24 119099822 ps
T203 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.359378758 May 02 01:37:22 PM PDT 24 May 02 01:37:24 PM PDT 24 21469169 ps
T216 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.875921167 May 02 01:36:57 PM PDT 24 May 02 01:37:00 PM PDT 24 30296211 ps
T893 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.1425079816 May 02 01:37:08 PM PDT 24 May 02 01:37:12 PM PDT 24 151027249 ps
T894 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.337427009 May 02 01:37:00 PM PDT 24 May 02 01:37:02 PM PDT 24 47537957 ps
T130 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.1764988631 May 02 01:37:32 PM PDT 24 May 02 01:37:36 PM PDT 24 23725889 ps
T114 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.2762639556 May 02 01:37:21 PM PDT 24 May 02 01:37:25 PM PDT 24 49762593 ps
T204 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.139890675 May 02 01:37:10 PM PDT 24 May 02 01:37:14 PM PDT 24 83236240 ps
T895 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.2694964717 May 02 01:37:22 PM PDT 24 May 02 01:37:26 PM PDT 24 90613621 ps
T896 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.2350648322 May 02 01:36:57 PM PDT 24 May 02 01:37:00 PM PDT 24 201904183 ps
T897 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.545182154 May 02 01:37:13 PM PDT 24 May 02 01:37:20 PM PDT 24 463191340 ps
T898 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.256445815 May 02 01:37:23 PM PDT 24 May 02 01:37:27 PM PDT 24 551843564 ps
T899 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.4196385199 May 02 01:37:05 PM PDT 24 May 02 01:37:07 PM PDT 24 95049005 ps
T117 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.1466048415 May 02 01:37:08 PM PDT 24 May 02 01:37:13 PM PDT 24 81277382 ps
T900 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.48028299 May 02 01:36:51 PM PDT 24 May 02 01:36:54 PM PDT 24 13496627 ps
T901 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.1654853313 May 02 01:37:25 PM PDT 24 May 02 01:37:28 PM PDT 24 128789226 ps
T902 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.2060294121 May 02 01:37:32 PM PDT 24 May 02 01:37:34 PM PDT 24 64630980 ps
T903 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.812285689 May 02 01:37:00 PM PDT 24 May 02 01:37:05 PM PDT 24 499121996 ps
T904 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.3272522460 May 02 01:37:24 PM PDT 24 May 02 01:37:27 PM PDT 24 40595482 ps
T905 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.2919780319 May 02 01:37:29 PM PDT 24 May 02 01:37:31 PM PDT 24 53066152 ps
T128 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.81947167 May 02 01:37:05 PM PDT 24 May 02 01:37:08 PM PDT 24 68083458 ps
T906 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.3351033363 May 02 01:37:06 PM PDT 24 May 02 01:37:09 PM PDT 24 350146732 ps
T907 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.3762914563 May 02 01:37:30 PM PDT 24 May 02 01:37:34 PM PDT 24 473194284 ps
T119 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.970442170 May 02 01:37:22 PM PDT 24 May 02 01:37:24 PM PDT 24 72158577 ps
T120 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.2311824355 May 02 01:37:26 PM PDT 24 May 02 01:37:29 PM PDT 24 101459361 ps
T908 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.1718781685 May 02 01:37:06 PM PDT 24 May 02 01:37:18 PM PDT 24 1128227298 ps
T909 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2661937721 May 02 01:36:51 PM PDT 24 May 02 01:36:53 PM PDT 24 25044173 ps
T910 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.200666548 May 02 01:37:29 PM PDT 24 May 02 01:37:31 PM PDT 24 28060653 ps
T131 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.3152457408 May 02 01:37:33 PM PDT 24 May 02 01:37:37 PM PDT 24 91595451 ps
T127 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.4146950634 May 02 01:37:13 PM PDT 24 May 02 01:37:18 PM PDT 24 2271010731 ps
T135 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.3302252812 May 02 01:37:23 PM PDT 24 May 02 01:37:27 PM PDT 24 118931966 ps
T129 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.301722494 May 02 01:37:32 PM PDT 24 May 02 01:37:36 PM PDT 24 105952803 ps
T911 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.2283270633 May 02 01:37:07 PM PDT 24 May 02 01:37:11 PM PDT 24 16470614 ps
T912 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.1615727375 May 02 01:37:31 PM PDT 24 May 02 01:37:33 PM PDT 24 24620180 ps
T913 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.1356118817 May 02 01:37:06 PM PDT 24 May 02 01:37:09 PM PDT 24 14800561 ps
T914 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.1405214328 May 02 01:36:49 PM PDT 24 May 02 01:36:52 PM PDT 24 33007433 ps
T125 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.119912898 May 02 01:37:22 PM PDT 24 May 02 01:37:26 PM PDT 24 57859510 ps
T915 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.96527199 May 02 01:37:10 PM PDT 24 May 02 01:37:14 PM PDT 24 52242986 ps
T916 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.172153953 May 02 01:37:04 PM PDT 24 May 02 01:37:06 PM PDT 24 31599060 ps
T917 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.4239153912 May 02 01:37:22 PM PDT 24 May 02 01:37:24 PM PDT 24 14996657 ps
T132 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.2730228458 May 02 01:37:08 PM PDT 24 May 02 01:37:13 PM PDT 24 68414130 ps
T918 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.416927533 May 02 01:37:02 PM PDT 24 May 02 01:37:04 PM PDT 24 95559044 ps
T919 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.1173782623 May 02 01:37:31 PM PDT 24 May 02 01:37:33 PM PDT 24 52080058 ps
T920 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.1475605249 May 02 01:37:14 PM PDT 24 May 02 01:37:17 PM PDT 24 114742281 ps
T921 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.2504658042 May 02 01:37:17 PM PDT 24 May 02 01:37:20 PM PDT 24 39139567 ps
T922 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.2746464032 May 02 01:36:58 PM PDT 24 May 02 01:37:02 PM PDT 24 42026546 ps
T923 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.2469609249 May 02 01:37:07 PM PDT 24 May 02 01:37:11 PM PDT 24 62560214 ps
T133 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.3576061581 May 02 01:37:30 PM PDT 24 May 02 01:37:34 PM PDT 24 151337067 ps
T924 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.3260057913 May 02 01:36:59 PM PDT 24 May 02 01:37:02 PM PDT 24 82341762 ps
T925 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.2564395416 May 02 01:37:08 PM PDT 24 May 02 01:37:28 PM PDT 24 8503419728 ps
T205 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.2156984716 May 02 01:37:32 PM PDT 24 May 02 01:37:34 PM PDT 24 47715542 ps
T206 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.708143925 May 02 01:37:09 PM PDT 24 May 02 01:37:13 PM PDT 24 14946002 ps
T926 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.1117358948 May 02 01:36:58 PM PDT 24 May 02 01:37:01 PM PDT 24 269969254 ps
T927 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2459899432 May 02 01:37:07 PM PDT 24 May 02 01:37:13 PM PDT 24 208176308 ps
T928 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.589235655 May 02 01:37:23 PM PDT 24 May 02 01:37:25 PM PDT 24 35940386 ps
T929 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.2532115502 May 02 01:37:12 PM PDT 24 May 02 01:37:16 PM PDT 24 17346336 ps
T930 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.2021340130 May 02 01:37:10 PM PDT 24 May 02 01:37:14 PM PDT 24 19689977 ps
T137 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.4111094997 May 02 01:37:13 PM PDT 24 May 02 01:37:18 PM PDT 24 48321206 ps
T931 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.3281888473 May 02 01:37:07 PM PDT 24 May 02 01:37:13 PM PDT 24 1001585181 ps
T121 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.2076628500 May 02 01:36:49 PM PDT 24 May 02 01:36:53 PM PDT 24 774111541 ps
T932 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.1299788160 May 02 01:37:33 PM PDT 24 May 02 01:37:40 PM PDT 24 542432975 ps
T933 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.269680187 May 02 01:37:22 PM PDT 24 May 02 01:37:25 PM PDT 24 93621450 ps
T934 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1977673146 May 02 01:37:08 PM PDT 24 May 02 01:37:14 PM PDT 24 177055694 ps
T207 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.1116716303 May 02 01:37:13 PM PDT 24 May 02 01:37:16 PM PDT 24 41510271 ps
T935 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.3251938173 May 02 01:37:30 PM PDT 24 May 02 01:37:32 PM PDT 24 54737244 ps
T936 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.2213090900 May 02 01:37:30 PM PDT 24 May 02 01:37:32 PM PDT 24 43637238 ps
T136 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.3921401426 May 02 01:37:32 PM PDT 24 May 02 01:37:36 PM PDT 24 111531378 ps
T937 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.3486505463 May 02 01:37:31 PM PDT 24 May 02 01:37:35 PM PDT 24 272013246 ps
T938 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.2604117290 May 02 01:36:58 PM PDT 24 May 02 01:37:00 PM PDT 24 85472983 ps
T208 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.3845497193 May 02 01:37:08 PM PDT 24 May 02 01:37:11 PM PDT 24 47594596 ps
T115 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.1959113959 May 02 01:37:33 PM PDT 24 May 02 01:37:37 PM PDT 24 256062863 ps
T939 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.3961514729 May 02 01:37:03 PM PDT 24 May 02 01:37:05 PM PDT 24 167232854 ps
T940 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.2553623821 May 02 01:37:21 PM PDT 24 May 02 01:37:23 PM PDT 24 27850582 ps
T941 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.732068343 May 02 01:36:58 PM PDT 24 May 02 01:37:00 PM PDT 24 105249162 ps
T942 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.2348856697 May 02 01:37:24 PM PDT 24 May 02 01:37:27 PM PDT 24 17795745 ps
T943 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.44414853 May 02 01:37:31 PM PDT 24 May 02 01:37:34 PM PDT 24 42796945 ps
T944 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.1019289691 May 02 01:37:04 PM PDT 24 May 02 01:37:08 PM PDT 24 133130991 ps
T945 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.809598499 May 02 01:37:00 PM PDT 24 May 02 01:37:07 PM PDT 24 4672024806 ps
T946 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.481062627 May 02 01:37:06 PM PDT 24 May 02 01:37:08 PM PDT 24 461188852 ps
T947 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.734256162 May 02 01:37:23 PM PDT 24 May 02 01:37:26 PM PDT 24 40035307 ps
T948 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.269712855 May 02 01:37:23 PM PDT 24 May 02 01:37:25 PM PDT 24 24421790 ps
T949 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.4041399709 May 02 01:37:31 PM PDT 24 May 02 01:37:34 PM PDT 24 15182665 ps
T950 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.1709260483 May 02 01:36:53 PM PDT 24 May 02 01:37:04 PM PDT 24 2176722940 ps
T951 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.2584815726 May 02 01:37:08 PM PDT 24 May 02 01:37:16 PM PDT 24 1328371220 ps
T952 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.454514556 May 02 01:37:12 PM PDT 24 May 02 01:37:20 PM PDT 24 791348505 ps
T953 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.1504916262 May 02 01:37:04 PM PDT 24 May 02 01:37:08 PM PDT 24 653386895 ps
T954 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.1092093541 May 02 01:37:08 PM PDT 24 May 02 01:37:11 PM PDT 24 23112707 ps
T955 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.4194757192 May 02 01:37:24 PM PDT 24 May 02 01:37:27 PM PDT 24 452199071 ps
T956 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.202441435 May 02 01:36:50 PM PDT 24 May 02 01:36:53 PM PDT 24 327277042 ps
T957 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.58629132 May 02 01:37:32 PM PDT 24 May 02 01:37:35 PM PDT 24 65477296 ps
T209 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.648672038 May 02 01:36:59 PM PDT 24 May 02 01:37:01 PM PDT 24 17019731 ps
T958 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2719410487 May 02 01:37:13 PM PDT 24 May 02 01:37:21 PM PDT 24 242686721 ps
T959 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.1760745997 May 02 01:37:16 PM PDT 24 May 02 01:37:36 PM PDT 24 1618952839 ps
T960 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.2494794097 May 02 01:36:57 PM PDT 24 May 02 01:37:00 PM PDT 24 110775925 ps
T961 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.1304931408 May 02 01:37:30 PM PDT 24 May 02 01:37:33 PM PDT 24 25832221 ps
T122 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.3173592043 May 02 01:37:21 PM PDT 24 May 02 01:37:25 PM PDT 24 98480261 ps
T962 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.1876141195 May 02 01:37:07 PM PDT 24 May 02 01:37:10 PM PDT 24 54570509 ps
T211 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.4014452317 May 02 01:36:57 PM PDT 24 May 02 01:37:00 PM PDT 24 28634431 ps
T963 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.3026276175 May 02 01:36:59 PM PDT 24 May 02 01:37:02 PM PDT 24 107845371 ps
T964 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.1544026806 May 02 01:36:49 PM PDT 24 May 02 01:36:53 PM PDT 24 76920723 ps
T965 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.2568444306 May 02 01:37:31 PM PDT 24 May 02 01:37:34 PM PDT 24 49885620 ps
T134 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1062452614 May 02 01:37:08 PM PDT 24 May 02 01:37:14 PM PDT 24 145768010 ps
T966 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.2896677025 May 02 01:36:49 PM PDT 24 May 02 01:36:53 PM PDT 24 141168544 ps
T967 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.939377721 May 02 01:36:57 PM PDT 24 May 02 01:37:00 PM PDT 24 693098288 ps
T968 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.2030653924 May 02 01:37:22 PM PDT 24 May 02 01:37:24 PM PDT 24 22700338 ps
T969 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.169972573 May 02 01:37:01 PM PDT 24 May 02 01:37:11 PM PDT 24 1895874659 ps
T970 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.3473933268 May 02 01:37:22 PM PDT 24 May 02 01:37:26 PM PDT 24 125529100 ps
T971 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.830675498 May 02 01:36:51 PM PDT 24 May 02 01:36:54 PM PDT 24 56377687 ps
T972 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.2473761021 May 02 01:37:07 PM PDT 24 May 02 01:37:12 PM PDT 24 105628594 ps
T118 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.3831337837 May 02 01:37:21 PM PDT 24 May 02 01:37:25 PM PDT 24 176233101 ps
T973 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.7531565 May 02 01:37:11 PM PDT 24 May 02 01:37:14 PM PDT 24 98242750 ps
T974 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.3986089926 May 02 01:36:58 PM PDT 24 May 02 01:37:01 PM PDT 24 609205809 ps
T975 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.3592647825 May 02 01:37:33 PM PDT 24 May 02 01:37:36 PM PDT 24 117490868 ps
T976 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.1407856085 May 02 01:37:13 PM PDT 24 May 02 01:37:18 PM PDT 24 1075251342 ps
T977 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.4193751326 May 02 01:37:13 PM PDT 24 May 02 01:37:44 PM PDT 24 2545197898 ps
T978 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.651490550 May 02 01:37:07 PM PDT 24 May 02 01:37:11 PM PDT 24 520530765 ps
T979 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.92842473 May 02 01:37:32 PM PDT 24 May 02 01:37:36 PM PDT 24 115747507 ps
T980 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.4211375804 May 02 01:37:24 PM PDT 24 May 02 01:37:27 PM PDT 24 88666478 ps
T981 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.3694579781 May 02 01:37:07 PM PDT 24 May 02 01:37:10 PM PDT 24 12984817 ps
T982 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.1005287447 May 02 01:37:00 PM PDT 24 May 02 01:37:03 PM PDT 24 31761242 ps
T983 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.2476492185 May 02 01:37:02 PM PDT 24 May 02 01:37:04 PM PDT 24 40769611 ps
T984 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.406324866 May 02 01:37:12 PM PDT 24 May 02 01:37:27 PM PDT 24 3662653607 ps
T985 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.3235008853 May 02 01:37:06 PM PDT 24 May 02 01:37:12 PM PDT 24 332479653 ps
T986 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.2491629316 May 02 01:37:12 PM PDT 24 May 02 01:37:15 PM PDT 24 145761096 ps
T987 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.3705799304 May 02 01:37:14 PM PDT 24 May 02 01:37:18 PM PDT 24 1831515883 ps
T210 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.2307148354 May 02 01:37:00 PM PDT 24 May 02 01:37:02 PM PDT 24 79091504 ps
T988 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.3514166319 May 02 01:37:22 PM PDT 24 May 02 01:37:24 PM PDT 24 52595362 ps
T989 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.1117778681 May 02 01:36:58 PM PDT 24 May 02 01:37:02 PM PDT 24 190794787 ps
T990 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.2143061811 May 02 01:37:20 PM PDT 24 May 02 01:37:29 PM PDT 24 3934227351 ps
T991 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.1104633112 May 02 01:37:07 PM PDT 24 May 02 01:37:10 PM PDT 24 47680252 ps
T992 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.4112236173 May 02 01:37:12 PM PDT 24 May 02 01:37:15 PM PDT 24 86865594 ps
T993 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.2571341610 May 02 01:37:06 PM PDT 24 May 02 01:37:12 PM PDT 24 199578897 ps
T212 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.3054791052 May 02 01:36:59 PM PDT 24 May 02 01:37:01 PM PDT 24 18991284 ps
T994 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.3891489618 May 02 01:37:27 PM PDT 24 May 02 01:37:29 PM PDT 24 16893455 ps
T995 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.777421380 May 02 01:36:52 PM PDT 24 May 02 01:37:23 PM PDT 24 1224322285 ps
T996 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.4203105011 May 02 01:37:06 PM PDT 24 May 02 01:37:09 PM PDT 24 28883920 ps
T997 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.90239547 May 02 01:37:22 PM PDT 24 May 02 01:37:24 PM PDT 24 14249382 ps
T998 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.457479435 May 02 01:37:07 PM PDT 24 May 02 01:37:30 PM PDT 24 1611155586 ps
T999 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.1013286454 May 02 01:37:23 PM PDT 24 May 02 01:37:26 PM PDT 24 226222016 ps
T1000 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.2485447539 May 02 01:37:14 PM PDT 24 May 02 01:37:18 PM PDT 24 132975390 ps
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