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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.89 97.89 95.77 93.31 97.67 98.55 98.76 96.29


Total test records in report: 1001
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T824 /workspace/coverage/default/21.lc_ctrl_sec_token_digest.2627187236 May 05 01:01:22 PM PDT 24 May 05 01:01:33 PM PDT 24 809100817 ps
T176 /workspace/coverage/default/47.lc_ctrl_stress_all_with_rand_reset.1497040307 May 05 01:03:17 PM PDT 24 May 05 01:10:24 PM PDT 24 34994400664 ps
T189 /workspace/coverage/default/19.lc_ctrl_errors.2985826082 May 05 01:01:11 PM PDT 24 May 05 01:01:31 PM PDT 24 828773178 ps
T190 /workspace/coverage/default/28.lc_ctrl_alert_test.2239016767 May 05 01:01:59 PM PDT 24 May 05 01:02:01 PM PDT 24 79098635 ps
T191 /workspace/coverage/default/34.lc_ctrl_stress_all.1711050233 May 05 01:02:19 PM PDT 24 May 05 01:04:29 PM PDT 24 4399461891 ps
T192 /workspace/coverage/default/5.lc_ctrl_state_failure.2807777888 May 05 12:59:44 PM PDT 24 May 05 01:00:18 PM PDT 24 3004830445 ps
T193 /workspace/coverage/default/12.lc_ctrl_prog_failure.2075040216 May 05 01:00:34 PM PDT 24 May 05 01:00:38 PM PDT 24 398737202 ps
T194 /workspace/coverage/default/10.lc_ctrl_jtag_state_post_trans.196620407 May 05 01:00:23 PM PDT 24 May 05 01:00:42 PM PDT 24 979958189 ps
T195 /workspace/coverage/default/35.lc_ctrl_state_failure.3838544308 May 05 01:02:18 PM PDT 24 May 05 01:02:49 PM PDT 24 1425495583 ps
T196 /workspace/coverage/default/2.lc_ctrl_stress_all_with_rand_reset.3064071524 May 05 12:59:33 PM PDT 24 May 05 01:05:05 PM PDT 24 62126703199 ps
T197 /workspace/coverage/default/17.lc_ctrl_sec_mubi.3041326173 May 05 01:01:06 PM PDT 24 May 05 01:01:18 PM PDT 24 504990179 ps
T825 /workspace/coverage/default/1.lc_ctrl_sec_token_digest.4121215549 May 05 12:59:28 PM PDT 24 May 05 12:59:37 PM PDT 24 1615428185 ps
T826 /workspace/coverage/default/11.lc_ctrl_sec_token_digest.538253837 May 05 01:00:38 PM PDT 24 May 05 01:00:53 PM PDT 24 1570196635 ps
T827 /workspace/coverage/default/10.lc_ctrl_state_failure.923831511 May 05 01:00:21 PM PDT 24 May 05 01:00:51 PM PDT 24 952091657 ps
T828 /workspace/coverage/default/4.lc_ctrl_state_failure.4130942378 May 05 12:59:40 PM PDT 24 May 05 01:00:07 PM PDT 24 198836136 ps
T829 /workspace/coverage/default/49.lc_ctrl_sec_mubi.2948066971 May 05 01:03:15 PM PDT 24 May 05 01:03:28 PM PDT 24 322598812 ps
T830 /workspace/coverage/default/23.lc_ctrl_sec_mubi.3685742571 May 05 01:01:31 PM PDT 24 May 05 01:01:49 PM PDT 24 405949480 ps
T831 /workspace/coverage/default/1.lc_ctrl_stress_all.4074585630 May 05 12:59:36 PM PDT 24 May 05 01:00:58 PM PDT 24 4908594010 ps
T832 /workspace/coverage/default/8.lc_ctrl_jtag_state_post_trans.4036833637 May 05 01:00:10 PM PDT 24 May 05 01:00:18 PM PDT 24 470046323 ps
T833 /workspace/coverage/default/16.lc_ctrl_jtag_errors.3484164050 May 05 01:01:01 PM PDT 24 May 05 01:01:57 PM PDT 24 9409553327 ps
T834 /workspace/coverage/default/42.lc_ctrl_stress_all.805064941 May 05 01:02:50 PM PDT 24 May 05 01:10:19 PM PDT 24 68430650243 ps
T835 /workspace/coverage/default/47.lc_ctrl_sec_token_digest.695066984 May 05 01:03:06 PM PDT 24 May 05 01:03:15 PM PDT 24 255423618 ps
T836 /workspace/coverage/default/20.lc_ctrl_stress_all.1618881446 May 05 01:01:32 PM PDT 24 May 05 01:03:15 PM PDT 24 11632971261 ps
T837 /workspace/coverage/default/24.lc_ctrl_sec_token_digest.2846326569 May 05 01:01:40 PM PDT 24 May 05 01:01:48 PM PDT 24 420954144 ps
T838 /workspace/coverage/default/9.lc_ctrl_jtag_state_post_trans.2949601955 May 05 01:00:26 PM PDT 24 May 05 01:00:46 PM PDT 24 772907339 ps
T839 /workspace/coverage/default/34.lc_ctrl_sec_mubi.332349293 May 05 01:02:19 PM PDT 24 May 05 01:02:32 PM PDT 24 1566538309 ps
T840 /workspace/coverage/default/24.lc_ctrl_prog_failure.2791022344 May 05 01:01:33 PM PDT 24 May 05 01:01:37 PM PDT 24 76930948 ps
T841 /workspace/coverage/default/17.lc_ctrl_stress_all.3237257966 May 05 01:01:06 PM PDT 24 May 05 01:05:51 PM PDT 24 9665776421 ps
T842 /workspace/coverage/default/2.lc_ctrl_sec_mubi.2848331778 May 05 12:59:33 PM PDT 24 May 05 12:59:46 PM PDT 24 581428044 ps
T843 /workspace/coverage/default/18.lc_ctrl_smoke.4259865780 May 05 01:01:06 PM PDT 24 May 05 01:01:11 PM PDT 24 135048552 ps
T844 /workspace/coverage/default/36.lc_ctrl_security_escalation.1980659353 May 05 01:02:22 PM PDT 24 May 05 01:02:30 PM PDT 24 433173997 ps
T845 /workspace/coverage/default/24.lc_ctrl_smoke.3976685836 May 05 01:01:33 PM PDT 24 May 05 01:01:35 PM PDT 24 120940737 ps
T846 /workspace/coverage/default/19.lc_ctrl_jtag_state_post_trans.187200363 May 05 01:01:18 PM PDT 24 May 05 01:01:29 PM PDT 24 1384528509 ps
T847 /workspace/coverage/default/36.lc_ctrl_stress_all.3890306253 May 05 01:02:22 PM PDT 24 May 05 01:03:30 PM PDT 24 6782210237 ps
T848 /workspace/coverage/default/9.lc_ctrl_sec_token_digest.578941382 May 05 01:00:22 PM PDT 24 May 05 01:00:35 PM PDT 24 635248011 ps
T849 /workspace/coverage/default/26.lc_ctrl_state_post_trans.1205907723 May 05 01:01:45 PM PDT 24 May 05 01:01:52 PM PDT 24 262871189 ps
T850 /workspace/coverage/default/30.lc_ctrl_stress_all.2212365363 May 05 01:02:10 PM PDT 24 May 05 01:06:05 PM PDT 24 67993926115 ps
T851 /workspace/coverage/default/13.lc_ctrl_jtag_state_post_trans.258735580 May 05 01:00:45 PM PDT 24 May 05 01:01:13 PM PDT 24 5043278049 ps
T852 /workspace/coverage/default/29.lc_ctrl_prog_failure.1722795327 May 05 01:01:56 PM PDT 24 May 05 01:01:59 PM PDT 24 501665266 ps
T853 /workspace/coverage/default/8.lc_ctrl_state_failure.1307526825 May 05 01:00:09 PM PDT 24 May 05 01:00:30 PM PDT 24 564858755 ps
T854 /workspace/coverage/default/37.lc_ctrl_state_post_trans.4292234733 May 05 01:02:28 PM PDT 24 May 05 01:02:35 PM PDT 24 108577074 ps
T855 /workspace/coverage/default/3.lc_ctrl_sec_token_digest.1754591138 May 05 12:59:34 PM PDT 24 May 05 12:59:46 PM PDT 24 375689894 ps
T856 /workspace/coverage/default/24.lc_ctrl_sec_token_mux.3992636827 May 05 01:01:34 PM PDT 24 May 05 01:01:43 PM PDT 24 188025946 ps
T857 /workspace/coverage/default/35.lc_ctrl_smoke.1572724705 May 05 01:02:19 PM PDT 24 May 05 01:02:21 PM PDT 24 23004139 ps
T858 /workspace/coverage/default/7.lc_ctrl_jtag_smoke.376190023 May 05 01:00:07 PM PDT 24 May 05 01:00:19 PM PDT 24 419341190 ps
T859 /workspace/coverage/default/43.lc_ctrl_state_post_trans.1399033774 May 05 01:02:48 PM PDT 24 May 05 01:02:57 PM PDT 24 772377823 ps
T860 /workspace/coverage/default/48.lc_ctrl_sec_token_mux.1400549560 May 05 01:03:19 PM PDT 24 May 05 01:03:28 PM PDT 24 1455629552 ps
T861 /workspace/coverage/default/40.lc_ctrl_smoke.4014375436 May 05 01:02:34 PM PDT 24 May 05 01:02:36 PM PDT 24 23063590 ps
T862 /workspace/coverage/default/9.lc_ctrl_stress_all.1409634150 May 05 01:00:21 PM PDT 24 May 05 01:07:05 PM PDT 24 47210488906 ps
T863 /workspace/coverage/default/4.lc_ctrl_state_post_trans.3716722929 May 05 12:59:37 PM PDT 24 May 05 12:59:44 PM PDT 24 541131528 ps
T864 /workspace/coverage/default/36.lc_ctrl_sec_token_digest.1166698217 May 05 01:02:22 PM PDT 24 May 05 01:02:34 PM PDT 24 295929636 ps
T865 /workspace/coverage/default/14.lc_ctrl_security_escalation.1153105722 May 05 01:00:44 PM PDT 24 May 05 01:00:59 PM PDT 24 425852495 ps
T188 /workspace/coverage/default/14.lc_ctrl_stress_all_with_rand_reset.2402889709 May 05 01:00:49 PM PDT 24 May 05 01:12:04 PM PDT 24 53653386414 ps
T866 /workspace/coverage/default/41.lc_ctrl_sec_mubi.3368597102 May 05 01:02:44 PM PDT 24 May 05 01:02:55 PM PDT 24 1855240379 ps
T163 /workspace/coverage/default/45.lc_ctrl_stress_all_with_rand_reset.1074828794 May 05 01:03:01 PM PDT 24 May 05 01:05:42 PM PDT 24 11953420463 ps
T867 /workspace/coverage/default/32.lc_ctrl_sec_token_mux.1709159475 May 05 01:02:09 PM PDT 24 May 05 01:02:16 PM PDT 24 3060169645 ps
T221 /workspace/coverage/default/9.lc_ctrl_claim_transition_if.2025716946 May 05 01:00:17 PM PDT 24 May 05 01:00:18 PM PDT 24 18340416 ps
T868 /workspace/coverage/default/7.lc_ctrl_alert_test.1412697693 May 05 01:00:13 PM PDT 24 May 05 01:00:14 PM PDT 24 15200192 ps
T869 /workspace/coverage/default/31.lc_ctrl_smoke.2042225562 May 05 01:02:12 PM PDT 24 May 05 01:02:16 PM PDT 24 160706204 ps
T870 /workspace/coverage/default/14.lc_ctrl_alert_test.1976460839 May 05 01:00:49 PM PDT 24 May 05 01:00:51 PM PDT 24 66834639 ps
T871 /workspace/coverage/default/6.lc_ctrl_jtag_state_post_trans.2131358545 May 05 12:59:59 PM PDT 24 May 05 01:00:10 PM PDT 24 875943484 ps
T872 /workspace/coverage/default/21.lc_ctrl_stress_all.2812968188 May 05 01:01:23 PM PDT 24 May 05 01:02:34 PM PDT 24 14037877659 ps
T873 /workspace/coverage/default/22.lc_ctrl_stress_all.1139233390 May 05 01:01:31 PM PDT 24 May 05 01:03:10 PM PDT 24 6175181710 ps
T874 /workspace/coverage/default/37.lc_ctrl_state_failure.2288660985 May 05 01:02:34 PM PDT 24 May 05 01:02:49 PM PDT 24 853884053 ps
T875 /workspace/coverage/default/31.lc_ctrl_prog_failure.2641821015 May 05 01:02:07 PM PDT 24 May 05 01:02:13 PM PDT 24 122048467 ps
T876 /workspace/coverage/default/15.lc_ctrl_jtag_smoke.938497334 May 05 01:00:56 PM PDT 24 May 05 01:01:05 PM PDT 24 273291933 ps
T116 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.3707745562 May 05 12:57:30 PM PDT 24 May 05 12:57:33 PM PDT 24 232883156 ps
T117 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.1071972830 May 05 12:58:20 PM PDT 24 May 05 12:58:25 PM PDT 24 472518430 ps
T128 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.2190886085 May 05 12:57:42 PM PDT 24 May 05 12:57:44 PM PDT 24 233875937 ps
T129 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.1136902935 May 05 12:58:03 PM PDT 24 May 05 12:58:04 PM PDT 24 21081202 ps
T151 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.2795547651 May 05 12:57:25 PM PDT 24 May 05 12:57:43 PM PDT 24 2815245293 ps
T147 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.2066057501 May 05 12:57:37 PM PDT 24 May 05 12:57:40 PM PDT 24 139325728 ps
T211 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.3393489902 May 05 12:58:11 PM PDT 24 May 05 12:58:13 PM PDT 24 50070159 ps
T164 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.4210521390 May 05 12:57:15 PM PDT 24 May 05 12:57:16 PM PDT 24 22084557 ps
T877 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.41481785 May 05 12:57:00 PM PDT 24 May 05 12:57:01 PM PDT 24 12689630 ps
T118 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.963579226 May 05 12:58:23 PM PDT 24 May 05 12:58:28 PM PDT 24 456259438 ps
T149 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.3846013228 May 05 12:56:50 PM PDT 24 May 05 12:56:54 PM PDT 24 474173589 ps
T123 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.3857566971 May 05 12:58:12 PM PDT 24 May 05 12:58:13 PM PDT 24 86269205 ps
T212 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.2846755463 May 05 12:57:09 PM PDT 24 May 05 12:57:11 PM PDT 24 17712221 ps
T878 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.1570427318 May 05 12:57:05 PM PDT 24 May 05 12:57:07 PM PDT 24 125251240 ps
T165 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.419173910 May 05 12:58:20 PM PDT 24 May 05 12:58:22 PM PDT 24 125081713 ps
T219 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.1470268376 May 05 12:57:10 PM PDT 24 May 05 12:57:27 PM PDT 24 676746461 ps
T121 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.422525499 May 05 12:58:18 PM PDT 24 May 05 12:58:21 PM PDT 24 458939775 ps
T213 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.3531858810 May 05 12:57:42 PM PDT 24 May 05 12:57:44 PM PDT 24 45236154 ps
T879 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.3846133392 May 05 12:57:16 PM PDT 24 May 05 12:57:18 PM PDT 24 73999279 ps
T214 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.1031683993 May 05 12:57:30 PM PDT 24 May 05 12:57:32 PM PDT 24 57999523 ps
T150 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.442029923 May 05 12:57:07 PM PDT 24 May 05 12:57:09 PM PDT 24 89622092 ps
T880 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.2637112860 May 05 12:57:51 PM PDT 24 May 05 12:57:54 PM PDT 24 142397941 ps
T166 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.3639882373 May 05 12:57:35 PM PDT 24 May 05 12:57:37 PM PDT 24 13511928 ps
T120 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.2658641400 May 05 12:58:20 PM PDT 24 May 05 12:58:24 PM PDT 24 103139382 ps
T215 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.2886536069 May 05 12:57:04 PM PDT 24 May 05 12:57:06 PM PDT 24 51835421 ps
T177 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.3265933427 May 05 12:58:23 PM PDT 24 May 05 12:58:25 PM PDT 24 52251690 ps
T137 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3471139900 May 05 12:57:11 PM PDT 24 May 05 12:57:12 PM PDT 24 255281898 ps
T127 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.1920459451 May 05 12:58:01 PM PDT 24 May 05 12:58:06 PM PDT 24 216989950 ps
T881 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.3687354853 May 05 12:57:31 PM PDT 24 May 05 12:57:47 PM PDT 24 717445729 ps
T200 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.1021226063 May 05 12:57:28 PM PDT 24 May 05 12:57:29 PM PDT 24 14457526 ps
T136 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.2552492461 May 05 12:58:13 PM PDT 24 May 05 12:58:15 PM PDT 24 31863158 ps
T130 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.443167468 May 05 12:57:41 PM PDT 24 May 05 12:57:44 PM PDT 24 84534410 ps
T216 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.1685661198 May 05 12:57:47 PM PDT 24 May 05 12:57:48 PM PDT 24 41860658 ps
T882 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.3487177727 May 05 12:58:12 PM PDT 24 May 05 12:58:14 PM PDT 24 79347637 ps
T178 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.2491541894 May 05 12:58:13 PM PDT 24 May 05 12:58:15 PM PDT 24 48717777 ps
T217 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.3023950643 May 05 12:57:51 PM PDT 24 May 05 12:57:52 PM PDT 24 38394908 ps
T883 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.12022232 May 05 12:57:45 PM PDT 24 May 05 12:57:56 PM PDT 24 7578190562 ps
T884 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.3649022480 May 05 12:57:06 PM PDT 24 May 05 12:57:17 PM PDT 24 788690567 ps
T122 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.1624463725 May 05 12:58:18 PM PDT 24 May 05 12:58:20 PM PDT 24 70078966 ps
T124 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.2589612604 May 05 12:58:12 PM PDT 24 May 05 12:58:16 PM PDT 24 426560950 ps
T885 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.2186136316 May 05 12:57:11 PM PDT 24 May 05 12:57:17 PM PDT 24 401684269 ps
T886 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.2652171556 May 05 12:57:06 PM PDT 24 May 05 12:57:08 PM PDT 24 79751994 ps
T133 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2037712384 May 05 12:57:38 PM PDT 24 May 05 12:57:41 PM PDT 24 183300543 ps
T887 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.220683523 May 05 12:58:20 PM PDT 24 May 05 12:58:22 PM PDT 24 21135474 ps
T201 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.799328860 May 05 12:57:00 PM PDT 24 May 05 12:57:01 PM PDT 24 90405824 ps
T888 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.3349709154 May 05 12:57:25 PM PDT 24 May 05 12:57:27 PM PDT 24 36411948 ps
T889 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.825153592 May 05 12:57:57 PM PDT 24 May 05 12:57:59 PM PDT 24 203026638 ps
T148 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.376873047 May 05 12:57:41 PM PDT 24 May 05 12:57:45 PM PDT 24 446243152 ps
T890 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.3831127656 May 05 12:57:03 PM PDT 24 May 05 12:57:05 PM PDT 24 27470302 ps
T134 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4016899058 May 05 12:56:55 PM PDT 24 May 05 12:57:03 PM PDT 24 343716434 ps
T891 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.2746232658 May 05 12:58:18 PM PDT 24 May 05 12:58:20 PM PDT 24 75516132 ps
T892 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.2513711746 May 05 12:57:51 PM PDT 24 May 05 12:57:52 PM PDT 24 392286054 ps
T893 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.319475472 May 05 12:56:56 PM PDT 24 May 05 12:56:58 PM PDT 24 95553453 ps
T141 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.4137624067 May 05 12:58:13 PM PDT 24 May 05 12:58:17 PM PDT 24 88844649 ps
T140 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.2775929845 May 05 12:57:42 PM PDT 24 May 05 12:57:46 PM PDT 24 227294843 ps
T125 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1793523888 May 05 12:57:27 PM PDT 24 May 05 12:57:30 PM PDT 24 216188318 ps
T145 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.1812875145 May 05 12:58:18 PM PDT 24 May 05 12:58:20 PM PDT 24 55672350 ps
T894 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.2196126888 May 05 12:57:41 PM PDT 24 May 05 12:57:43 PM PDT 24 107252137 ps
T895 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.1498033090 May 05 12:57:43 PM PDT 24 May 05 12:57:53 PM PDT 24 2925065919 ps
T896 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.217579870 May 05 12:58:00 PM PDT 24 May 05 12:58:02 PM PDT 24 20484694 ps
T897 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.2219378516 May 05 12:57:50 PM PDT 24 May 05 12:57:52 PM PDT 24 75563668 ps
T898 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.942864323 May 05 12:57:56 PM PDT 24 May 05 12:58:06 PM PDT 24 793656570 ps
T899 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.563962505 May 05 12:57:49 PM PDT 24 May 05 12:57:52 PM PDT 24 72542089 ps
T126 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.953138373 May 05 12:57:36 PM PDT 24 May 05 12:57:40 PM PDT 24 107206110 ps
T138 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.1327250567 May 05 12:58:04 PM PDT 24 May 05 12:58:07 PM PDT 24 79003814 ps
T900 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.1487433767 May 05 12:57:37 PM PDT 24 May 05 12:57:40 PM PDT 24 51808387 ps
T901 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.82161509 May 05 12:57:09 PM PDT 24 May 05 12:57:14 PM PDT 24 168171586 ps
T142 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.3911429555 May 05 12:57:04 PM PDT 24 May 05 12:57:08 PM PDT 24 455100992 ps
T202 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.1725844612 May 05 12:58:23 PM PDT 24 May 05 12:58:24 PM PDT 24 19165612 ps
T902 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.1056672649 May 05 12:58:25 PM PDT 24 May 05 12:58:26 PM PDT 24 29496938 ps
T903 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.4200409367 May 05 12:57:05 PM PDT 24 May 05 12:57:07 PM PDT 24 240496932 ps
T904 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.1194478857 May 05 12:58:22 PM PDT 24 May 05 12:58:24 PM PDT 24 16525514 ps
T135 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.3420788937 May 05 12:58:24 PM PDT 24 May 05 12:58:29 PM PDT 24 131702936 ps
T905 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.3071924841 May 05 12:58:20 PM PDT 24 May 05 12:58:21 PM PDT 24 26525267 ps
T906 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.4271822957 May 05 12:57:31 PM PDT 24 May 05 12:57:50 PM PDT 24 5762546700 ps
T907 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1476705293 May 05 12:58:04 PM PDT 24 May 05 12:58:13 PM PDT 24 4241718479 ps
T908 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.3397644680 May 05 12:58:03 PM PDT 24 May 05 12:58:05 PM PDT 24 152458045 ps
T909 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.3702347051 May 05 12:57:50 PM PDT 24 May 05 12:57:52 PM PDT 24 30468282 ps
T910 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.1599232085 May 05 12:57:30 PM PDT 24 May 05 12:57:32 PM PDT 24 42940882 ps
T911 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.3236465454 May 05 12:57:38 PM PDT 24 May 05 12:57:40 PM PDT 24 15924479 ps
T912 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.4287246096 May 05 12:57:11 PM PDT 24 May 05 12:57:13 PM PDT 24 69907797 ps
T913 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.1380604386 May 05 12:57:07 PM PDT 24 May 05 12:57:09 PM PDT 24 401070040 ps
T914 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.3328179898 May 05 12:58:02 PM PDT 24 May 05 12:58:04 PM PDT 24 34808885 ps
T143 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.2291918949 May 05 12:57:51 PM PDT 24 May 05 12:57:54 PM PDT 24 63326204 ps
T915 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.3283788485 May 05 12:57:05 PM PDT 24 May 05 12:57:07 PM PDT 24 157959864 ps
T916 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.1002976902 May 05 12:57:48 PM PDT 24 May 05 12:57:49 PM PDT 24 100149809 ps
T917 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.3376234048 May 05 12:57:28 PM PDT 24 May 05 12:57:30 PM PDT 24 61240838 ps
T918 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.2658837908 May 05 12:57:44 PM PDT 24 May 05 12:57:46 PM PDT 24 84978568 ps
T919 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.2959832976 May 05 12:57:31 PM PDT 24 May 05 12:57:33 PM PDT 24 26040768 ps
T920 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.4133983692 May 05 12:58:11 PM PDT 24 May 05 12:58:12 PM PDT 24 93224821 ps
T921 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.157434248 May 05 12:58:20 PM PDT 24 May 05 12:58:23 PM PDT 24 155827655 ps
T922 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.325394417 May 05 12:58:19 PM PDT 24 May 05 12:58:21 PM PDT 24 48278290 ps
T923 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.1720949680 May 05 12:57:53 PM PDT 24 May 05 12:57:54 PM PDT 24 24753710 ps
T924 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.1307617201 May 05 12:56:49 PM PDT 24 May 05 12:57:03 PM PDT 24 6027381663 ps
T925 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.1444084219 May 05 12:57:31 PM PDT 24 May 05 12:57:36 PM PDT 24 460829935 ps
T926 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.178121953 May 05 12:57:41 PM PDT 24 May 05 12:57:58 PM PDT 24 1346355885 ps
T927 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.2363565843 May 05 12:57:38 PM PDT 24 May 05 12:57:39 PM PDT 24 41703149 ps
T928 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.2168545094 May 05 12:57:45 PM PDT 24 May 05 12:57:47 PM PDT 24 47918351 ps
T929 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.2820925519 May 05 12:57:57 PM PDT 24 May 05 12:58:00 PM PDT 24 487654488 ps
T930 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.3076725433 May 05 12:58:00 PM PDT 24 May 05 12:58:02 PM PDT 24 152903580 ps
T931 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.1833283848 May 05 12:58:11 PM PDT 24 May 05 12:58:14 PM PDT 24 81410961 ps
T932 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1114076007 May 05 12:57:07 PM PDT 24 May 05 12:57:12 PM PDT 24 643663410 ps
T933 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.3026372944 May 05 12:58:13 PM PDT 24 May 05 12:58:15 PM PDT 24 28791620 ps
T934 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.2743968047 May 05 12:57:16 PM PDT 24 May 05 12:57:18 PM PDT 24 52608582 ps
T131 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.2666343024 May 05 12:58:19 PM PDT 24 May 05 12:58:24 PM PDT 24 238888426 ps
T935 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.1960974639 May 05 12:57:12 PM PDT 24 May 05 12:57:18 PM PDT 24 883100284 ps
T936 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.2818832761 May 05 12:57:52 PM PDT 24 May 05 12:58:00 PM PDT 24 3385557876 ps
T937 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.2891234370 May 05 12:57:45 PM PDT 24 May 05 12:57:47 PM PDT 24 36834552 ps
T132 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.4103738368 May 05 12:56:55 PM PDT 24 May 05 12:56:58 PM PDT 24 175852039 ps
T938 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.3094806100 May 05 12:58:04 PM PDT 24 May 05 12:58:06 PM PDT 24 23364378 ps
T939 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.3113717124 May 05 12:58:19 PM PDT 24 May 05 12:58:21 PM PDT 24 21550739 ps
T940 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.3603939030 May 05 12:56:49 PM PDT 24 May 05 12:57:04 PM PDT 24 7289355238 ps
T203 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.3568768461 May 05 12:57:21 PM PDT 24 May 05 12:57:22 PM PDT 24 23054906 ps
T941 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.569420598 May 05 12:56:51 PM PDT 24 May 05 12:56:52 PM PDT 24 250690071 ps
T204 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.3254644252 May 05 12:58:14 PM PDT 24 May 05 12:58:16 PM PDT 24 33936607 ps
T942 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.2206383847 May 05 12:57:36 PM PDT 24 May 05 12:57:37 PM PDT 24 58278690 ps
T943 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.3352326289 May 05 12:57:17 PM PDT 24 May 05 12:57:20 PM PDT 24 204617692 ps
T944 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3944826934 May 05 12:57:49 PM PDT 24 May 05 12:57:52 PM PDT 24 299003690 ps
T945 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.1815573284 May 05 12:58:19 PM PDT 24 May 05 12:58:22 PM PDT 24 61374881 ps
T946 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.2906457511 May 05 12:57:46 PM PDT 24 May 05 12:57:47 PM PDT 24 84755698 ps
T947 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.2896977846 May 05 12:58:12 PM PDT 24 May 05 12:58:15 PM PDT 24 215069417 ps
T948 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.435672390 May 05 12:58:19 PM PDT 24 May 05 12:58:25 PM PDT 24 2301450376 ps
T949 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.3099911328 May 05 12:58:14 PM PDT 24 May 05 12:58:16 PM PDT 24 131281353 ps
T205 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.1424241469 May 05 12:57:44 PM PDT 24 May 05 12:57:46 PM PDT 24 44192315 ps
T950 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.2538437114 May 05 12:56:57 PM PDT 24 May 05 12:57:00 PM PDT 24 466868759 ps
T951 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.199323400 May 05 12:57:05 PM PDT 24 May 05 12:57:07 PM PDT 24 45816652 ps
T952 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.620039384 May 05 12:57:11 PM PDT 24 May 05 12:57:12 PM PDT 24 52043463 ps
T953 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1449062402 May 05 12:57:44 PM PDT 24 May 05 12:57:45 PM PDT 24 48254363 ps
T206 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.2227180674 May 05 12:58:12 PM PDT 24 May 05 12:58:13 PM PDT 24 12341220 ps
T954 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.2275355558 May 05 12:58:19 PM PDT 24 May 05 12:58:21 PM PDT 24 23588121 ps
T955 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.3902405195 May 05 12:57:25 PM PDT 24 May 05 12:57:28 PM PDT 24 383425429 ps
T956 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.861556210 May 05 12:58:16 PM PDT 24 May 05 12:58:17 PM PDT 24 77175907 ps
T957 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.1834714007 May 05 12:57:52 PM PDT 24 May 05 12:57:54 PM PDT 24 216531947 ps
T958 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.4002977856 May 05 12:57:25 PM PDT 24 May 05 12:57:35 PM PDT 24 362571886 ps
T959 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.395836797 May 05 12:58:14 PM PDT 24 May 05 12:58:17 PM PDT 24 812294216 ps
T960 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.4078439656 May 05 12:57:47 PM PDT 24 May 05 12:57:51 PM PDT 24 1513059899 ps
T961 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.130443606 May 05 12:58:25 PM PDT 24 May 05 12:58:29 PM PDT 24 51015138 ps
T207 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.4232922718 May 05 12:57:11 PM PDT 24 May 05 12:57:14 PM PDT 24 142758933 ps
T962 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.3454110733 May 05 12:57:05 PM PDT 24 May 05 12:57:14 PM PDT 24 1816830481 ps
T963 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.78677316 May 05 12:57:21 PM PDT 24 May 05 12:57:22 PM PDT 24 16957156 ps
T964 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.4183597475 May 05 12:58:19 PM PDT 24 May 05 12:58:23 PM PDT 24 258052689 ps
T965 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.478924821 May 05 12:58:18 PM PDT 24 May 05 12:58:20 PM PDT 24 28576788 ps
T966 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.3770924858 May 05 12:57:13 PM PDT 24 May 05 12:57:16 PM PDT 24 45209684 ps
T967 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.826026466 May 05 12:58:30 PM PDT 24 May 05 12:58:31 PM PDT 24 16084955 ps
T226 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.867756013 May 05 12:57:45 PM PDT 24 May 05 12:57:50 PM PDT 24 1394360460 ps
T968 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.1494122759 May 05 12:58:12 PM PDT 24 May 05 12:58:13 PM PDT 24 20043664 ps
T208 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.1243913219 May 05 12:57:06 PM PDT 24 May 05 12:57:08 PM PDT 24 47571802 ps
T969 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.222288028 May 05 12:56:53 PM PDT 24 May 05 12:56:54 PM PDT 24 386873252 ps
T970 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.1628557225 May 05 12:58:12 PM PDT 24 May 05 12:58:15 PM PDT 24 445661941 ps
T971 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.3013655503 May 05 12:58:20 PM PDT 24 May 05 12:58:23 PM PDT 24 104543889 ps
T209 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.896653605 May 05 12:56:54 PM PDT 24 May 05 12:56:56 PM PDT 24 48320291 ps
T972 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.909880433 May 05 12:58:06 PM PDT 24 May 05 12:58:08 PM PDT 24 64567215 ps
T973 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.648907872 May 05 12:58:03 PM PDT 24 May 05 12:58:09 PM PDT 24 2006902674 ps
T974 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.1422805186 May 05 12:58:06 PM PDT 24 May 05 12:58:08 PM PDT 24 352081560 ps
T975 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.3844554918 May 05 12:58:14 PM PDT 24 May 05 12:58:16 PM PDT 24 30838711 ps
T976 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.2261212631 May 05 12:57:43 PM PDT 24 May 05 12:57:44 PM PDT 24 16272501 ps
T977 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.3325231142 May 05 12:57:45 PM PDT 24 May 05 12:57:48 PM PDT 24 62080260 ps
T146 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.3522199532 May 05 12:58:14 PM PDT 24 May 05 12:58:16 PM PDT 24 226864573 ps
T978 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.3762533006 May 05 12:57:48 PM PDT 24 May 05 12:57:51 PM PDT 24 171044922 ps
T979 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.3182453393 May 05 12:57:46 PM PDT 24 May 05 12:58:00 PM PDT 24 2222630925 ps
T980 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.2755653458 May 05 12:57:04 PM PDT 24 May 05 12:57:06 PM PDT 24 51448975 ps
T981 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3549185151 May 05 12:57:26 PM PDT 24 May 05 12:57:31 PM PDT 24 170447067 ps
T982 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.297830000 May 05 12:57:33 PM PDT 24 May 05 12:57:35 PM PDT 24 29016441 ps
T210 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.1145270242 May 05 12:58:24 PM PDT 24 May 05 12:58:25 PM PDT 24 33459848 ps
T983 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.400593783 May 05 12:58:18 PM PDT 24 May 05 12:58:19 PM PDT 24 16334877 ps
T984 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.758324270 May 05 12:58:02 PM PDT 24 May 05 12:58:04 PM PDT 24 22111337 ps
T985 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.816036646 May 05 12:57:42 PM PDT 24 May 05 12:57:46 PM PDT 24 868056691 ps
T986 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.3082277421 May 05 12:57:35 PM PDT 24 May 05 12:57:37 PM PDT 24 39588359 ps
T144 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.2287530960 May 05 12:57:14 PM PDT 24 May 05 12:57:19 PM PDT 24 463196561 ps
T987 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.336803559 May 05 12:57:48 PM PDT 24 May 05 12:57:59 PM PDT 24 1612548777 ps
T988 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.2745332113 May 05 12:57:26 PM PDT 24 May 05 12:57:29 PM PDT 24 405457200 ps
T989 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.2801642567 May 05 12:58:19 PM PDT 24 May 05 12:58:20 PM PDT 24 74672963 ps
T990 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.3429279497 May 05 12:58:18 PM PDT 24 May 05 12:58:20 PM PDT 24 26120305 ps
T991 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.4279398867 May 05 12:57:23 PM PDT 24 May 05 12:57:25 PM PDT 24 61207931 ps
T992 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.260929915 May 05 12:58:03 PM PDT 24 May 05 12:58:06 PM PDT 24 354723127 ps
T993 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.2912778419 May 05 12:57:42 PM PDT 24 May 05 12:57:45 PM PDT 24 135651073 ps
T994 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.3210788910 May 05 12:57:45 PM PDT 24 May 05 12:57:58 PM PDT 24 4626748530 ps
T995 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.3591915023 May 05 12:57:51 PM PDT 24 May 05 12:57:53 PM PDT 24 95065329 ps
T996 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.1644950652 May 05 12:57:32 PM PDT 24 May 05 12:57:35 PM PDT 24 74237356 ps
T997 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.986096276 May 05 12:57:46 PM PDT 24 May 05 12:57:49 PM PDT 24 170083443 ps
T998 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.3749620895 May 05 12:57:46 PM PDT 24 May 05 12:57:47 PM PDT 24 62852393 ps
T999 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.2651801277 May 05 12:57:27 PM PDT 24 May 05 12:57:28 PM PDT 24 580005165 ps
T139 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.1087355412 May 05 12:58:19 PM PDT 24 May 05 12:58:22 PM PDT 24 422849596 ps
T1000 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.3853922645 May 05 12:58:14 PM PDT 24 May 05 12:58:15 PM PDT 24 13233256 ps
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