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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.92 97.89 95.95 93.31 97.67 98.55 98.76 96.29


Total test records in report: 1001
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T168 /workspace/coverage/default/32.lc_ctrl_stress_all_with_rand_reset.2049616001 May 16 12:56:03 PM PDT 24 May 16 01:03:48 PM PDT 24 14259508756 ps
T818 /workspace/coverage/default/1.lc_ctrl_sec_token_mux.3918037828 May 16 12:53:53 PM PDT 24 May 16 12:54:28 PM PDT 24 833759721 ps
T819 /workspace/coverage/default/25.lc_ctrl_sec_token_mux.2476570096 May 16 12:55:44 PM PDT 24 May 16 12:56:13 PM PDT 24 361218231 ps
T820 /workspace/coverage/default/7.lc_ctrl_security_escalation.4262480553 May 16 12:54:29 PM PDT 24 May 16 12:55:04 PM PDT 24 1221664970 ps
T205 /workspace/coverage/default/7.lc_ctrl_claim_transition_if.1029535659 May 16 12:54:24 PM PDT 24 May 16 12:54:52 PM PDT 24 14342659 ps
T821 /workspace/coverage/default/44.lc_ctrl_jtag_access.3798775879 May 16 12:56:32 PM PDT 24 May 16 12:57:06 PM PDT 24 1850934199 ps
T822 /workspace/coverage/default/4.lc_ctrl_jtag_state_post_trans.1334251331 May 16 12:54:02 PM PDT 24 May 16 12:54:37 PM PDT 24 362475931 ps
T823 /workspace/coverage/default/36.lc_ctrl_errors.697939973 May 16 12:56:10 PM PDT 24 May 16 12:56:46 PM PDT 24 722848401 ps
T824 /workspace/coverage/default/7.lc_ctrl_sec_mubi.1910543910 May 16 12:54:23 PM PDT 24 May 16 12:55:03 PM PDT 24 891958896 ps
T825 /workspace/coverage/default/29.lc_ctrl_alert_test.1639004466 May 16 12:55:54 PM PDT 24 May 16 12:56:18 PM PDT 24 138537421 ps
T826 /workspace/coverage/default/45.lc_ctrl_state_post_trans.3836657367 May 16 12:56:31 PM PDT 24 May 16 12:57:09 PM PDT 24 75284659 ps
T827 /workspace/coverage/default/10.lc_ctrl_jtag_smoke.2967741193 May 16 12:54:48 PM PDT 24 May 16 12:55:20 PM PDT 24 294949572 ps
T828 /workspace/coverage/default/21.lc_ctrl_volatile_unlock_smoke.1142258537 May 16 12:55:24 PM PDT 24 May 16 12:55:45 PM PDT 24 40016766 ps
T829 /workspace/coverage/default/40.lc_ctrl_prog_failure.2107705990 May 16 12:56:21 PM PDT 24 May 16 12:56:49 PM PDT 24 119917977 ps
T830 /workspace/coverage/default/36.lc_ctrl_sec_mubi.1882560242 May 16 12:56:11 PM PDT 24 May 16 12:56:45 PM PDT 24 614474657 ps
T831 /workspace/coverage/default/47.lc_ctrl_sec_mubi.1729712279 May 16 12:56:40 PM PDT 24 May 16 12:57:22 PM PDT 24 388358547 ps
T832 /workspace/coverage/default/13.lc_ctrl_sec_token_mux.4130593124 May 16 12:55:03 PM PDT 24 May 16 12:55:37 PM PDT 24 1547248235 ps
T833 /workspace/coverage/default/3.lc_ctrl_jtag_access.3403753691 May 16 12:53:53 PM PDT 24 May 16 12:54:25 PM PDT 24 7637536359 ps
T834 /workspace/coverage/default/18.lc_ctrl_security_escalation.1379300431 May 16 12:55:14 PM PDT 24 May 16 12:55:49 PM PDT 24 3694657162 ps
T835 /workspace/coverage/default/19.lc_ctrl_jtag_state_post_trans.2651980435 May 16 12:55:24 PM PDT 24 May 16 12:56:02 PM PDT 24 1446719395 ps
T836 /workspace/coverage/default/7.lc_ctrl_jtag_state_failure.864334941 May 16 12:54:23 PM PDT 24 May 16 12:55:50 PM PDT 24 2478476622 ps
T837 /workspace/coverage/default/0.lc_ctrl_jtag_access.382144491 May 16 12:53:36 PM PDT 24 May 16 12:54:01 PM PDT 24 605781948 ps
T838 /workspace/coverage/default/16.lc_ctrl_state_post_trans.1094677333 May 16 12:55:00 PM PDT 24 May 16 12:55:29 PM PDT 24 256534598 ps
T839 /workspace/coverage/default/2.lc_ctrl_jtag_regwen_during_op.2052208869 May 16 12:53:48 PM PDT 24 May 16 12:54:33 PM PDT 24 1357479846 ps
T169 /workspace/coverage/default/12.lc_ctrl_stress_all_with_rand_reset.2272597910 May 16 12:54:54 PM PDT 24 May 16 01:01:41 PM PDT 24 28131676960 ps
T840 /workspace/coverage/default/3.lc_ctrl_volatile_unlock_smoke.615871512 May 16 12:53:54 PM PDT 24 May 16 12:54:22 PM PDT 24 15965805 ps
T841 /workspace/coverage/default/38.lc_ctrl_state_post_trans.1956205057 May 16 12:56:15 PM PDT 24 May 16 12:56:50 PM PDT 24 110105402 ps
T842 /workspace/coverage/default/3.lc_ctrl_jtag_state_post_trans.3427253978 May 16 12:53:54 PM PDT 24 May 16 12:54:33 PM PDT 24 684309722 ps
T843 /workspace/coverage/default/34.lc_ctrl_sec_mubi.4058654031 May 16 12:56:08 PM PDT 24 May 16 12:56:44 PM PDT 24 302530430 ps
T844 /workspace/coverage/default/5.lc_ctrl_jtag_state_failure.795438136 May 16 12:54:07 PM PDT 24 May 16 12:55:25 PM PDT 24 19005933690 ps
T845 /workspace/coverage/default/12.lc_ctrl_security_escalation.1282640423 May 16 12:54:56 PM PDT 24 May 16 12:55:28 PM PDT 24 266901105 ps
T846 /workspace/coverage/default/18.lc_ctrl_alert_test.1955571581 May 16 12:55:14 PM PDT 24 May 16 12:55:36 PM PDT 24 13919164 ps
T847 /workspace/coverage/default/46.lc_ctrl_sec_token_mux.4226499514 May 16 12:56:45 PM PDT 24 May 16 12:57:32 PM PDT 24 1816822971 ps
T848 /workspace/coverage/default/22.lc_ctrl_jtag_access.1576014983 May 16 12:55:37 PM PDT 24 May 16 12:56:02 PM PDT 24 2008316191 ps
T849 /workspace/coverage/default/28.lc_ctrl_prog_failure.1320947214 May 16 12:55:47 PM PDT 24 May 16 12:56:11 PM PDT 24 286225273 ps
T850 /workspace/coverage/default/46.lc_ctrl_security_escalation.1380573066 May 16 12:56:38 PM PDT 24 May 16 12:57:20 PM PDT 24 1297249449 ps
T851 /workspace/coverage/default/7.lc_ctrl_jtag_errors.1875809943 May 16 12:54:25 PM PDT 24 May 16 12:55:35 PM PDT 24 3529928410 ps
T852 /workspace/coverage/default/41.lc_ctrl_state_failure.2295723935 May 16 12:56:24 PM PDT 24 May 16 12:57:11 PM PDT 24 453461080 ps
T853 /workspace/coverage/default/30.lc_ctrl_volatile_unlock_smoke.1617049858 May 16 12:55:56 PM PDT 24 May 16 12:56:20 PM PDT 24 22048590 ps
T854 /workspace/coverage/default/23.lc_ctrl_smoke.2281747224 May 16 12:55:34 PM PDT 24 May 16 12:55:56 PM PDT 24 20870840 ps
T855 /workspace/coverage/default/3.lc_ctrl_sec_token_mux.152283105 May 16 12:54:06 PM PDT 24 May 16 12:54:41 PM PDT 24 730775604 ps
T108 /workspace/coverage/default/2.lc_ctrl_sec_cm.2507057497 May 16 12:53:55 PM PDT 24 May 16 12:54:45 PM PDT 24 257310274 ps
T856 /workspace/coverage/default/29.lc_ctrl_volatile_unlock_smoke.3900246218 May 16 12:55:46 PM PDT 24 May 16 12:56:08 PM PDT 24 15434256 ps
T857 /workspace/coverage/default/13.lc_ctrl_security_escalation.4078392903 May 16 12:54:53 PM PDT 24 May 16 12:55:23 PM PDT 24 533250725 ps
T858 /workspace/coverage/default/3.lc_ctrl_sec_token_digest.996543219 May 16 12:54:07 PM PDT 24 May 16 12:54:52 PM PDT 24 843178177 ps
T859 /workspace/coverage/default/38.lc_ctrl_volatile_unlock_smoke.4039727261 May 16 12:56:12 PM PDT 24 May 16 12:56:37 PM PDT 24 59659257 ps
T860 /workspace/coverage/default/32.lc_ctrl_prog_failure.1584904245 May 16 12:55:53 PM PDT 24 May 16 12:56:18 PM PDT 24 279826895 ps
T861 /workspace/coverage/default/19.lc_ctrl_volatile_unlock_smoke.19926889 May 16 12:55:20 PM PDT 24 May 16 12:55:41 PM PDT 24 13055991 ps
T862 /workspace/coverage/default/5.lc_ctrl_prog_failure.3687632624 May 16 12:54:07 PM PDT 24 May 16 12:54:41 PM PDT 24 641149163 ps
T863 /workspace/coverage/default/25.lc_ctrl_smoke.3037478867 May 16 12:55:33 PM PDT 24 May 16 12:55:57 PM PDT 24 499583550 ps
T864 /workspace/coverage/default/39.lc_ctrl_stress_all.1703053731 May 16 12:56:20 PM PDT 24 May 16 01:02:24 PM PDT 24 36330481840 ps
T865 /workspace/coverage/default/21.lc_ctrl_stress_all.873511539 May 16 12:55:23 PM PDT 24 May 16 12:56:05 PM PDT 24 720194444 ps
T203 /workspace/coverage/default/9.lc_ctrl_claim_transition_if.1689083693 May 16 12:54:32 PM PDT 24 May 16 12:54:58 PM PDT 24 40018902 ps
T866 /workspace/coverage/default/8.lc_ctrl_jtag_regwen_during_op.2728340066 May 16 12:54:32 PM PDT 24 May 16 12:55:29 PM PDT 24 2228500951 ps
T867 /workspace/coverage/default/2.lc_ctrl_jtag_smoke.3095189262 May 16 12:53:44 PM PDT 24 May 16 12:54:11 PM PDT 24 156429671 ps
T868 /workspace/coverage/default/10.lc_ctrl_sec_token_digest.1329661504 May 16 12:54:45 PM PDT 24 May 16 12:55:35 PM PDT 24 4615476931 ps
T869 /workspace/coverage/default/46.lc_ctrl_errors.1552749819 May 16 12:56:38 PM PDT 24 May 16 12:57:15 PM PDT 24 218674430 ps
T870 /workspace/coverage/default/26.lc_ctrl_jtag_access.38430364 May 16 12:55:43 PM PDT 24 May 16 12:56:06 PM PDT 24 424487313 ps
T871 /workspace/coverage/default/12.lc_ctrl_jtag_smoke.189449704 May 16 12:54:58 PM PDT 24 May 16 12:55:26 PM PDT 24 559695803 ps
T872 /workspace/coverage/default/30.lc_ctrl_smoke.3787583089 May 16 12:55:55 PM PDT 24 May 16 12:56:20 PM PDT 24 42965185 ps
T873 /workspace/coverage/default/24.lc_ctrl_alert_test.3762974172 May 16 12:55:33 PM PDT 24 May 16 12:55:55 PM PDT 24 61265688 ps
T874 /workspace/coverage/default/8.lc_ctrl_smoke.450740464 May 16 12:54:26 PM PDT 24 May 16 12:54:54 PM PDT 24 14613091 ps
T875 /workspace/coverage/default/8.lc_ctrl_jtag_smoke.1154987870 May 16 12:54:32 PM PDT 24 May 16 12:55:01 PM PDT 24 412160733 ps
T876 /workspace/coverage/default/15.lc_ctrl_prog_failure.3698771653 May 16 12:55:03 PM PDT 24 May 16 12:55:29 PM PDT 24 46205533 ps
T877 /workspace/coverage/default/44.lc_ctrl_stress_all.32188706 May 16 12:56:32 PM PDT 24 May 16 12:59:18 PM PDT 24 6708655146 ps
T878 /workspace/coverage/default/23.lc_ctrl_jtag_access.4124296371 May 16 12:55:35 PM PDT 24 May 16 12:56:01 PM PDT 24 549957142 ps
T128 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.567580062 May 16 12:44:00 PM PDT 24 May 16 12:44:09 PM PDT 24 97305822 ps
T153 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.1947006087 May 16 12:44:11 PM PDT 24 May 16 12:44:22 PM PDT 24 59961817 ps
T122 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.2639992066 May 16 12:44:00 PM PDT 24 May 16 12:44:10 PM PDT 24 87470139 ps
T129 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.4014592044 May 16 12:43:55 PM PDT 24 May 16 12:44:10 PM PDT 24 1220584651 ps
T123 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.2083996003 May 16 12:43:47 PM PDT 24 May 16 12:43:56 PM PDT 24 41207525 ps
T115 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.100666649 May 16 12:43:53 PM PDT 24 May 16 12:44:03 PM PDT 24 53521935 ps
T151 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.1845586903 May 16 12:43:34 PM PDT 24 May 16 12:43:46 PM PDT 24 81227232 ps
T116 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.1783612428 May 16 12:43:47 PM PDT 24 May 16 12:43:59 PM PDT 24 447364342 ps
T199 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.939895538 May 16 12:43:57 PM PDT 24 May 16 12:44:09 PM PDT 24 2855969016 ps
T124 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.1292548917 May 16 12:44:11 PM PDT 24 May 16 12:44:21 PM PDT 24 15783405 ps
T152 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.3437697921 May 16 12:44:07 PM PDT 24 May 16 12:44:30 PM PDT 24 644688106 ps
T117 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.2108664404 May 16 12:44:05 PM PDT 24 May 16 12:44:13 PM PDT 24 20577991 ps
T154 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.1742486013 May 16 12:43:46 PM PDT 24 May 16 12:43:56 PM PDT 24 14218933 ps
T879 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.166284954 May 16 12:44:03 PM PDT 24 May 16 12:44:11 PM PDT 24 139963056 ps
T880 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.1525768459 May 16 12:43:48 PM PDT 24 May 16 12:43:58 PM PDT 24 46944696 ps
T881 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.3713597847 May 16 12:43:52 PM PDT 24 May 16 12:44:01 PM PDT 24 18956758 ps
T149 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.1875610459 May 16 12:43:53 PM PDT 24 May 16 12:44:01 PM PDT 24 57124927 ps
T171 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.1280408902 May 16 12:44:11 PM PDT 24 May 16 12:44:21 PM PDT 24 65273313 ps
T119 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.958891657 May 16 12:44:07 PM PDT 24 May 16 12:44:15 PM PDT 24 114258280 ps
T120 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.2911815940 May 16 12:43:54 PM PDT 24 May 16 12:44:05 PM PDT 24 522035799 ps
T172 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3833633676 May 16 12:44:08 PM PDT 24 May 16 12:44:18 PM PDT 24 148124919 ps
T882 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.2727743607 May 16 12:44:00 PM PDT 24 May 16 12:44:09 PM PDT 24 59966279 ps
T883 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.804488514 May 16 12:43:54 PM PDT 24 May 16 12:44:03 PM PDT 24 14606024 ps
T135 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.309084933 May 16 12:43:38 PM PDT 24 May 16 12:43:49 PM PDT 24 338080656 ps
T170 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.2239665016 May 16 12:43:43 PM PDT 24 May 16 12:43:54 PM PDT 24 26182998 ps
T884 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.2267983803 May 16 12:43:55 PM PDT 24 May 16 12:44:04 PM PDT 24 74960801 ps
T118 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.1009181237 May 16 12:44:10 PM PDT 24 May 16 12:44:20 PM PDT 24 57551980 ps
T885 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.2051730019 May 16 12:43:43 PM PDT 24 May 16 12:43:53 PM PDT 24 963204361 ps
T121 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.4166605768 May 16 12:44:01 PM PDT 24 May 16 12:44:14 PM PDT 24 435029349 ps
T127 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.1963934443 May 16 12:44:06 PM PDT 24 May 16 12:44:15 PM PDT 24 42905158 ps
T886 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.181635537 May 16 12:43:48 PM PDT 24 May 16 12:43:58 PM PDT 24 43371364 ps
T150 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.1316530931 May 16 12:43:55 PM PDT 24 May 16 12:44:06 PM PDT 24 332911667 ps
T887 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.42336292 May 16 12:43:48 PM PDT 24 May 16 12:43:59 PM PDT 24 735126698 ps
T192 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.2640572046 May 16 12:44:01 PM PDT 24 May 16 12:44:09 PM PDT 24 26225054 ps
T143 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.94998957 May 16 12:44:04 PM PDT 24 May 16 12:44:13 PM PDT 24 105986504 ps
T888 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.1348600489 May 16 12:43:52 PM PDT 24 May 16 12:44:12 PM PDT 24 5494594382 ps
T125 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.3193709942 May 16 12:44:05 PM PDT 24 May 16 12:44:13 PM PDT 24 88471098 ps
T173 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.2278167610 May 16 12:44:11 PM PDT 24 May 16 12:44:21 PM PDT 24 288240415 ps
T139 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.601260071 May 16 12:43:49 PM PDT 24 May 16 12:44:00 PM PDT 24 28420093 ps
T148 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.3881000720 May 16 12:43:43 PM PDT 24 May 16 12:43:55 PM PDT 24 331544771 ps
T193 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.1774824648 May 16 12:43:55 PM PDT 24 May 16 12:44:03 PM PDT 24 96609181 ps
T141 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.4029148809 May 16 12:44:10 PM PDT 24 May 16 12:44:21 PM PDT 24 74338998 ps
T889 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.3419944149 May 16 12:44:13 PM PDT 24 May 16 12:44:23 PM PDT 24 50584587 ps
T194 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.1907861380 May 16 12:44:03 PM PDT 24 May 16 12:44:12 PM PDT 24 19469182 ps
T890 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.3935230138 May 16 12:43:41 PM PDT 24 May 16 12:43:53 PM PDT 24 132197235 ps
T180 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.16801985 May 16 12:43:41 PM PDT 24 May 16 12:43:52 PM PDT 24 18849564 ps
T195 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.3693451758 May 16 12:44:04 PM PDT 24 May 16 12:44:12 PM PDT 24 106984554 ps
T891 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.3212120802 May 16 12:43:55 PM PDT 24 May 16 12:44:21 PM PDT 24 1481119134 ps
T892 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.1901877705 May 16 12:43:49 PM PDT 24 May 16 12:43:59 PM PDT 24 27614410 ps
T130 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.971097954 May 16 12:44:11 PM PDT 24 May 16 12:44:23 PM PDT 24 373963662 ps
T181 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.3713635436 May 16 12:44:11 PM PDT 24 May 16 12:44:21 PM PDT 24 13098912 ps
T893 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.1556341174 May 16 12:43:56 PM PDT 24 May 16 12:44:05 PM PDT 24 108680296 ps
T894 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.423562558 May 16 12:44:05 PM PDT 24 May 16 12:44:14 PM PDT 24 143726537 ps
T895 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.527329088 May 16 12:44:01 PM PDT 24 May 16 12:44:12 PM PDT 24 1053126914 ps
T133 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.985032092 May 16 12:43:52 PM PDT 24 May 16 12:44:01 PM PDT 24 89720653 ps
T896 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.978812523 May 16 12:43:47 PM PDT 24 May 16 12:44:00 PM PDT 24 2654557045 ps
T134 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.2326277621 May 16 12:44:02 PM PDT 24 May 16 12:44:12 PM PDT 24 331073056 ps
T897 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.2338503717 May 16 12:44:10 PM PDT 24 May 16 12:44:20 PM PDT 24 22812425 ps
T140 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.2663335189 May 16 12:44:03 PM PDT 24 May 16 12:44:12 PM PDT 24 24580261 ps
T898 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2044872868 May 16 12:43:44 PM PDT 24 May 16 12:43:57 PM PDT 24 126821847 ps
T196 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.1584345370 May 16 12:43:41 PM PDT 24 May 16 12:43:52 PM PDT 24 75994046 ps
T899 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.2545506832 May 16 12:44:08 PM PDT 24 May 16 12:44:17 PM PDT 24 21927428 ps
T136 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.429110331 May 16 12:43:46 PM PDT 24 May 16 12:43:59 PM PDT 24 110320755 ps
T900 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.2062850638 May 16 12:43:56 PM PDT 24 May 16 12:44:14 PM PDT 24 855248966 ps
T901 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.3546991870 May 16 12:43:46 PM PDT 24 May 16 12:44:12 PM PDT 24 679819946 ps
T902 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.3255662918 May 16 12:44:02 PM PDT 24 May 16 12:44:11 PM PDT 24 71718914 ps
T903 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.2739085992 May 16 12:44:02 PM PDT 24 May 16 12:44:10 PM PDT 24 27837190 ps
T904 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.1276001173 May 16 12:44:12 PM PDT 24 May 16 12:44:23 PM PDT 24 26608557 ps
T905 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.3238995448 May 16 12:44:00 PM PDT 24 May 16 12:44:09 PM PDT 24 78756789 ps
T906 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.1723583678 May 16 12:44:02 PM PDT 24 May 16 12:44:15 PM PDT 24 510800352 ps
T182 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.1804563062 May 16 12:43:45 PM PDT 24 May 16 12:43:56 PM PDT 24 36164624 ps
T907 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2554656059 May 16 12:43:55 PM PDT 24 May 16 12:44:05 PM PDT 24 262079470 ps
T908 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.2997873303 May 16 12:43:45 PM PDT 24 May 16 12:43:56 PM PDT 24 39384522 ps
T909 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.2317162791 May 16 12:44:11 PM PDT 24 May 16 12:44:21 PM PDT 24 48947014 ps
T910 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.3936996592 May 16 12:43:48 PM PDT 24 May 16 12:43:58 PM PDT 24 100968680 ps
T911 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.1309050460 May 16 12:43:56 PM PDT 24 May 16 12:44:05 PM PDT 24 65588892 ps
T183 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.750639166 May 16 12:43:56 PM PDT 24 May 16 12:44:05 PM PDT 24 18417344 ps
T912 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.1853809286 May 16 12:43:56 PM PDT 24 May 16 12:44:06 PM PDT 24 126215212 ps
T913 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.2421641413 May 16 12:43:56 PM PDT 24 May 16 12:44:05 PM PDT 24 159248698 ps
T914 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.2779660395 May 16 12:43:48 PM PDT 24 May 16 12:43:58 PM PDT 24 34621924 ps
T915 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.1451919051 May 16 12:44:03 PM PDT 24 May 16 12:44:11 PM PDT 24 21972856 ps
T916 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.3297431769 May 16 12:44:11 PM PDT 24 May 16 12:44:22 PM PDT 24 120687843 ps
T917 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.222276797 May 16 12:44:14 PM PDT 24 May 16 12:44:24 PM PDT 24 224614983 ps
T918 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.3875654801 May 16 12:43:43 PM PDT 24 May 16 12:43:54 PM PDT 24 116167531 ps
T919 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.2374066871 May 16 12:43:55 PM PDT 24 May 16 12:44:03 PM PDT 24 115611924 ps
T920 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.929614139 May 16 12:44:10 PM PDT 24 May 16 12:44:21 PM PDT 24 101214579 ps
T921 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.2170075533 May 16 12:44:04 PM PDT 24 May 16 12:44:16 PM PDT 24 2178769184 ps
T922 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.3539729009 May 16 12:43:38 PM PDT 24 May 16 12:43:49 PM PDT 24 134470575 ps
T923 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1300514550 May 16 12:44:05 PM PDT 24 May 16 12:45:01 PM PDT 24 2272149602 ps
T924 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.3561712041 May 16 12:44:13 PM PDT 24 May 16 12:44:22 PM PDT 24 137948963 ps
T184 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.4033497252 May 16 12:44:04 PM PDT 24 May 16 12:44:12 PM PDT 24 96099092 ps
T925 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.3891845245 May 16 12:43:46 PM PDT 24 May 16 12:43:56 PM PDT 24 23450934 ps
T926 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.2396506746 May 16 12:44:11 PM PDT 24 May 16 12:44:21 PM PDT 24 26946564 ps
T146 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.830389618 May 16 12:44:08 PM PDT 24 May 16 12:44:18 PM PDT 24 61329492 ps
T144 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.1364978152 May 16 12:44:14 PM PDT 24 May 16 12:44:25 PM PDT 24 65423581 ps
T927 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.2617274445 May 16 12:44:11 PM PDT 24 May 16 12:44:22 PM PDT 24 17800421 ps
T928 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.2146060688 May 16 12:44:02 PM PDT 24 May 16 12:44:11 PM PDT 24 187863477 ps
T185 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.466455958 May 16 12:44:06 PM PDT 24 May 16 12:44:13 PM PDT 24 57861295 ps
T186 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.692730160 May 16 12:43:53 PM PDT 24 May 16 12:44:01 PM PDT 24 51794174 ps
T929 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.633164469 May 16 12:43:46 PM PDT 24 May 16 12:43:56 PM PDT 24 164291567 ps
T132 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.3737763781 May 16 12:44:11 PM PDT 24 May 16 12:44:22 PM PDT 24 347571520 ps
T138 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.877769246 May 16 12:44:01 PM PDT 24 May 16 12:44:13 PM PDT 24 122663354 ps
T930 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3550563482 May 16 12:43:58 PM PDT 24 May 16 12:44:08 PM PDT 24 157005908 ps
T931 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.3947279323 May 16 12:44:11 PM PDT 24 May 16 12:44:23 PM PDT 24 96584099 ps
T932 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.811853140 May 16 12:44:08 PM PDT 24 May 16 12:44:16 PM PDT 24 26962938 ps
T933 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.754791726 May 16 12:44:03 PM PDT 24 May 16 12:44:13 PM PDT 24 84131003 ps
T934 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.3594131607 May 16 12:43:48 PM PDT 24 May 16 12:43:59 PM PDT 24 322762398 ps
T935 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.1817968418 May 16 12:44:10 PM PDT 24 May 16 12:44:23 PM PDT 24 397373736 ps
T137 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.3481310319 May 16 12:44:10 PM PDT 24 May 16 12:44:20 PM PDT 24 162331176 ps
T936 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.2172846312 May 16 12:43:42 PM PDT 24 May 16 12:43:53 PM PDT 24 28074837 ps
T187 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.1629920123 May 16 12:44:11 PM PDT 24 May 16 12:44:21 PM PDT 24 15261310 ps
T937 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.161008327 May 16 12:44:10 PM PDT 24 May 16 12:44:20 PM PDT 24 80042510 ps
T938 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.2074770307 May 16 12:43:52 PM PDT 24 May 16 12:44:01 PM PDT 24 67847111 ps
T939 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.585655091 May 16 12:43:42 PM PDT 24 May 16 12:43:53 PM PDT 24 17241715 ps
T940 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.1993682828 May 16 12:43:43 PM PDT 24 May 16 12:43:53 PM PDT 24 18155298 ps
T188 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.2190316921 May 16 12:44:16 PM PDT 24 May 16 12:44:28 PM PDT 24 13155174 ps
T941 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.2195727073 May 16 12:44:13 PM PDT 24 May 16 12:44:23 PM PDT 24 13865564 ps
T942 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.2631967548 May 16 12:44:14 PM PDT 24 May 16 12:44:25 PM PDT 24 42235160 ps
T943 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2894552343 May 16 12:43:41 PM PDT 24 May 16 12:43:52 PM PDT 24 62366904 ps
T944 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.1200752529 May 16 12:43:44 PM PDT 24 May 16 12:43:54 PM PDT 24 43660456 ps
T945 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.3332641963 May 16 12:43:44 PM PDT 24 May 16 12:43:54 PM PDT 24 15411769 ps
T190 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.2153573611 May 16 12:43:49 PM PDT 24 May 16 12:44:00 PM PDT 24 204910987 ps
T946 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2368874838 May 16 12:43:55 PM PDT 24 May 16 12:44:06 PM PDT 24 132309431 ps
T947 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.334556497 May 16 12:44:13 PM PDT 24 May 16 12:44:24 PM PDT 24 19705597 ps
T948 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.4113497955 May 16 12:43:54 PM PDT 24 May 16 12:44:03 PM PDT 24 192798738 ps
T949 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.1173440141 May 16 12:43:46 PM PDT 24 May 16 12:43:57 PM PDT 24 462374032 ps
T950 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.1669182118 May 16 12:43:59 PM PDT 24 May 16 12:44:08 PM PDT 24 52569829 ps
T951 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.809283158 May 16 12:43:55 PM PDT 24 May 16 12:44:06 PM PDT 24 85938294 ps
T952 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.4141007668 May 16 12:43:56 PM PDT 24 May 16 12:44:05 PM PDT 24 87308148 ps
T126 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.4115144092 May 16 12:44:13 PM PDT 24 May 16 12:44:25 PM PDT 24 482466558 ps
T953 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.527092190 May 16 12:44:04 PM PDT 24 May 16 12:44:14 PM PDT 24 645851769 ps
T954 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.2439696642 May 16 12:43:45 PM PDT 24 May 16 12:43:56 PM PDT 24 236604644 ps
T147 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.3311447089 May 16 12:44:03 PM PDT 24 May 16 12:44:13 PM PDT 24 237621255 ps
T955 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.2073759620 May 16 12:44:10 PM PDT 24 May 16 12:44:19 PM PDT 24 54052030 ps
T956 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.50871082 May 16 12:43:47 PM PDT 24 May 16 12:43:58 PM PDT 24 248366671 ps
T957 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4281309587 May 16 12:44:11 PM PDT 24 May 16 12:44:24 PM PDT 24 99122240 ps
T958 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.614554761 May 16 12:44:03 PM PDT 24 May 16 12:44:21 PM PDT 24 3553145217 ps
T959 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.4097184798 May 16 12:43:53 PM PDT 24 May 16 12:44:02 PM PDT 24 46314646 ps
T960 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.1891070050 May 16 12:43:57 PM PDT 24 May 16 12:44:07 PM PDT 24 259753194 ps
T961 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.2638729634 May 16 12:44:01 PM PDT 24 May 16 12:44:16 PM PDT 24 673804064 ps
T962 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.2391096327 May 16 12:43:55 PM PDT 24 May 16 12:44:03 PM PDT 24 16092593 ps
T963 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.456185426 May 16 12:44:10 PM PDT 24 May 16 12:44:20 PM PDT 24 71112485 ps
T964 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.3734369804 May 16 12:43:44 PM PDT 24 May 16 12:43:54 PM PDT 24 22157558 ps
T965 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.471885202 May 16 12:43:54 PM PDT 24 May 16 12:44:02 PM PDT 24 136033810 ps
T966 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.4039172927 May 16 12:43:38 PM PDT 24 May 16 12:43:50 PM PDT 24 425745361 ps
T967 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.1214889332 May 16 12:43:43 PM PDT 24 May 16 12:44:02 PM PDT 24 810315782 ps
T968 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.1529472891 May 16 12:43:55 PM PDT 24 May 16 12:44:04 PM PDT 24 37105520 ps
T969 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.2365465829 May 16 12:43:45 PM PDT 24 May 16 12:43:57 PM PDT 24 345082916 ps
T970 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.982515938 May 16 12:43:56 PM PDT 24 May 16 12:44:08 PM PDT 24 809927537 ps
T971 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.587037650 May 16 12:44:06 PM PDT 24 May 16 12:44:13 PM PDT 24 61310609 ps
T972 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.4080062654 May 16 12:44:12 PM PDT 24 May 16 12:44:23 PM PDT 24 126263574 ps
T973 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.1871217955 May 16 12:43:57 PM PDT 24 May 16 12:44:06 PM PDT 24 113013650 ps
T974 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.3052521322 May 16 12:43:46 PM PDT 24 May 16 12:43:56 PM PDT 24 79570599 ps
T975 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.2172434029 May 16 12:44:04 PM PDT 24 May 16 12:44:12 PM PDT 24 1275307250 ps
T976 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.2085060833 May 16 12:43:44 PM PDT 24 May 16 12:43:54 PM PDT 24 89132843 ps
T131 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.3207678856 May 16 12:43:40 PM PDT 24 May 16 12:43:52 PM PDT 24 44996086 ps
T977 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.1593607473 May 16 12:43:43 PM PDT 24 May 16 12:43:53 PM PDT 24 20433993 ps
T978 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.48820435 May 16 12:43:51 PM PDT 24 May 16 12:44:01 PM PDT 24 65542102 ps
T979 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.3321161647 May 16 12:43:39 PM PDT 24 May 16 12:43:53 PM PDT 24 158399539 ps
T980 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.429243913 May 16 12:43:46 PM PDT 24 May 16 12:44:05 PM PDT 24 409898900 ps
T981 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.270448484 May 16 12:43:48 PM PDT 24 May 16 12:44:00 PM PDT 24 1235746064 ps
T982 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.3770718978 May 16 12:43:40 PM PDT 24 May 16 12:44:13 PM PDT 24 1087676215 ps
T983 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.2228048052 May 16 12:44:11 PM PDT 24 May 16 12:44:23 PM PDT 24 71996335 ps
T984 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.2362000268 May 16 12:43:41 PM PDT 24 May 16 12:43:52 PM PDT 24 64415360 ps
T985 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.1929312721 May 16 12:44:06 PM PDT 24 May 16 12:44:14 PM PDT 24 44114938 ps
T986 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.448279065 May 16 12:43:58 PM PDT 24 May 16 12:44:06 PM PDT 24 52173527 ps
T987 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.3257951713 May 16 12:44:00 PM PDT 24 May 16 12:44:09 PM PDT 24 15374234 ps
T988 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.3795740853 May 16 12:43:55 PM PDT 24 May 16 12:44:06 PM PDT 24 571180362 ps
T989 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.3599928998 May 16 12:44:13 PM PDT 24 May 16 12:44:24 PM PDT 24 52994412 ps
T990 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4263655249 May 16 12:43:41 PM PDT 24 May 16 12:43:53 PM PDT 24 289597892 ps
T991 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.1425896609 May 16 12:44:13 PM PDT 24 May 16 12:44:25 PM PDT 24 205565451 ps
T189 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.2532499448 May 16 12:44:11 PM PDT 24 May 16 12:44:21 PM PDT 24 22748743 ps
T992 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.1430894606 May 16 12:43:38 PM PDT 24 May 16 12:44:07 PM PDT 24 856139277 ps
T993 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.1304468262 May 16 12:44:00 PM PDT 24 May 16 12:44:10 PM PDT 24 127156785 ps
T191 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.439066563 May 16 12:44:12 PM PDT 24 May 16 12:44:22 PM PDT 24 15024650 ps
T994 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.3249876855 May 16 12:44:05 PM PDT 24 May 16 12:44:13 PM PDT 24 45427049 ps
T995 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.2301507663 May 16 12:43:42 PM PDT 24 May 16 12:44:01 PM PDT 24 361346637 ps
T996 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.725764136 May 16 12:43:53 PM PDT 24 May 16 12:44:02 PM PDT 24 204893194 ps
T145 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.655313979 May 16 12:44:13 PM PDT 24 May 16 12:44:26 PM PDT 24 542361703 ps
T997 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.378961831 May 16 12:44:08 PM PDT 24 May 16 12:44:17 PM PDT 24 27328359 ps
T142 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1301181745 May 16 12:43:47 PM PDT 24 May 16 12:43:59 PM PDT 24 76726582 ps
T998 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.3053409798 May 16 12:44:06 PM PDT 24 May 16 12:44:16 PM PDT 24 45838911 ps
T999 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.162924840 May 16 12:43:55 PM PDT 24 May 16 12:44:03 PM PDT 24 18481936 ps
T1000 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.560354957 May 16 12:44:00 PM PDT 24 May 16 12:44:09 PM PDT 24 157423274 ps
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