Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.82 97.89 95.68 93.31 97.67 98.55 98.51 96.11


Total test records in report: 1001
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T808 /workspace/coverage/default/30.lc_ctrl_alert_test.1041725734 May 23 01:35:35 PM PDT 24 May 23 01:35:38 PM PDT 24 53013762 ps
T809 /workspace/coverage/default/43.lc_ctrl_state_failure.38307004 May 23 01:36:11 PM PDT 24 May 23 01:36:39 PM PDT 24 286432535 ps
T810 /workspace/coverage/default/28.lc_ctrl_sec_mubi.2539410046 May 23 01:35:43 PM PDT 24 May 23 01:36:03 PM PDT 24 1602304285 ps
T811 /workspace/coverage/default/5.lc_ctrl_jtag_priority.2565468193 May 23 01:34:00 PM PDT 24 May 23 01:34:08 PM PDT 24 211744664 ps
T812 /workspace/coverage/default/26.lc_ctrl_security_escalation.771885989 May 23 01:35:35 PM PDT 24 May 23 01:35:49 PM PDT 24 303635068 ps
T813 /workspace/coverage/default/11.lc_ctrl_smoke.2158035822 May 23 01:34:32 PM PDT 24 May 23 01:34:35 PM PDT 24 72611961 ps
T814 /workspace/coverage/default/43.lc_ctrl_security_escalation.1338691648 May 23 01:36:15 PM PDT 24 May 23 01:36:29 PM PDT 24 254807721 ps
T815 /workspace/coverage/default/24.lc_ctrl_security_escalation.2980830019 May 23 01:35:23 PM PDT 24 May 23 01:35:37 PM PDT 24 518469005 ps
T816 /workspace/coverage/default/18.lc_ctrl_jtag_state_failure.2801337881 May 23 01:34:56 PM PDT 24 May 23 01:35:33 PM PDT 24 1292833417 ps
T817 /workspace/coverage/default/11.lc_ctrl_jtag_state_failure.2191739771 May 23 01:34:35 PM PDT 24 May 23 01:35:11 PM PDT 24 5828224665 ps
T818 /workspace/coverage/default/11.lc_ctrl_stress_all.2382292589 May 23 01:34:33 PM PDT 24 May 23 01:37:42 PM PDT 24 11662132826 ps
T819 /workspace/coverage/default/40.lc_ctrl_errors.3440168428 May 23 01:36:06 PM PDT 24 May 23 01:36:30 PM PDT 24 3983011177 ps
T820 /workspace/coverage/default/4.lc_ctrl_jtag_smoke.2621840647 May 23 01:33:45 PM PDT 24 May 23 01:33:51 PM PDT 24 173125264 ps
T821 /workspace/coverage/default/26.lc_ctrl_volatile_unlock_smoke.517047169 May 23 01:35:22 PM PDT 24 May 23 01:35:26 PM PDT 24 17143250 ps
T822 /workspace/coverage/default/9.lc_ctrl_jtag_regwen_during_op.3352728827 May 23 01:34:31 PM PDT 24 May 23 01:34:46 PM PDT 24 1159976329 ps
T823 /workspace/coverage/default/27.lc_ctrl_state_failure.2676137631 May 23 01:35:36 PM PDT 24 May 23 01:36:01 PM PDT 24 935884548 ps
T824 /workspace/coverage/default/8.lc_ctrl_jtag_access.1993167500 May 23 01:34:19 PM PDT 24 May 23 01:34:26 PM PDT 24 1393306727 ps
T825 /workspace/coverage/default/22.lc_ctrl_prog_failure.3609752581 May 23 01:35:22 PM PDT 24 May 23 01:35:29 PM PDT 24 108180189 ps
T826 /workspace/coverage/default/10.lc_ctrl_sec_token_digest.3202887004 May 23 01:34:32 PM PDT 24 May 23 01:34:43 PM PDT 24 320025429 ps
T827 /workspace/coverage/default/20.lc_ctrl_sec_token_mux.2109014603 May 23 01:35:10 PM PDT 24 May 23 01:35:20 PM PDT 24 977454600 ps
T828 /workspace/coverage/default/29.lc_ctrl_volatile_unlock_smoke.2112137734 May 23 01:35:36 PM PDT 24 May 23 01:35:39 PM PDT 24 14396757 ps
T829 /workspace/coverage/default/18.lc_ctrl_errors.111096761 May 23 01:34:57 PM PDT 24 May 23 01:35:10 PM PDT 24 1245408432 ps
T830 /workspace/coverage/default/17.lc_ctrl_jtag_state_failure.3937845567 May 23 01:35:07 PM PDT 24 May 23 01:35:40 PM PDT 24 1235045779 ps
T831 /workspace/coverage/default/33.lc_ctrl_prog_failure.2191920085 May 23 01:35:50 PM PDT 24 May 23 01:35:54 PM PDT 24 28574174 ps
T832 /workspace/coverage/default/29.lc_ctrl_alert_test.3459750134 May 23 01:35:35 PM PDT 24 May 23 01:35:39 PM PDT 24 14791088 ps
T833 /workspace/coverage/default/11.lc_ctrl_state_failure.2024673735 May 23 01:34:32 PM PDT 24 May 23 01:34:57 PM PDT 24 649231732 ps
T834 /workspace/coverage/default/34.lc_ctrl_state_post_trans.866940484 May 23 01:35:49 PM PDT 24 May 23 01:35:58 PM PDT 24 82919526 ps
T835 /workspace/coverage/default/43.lc_ctrl_smoke.3319602621 May 23 01:36:15 PM PDT 24 May 23 01:36:21 PM PDT 24 47822139 ps
T836 /workspace/coverage/default/8.lc_ctrl_prog_failure.2401492076 May 23 01:34:17 PM PDT 24 May 23 01:34:22 PM PDT 24 62555692 ps
T837 /workspace/coverage/default/17.lc_ctrl_jtag_access.1176158504 May 23 01:35:06 PM PDT 24 May 23 01:35:11 PM PDT 24 105243057 ps
T838 /workspace/coverage/default/11.lc_ctrl_sec_token_digest.1794711351 May 23 01:34:35 PM PDT 24 May 23 01:34:48 PM PDT 24 1586314106 ps
T839 /workspace/coverage/default/29.lc_ctrl_sec_token_mux.992787061 May 23 01:35:41 PM PDT 24 May 23 01:35:55 PM PDT 24 567179648 ps
T840 /workspace/coverage/default/38.lc_ctrl_sec_mubi.1585071441 May 23 01:36:00 PM PDT 24 May 23 01:36:16 PM PDT 24 294324526 ps
T841 /workspace/coverage/default/34.lc_ctrl_alert_test.1119862133 May 23 01:35:51 PM PDT 24 May 23 01:35:54 PM PDT 24 46642289 ps
T842 /workspace/coverage/default/13.lc_ctrl_alert_test.641263217 May 23 01:34:44 PM PDT 24 May 23 01:34:48 PM PDT 24 22500719 ps
T843 /workspace/coverage/default/30.lc_ctrl_sec_token_digest.1554302384 May 23 01:35:37 PM PDT 24 May 23 01:35:49 PM PDT 24 185974152 ps
T844 /workspace/coverage/default/49.lc_ctrl_state_post_trans.1302614150 May 23 01:36:25 PM PDT 24 May 23 01:36:35 PM PDT 24 164799629 ps
T845 /workspace/coverage/default/8.lc_ctrl_regwen_during_op.2828460841 May 23 01:34:21 PM PDT 24 May 23 01:34:44 PM PDT 24 328074689 ps
T846 /workspace/coverage/default/1.lc_ctrl_sec_token_digest.1526152344 May 23 01:33:22 PM PDT 24 May 23 01:33:43 PM PDT 24 692539986 ps
T847 /workspace/coverage/default/16.lc_ctrl_jtag_state_failure.1709381672 May 23 01:34:49 PM PDT 24 May 23 01:35:53 PM PDT 24 1393053688 ps
T848 /workspace/coverage/default/41.lc_ctrl_sec_token_digest.1215265851 May 23 01:36:16 PM PDT 24 May 23 01:36:32 PM PDT 24 1303799787 ps
T849 /workspace/coverage/default/11.lc_ctrl_jtag_smoke.2394501647 May 23 01:34:34 PM PDT 24 May 23 01:34:45 PM PDT 24 1216477696 ps
T850 /workspace/coverage/default/18.lc_ctrl_sec_token_digest.684252321 May 23 01:34:57 PM PDT 24 May 23 01:35:07 PM PDT 24 2710862569 ps
T851 /workspace/coverage/default/2.lc_ctrl_sec_token_digest.2873855319 May 23 01:33:33 PM PDT 24 May 23 01:33:45 PM PDT 24 1228744660 ps
T852 /workspace/coverage/default/48.lc_ctrl_sec_mubi.2614272788 May 23 01:36:27 PM PDT 24 May 23 01:36:47 PM PDT 24 1601291592 ps
T853 /workspace/coverage/default/34.lc_ctrl_sec_token_digest.1324404365 May 23 01:35:50 PM PDT 24 May 23 01:36:07 PM PDT 24 2697525009 ps
T71 /workspace/coverage/default/4.lc_ctrl_smoke.2766150780 May 23 01:33:44 PM PDT 24 May 23 01:33:50 PM PDT 24 421562451 ps
T854 /workspace/coverage/default/12.lc_ctrl_smoke.4175762797 May 23 01:34:35 PM PDT 24 May 23 01:34:41 PM PDT 24 286676230 ps
T855 /workspace/coverage/default/19.lc_ctrl_alert_test.3425438721 May 23 01:35:09 PM PDT 24 May 23 01:35:12 PM PDT 24 41625924 ps
T856 /workspace/coverage/default/28.lc_ctrl_sec_token_digest.2933583483 May 23 01:35:43 PM PDT 24 May 23 01:36:06 PM PDT 24 2472587951 ps
T158 /workspace/coverage/default/16.lc_ctrl_stress_all_with_rand_reset.3477279049 May 23 01:34:58 PM PDT 24 May 23 01:59:30 PM PDT 24 28885997717 ps
T857 /workspace/coverage/default/1.lc_ctrl_jtag_priority.1143749226 May 23 01:33:16 PM PDT 24 May 23 01:33:23 PM PDT 24 2548571918 ps
T858 /workspace/coverage/default/8.lc_ctrl_jtag_prog_failure.986170590 May 23 01:34:17 PM PDT 24 May 23 01:34:28 PM PDT 24 580888299 ps
T859 /workspace/coverage/default/8.lc_ctrl_stress_all.3880762030 May 23 01:34:15 PM PDT 24 May 23 01:34:32 PM PDT 24 1383183057 ps
T860 /workspace/coverage/default/9.lc_ctrl_errors.208651066 May 23 01:34:28 PM PDT 24 May 23 01:34:43 PM PDT 24 362255479 ps
T861 /workspace/coverage/default/46.lc_ctrl_alert_test.2619019049 May 23 01:36:27 PM PDT 24 May 23 01:36:31 PM PDT 24 16878895 ps
T862 /workspace/coverage/default/6.lc_ctrl_stress_all.570324351 May 23 01:34:18 PM PDT 24 May 23 01:34:42 PM PDT 24 347533944 ps
T863 /workspace/coverage/default/17.lc_ctrl_alert_test.1513310233 May 23 01:34:57 PM PDT 24 May 23 01:35:00 PM PDT 24 27842719 ps
T864 /workspace/coverage/default/41.lc_ctrl_smoke.1319910556 May 23 01:36:13 PM PDT 24 May 23 01:36:19 PM PDT 24 466281107 ps
T865 /workspace/coverage/default/11.lc_ctrl_jtag_state_post_trans.3517081014 May 23 01:34:33 PM PDT 24 May 23 01:34:46 PM PDT 24 5740894422 ps
T866 /workspace/coverage/default/30.lc_ctrl_prog_failure.3525121402 May 23 01:35:38 PM PDT 24 May 23 01:35:44 PM PDT 24 500760615 ps
T867 /workspace/coverage/default/10.lc_ctrl_jtag_errors.3347117124 May 23 01:34:35 PM PDT 24 May 23 01:35:09 PM PDT 24 3620688618 ps
T868 /workspace/coverage/default/41.lc_ctrl_errors.3832833992 May 23 01:36:08 PM PDT 24 May 23 01:36:19 PM PDT 24 275356123 ps
T869 /workspace/coverage/default/21.lc_ctrl_errors.1590191709 May 23 01:35:09 PM PDT 24 May 23 01:35:21 PM PDT 24 834876673 ps
T870 /workspace/coverage/default/40.lc_ctrl_stress_all.158849078 May 23 01:36:14 PM PDT 24 May 23 01:38:07 PM PDT 24 3298052108 ps
T871 /workspace/coverage/default/21.lc_ctrl_alert_test.2285321252 May 23 01:35:08 PM PDT 24 May 23 01:35:12 PM PDT 24 42956867 ps
T100 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.957206183 May 23 01:26:26 PM PDT 24 May 23 01:26:31 PM PDT 24 107291100 ps
T101 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.1716261294 May 23 01:26:27 PM PDT 24 May 23 01:26:31 PM PDT 24 121318417 ps
T112 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.1464670997 May 23 01:26:14 PM PDT 24 May 23 01:26:16 PM PDT 24 53741197 ps
T108 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.3758382474 May 23 01:26:24 PM PDT 24 May 23 01:26:27 PM PDT 24 51245141 ps
T131 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.1618734206 May 23 01:26:14 PM PDT 24 May 23 01:26:17 PM PDT 24 57969599 ps
T102 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.4214600665 May 23 01:26:44 PM PDT 24 May 23 01:26:49 PM PDT 24 141930864 ps
T121 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.937420593 May 23 01:26:45 PM PDT 24 May 23 01:26:53 PM PDT 24 338264581 ps
T103 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.1851856972 May 23 01:26:29 PM PDT 24 May 23 01:26:33 PM PDT 24 87628965 ps
T144 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.2793430993 May 23 01:26:43 PM PDT 24 May 23 01:26:45 PM PDT 24 54373112 ps
T145 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.2688902302 May 23 01:26:16 PM PDT 24 May 23 01:26:19 PM PDT 24 14238866 ps
T129 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.902210760 May 23 01:26:28 PM PDT 24 May 23 01:26:32 PM PDT 24 249678689 ps
T132 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.197674691 May 23 01:26:29 PM PDT 24 May 23 01:26:33 PM PDT 24 53338742 ps
T104 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.3170801662 May 23 01:26:37 PM PDT 24 May 23 01:26:41 PM PDT 24 337149411 ps
T105 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.4277429017 May 23 01:26:29 PM PDT 24 May 23 01:26:33 PM PDT 24 64727803 ps
T106 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.627985720 May 23 01:26:17 PM PDT 24 May 23 01:26:20 PM PDT 24 285320084 ps
T107 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.2858737150 May 23 01:26:10 PM PDT 24 May 23 01:26:14 PM PDT 24 114891857 ps
T872 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.3704622950 May 23 01:26:44 PM PDT 24 May 23 01:26:47 PM PDT 24 15733723 ps
T122 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.2931063140 May 23 01:26:20 PM PDT 24 May 23 01:26:24 PM PDT 24 158045357 ps
T199 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.3467997379 May 23 01:26:09 PM PDT 24 May 23 01:26:12 PM PDT 24 36511615 ps
T130 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.3266922132 May 23 01:26:08 PM PDT 24 May 23 01:26:15 PM PDT 24 594812749 ps
T109 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.1767205702 May 23 01:26:45 PM PDT 24 May 23 01:26:49 PM PDT 24 103871131 ps
T113 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.1516018166 May 23 01:26:15 PM PDT 24 May 23 01:26:18 PM PDT 24 88450812 ps
T873 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.1839738517 May 23 01:26:16 PM PDT 24 May 23 01:26:20 PM PDT 24 61141884 ps
T110 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.3539136000 May 23 01:26:28 PM PDT 24 May 23 01:26:35 PM PDT 24 76523254 ps
T118 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.278616420 May 23 01:26:37 PM PDT 24 May 23 01:26:40 PM PDT 24 270924069 ps
T200 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.2426447931 May 23 01:26:19 PM PDT 24 May 23 01:26:23 PM PDT 24 86039128 ps
T133 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.3149727084 May 23 01:26:35 PM PDT 24 May 23 01:26:55 PM PDT 24 804220926 ps
T126 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.1522278434 May 23 01:26:14 PM PDT 24 May 23 01:26:17 PM PDT 24 244926051 ps
T874 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.443994877 May 23 01:26:15 PM PDT 24 May 23 01:26:18 PM PDT 24 85903567 ps
T875 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.161265351 May 23 01:26:29 PM PDT 24 May 23 01:26:35 PM PDT 24 41470670 ps
T146 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.4062448236 May 23 01:26:19 PM PDT 24 May 23 01:26:22 PM PDT 24 27277345 ps
T876 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.4208791452 May 23 01:26:29 PM PDT 24 May 23 01:26:35 PM PDT 24 400722110 ps
T189 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.1529145008 May 23 01:26:26 PM PDT 24 May 23 01:26:30 PM PDT 24 18417864 ps
T877 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.3167025569 May 23 01:26:24 PM PDT 24 May 23 01:26:31 PM PDT 24 158899688 ps
T127 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.1073072576 May 23 01:26:26 PM PDT 24 May 23 01:26:31 PM PDT 24 328639701 ps
T147 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.923749233 May 23 01:26:17 PM PDT 24 May 23 01:26:20 PM PDT 24 16724831 ps
T128 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.568036885 May 23 01:26:28 PM PDT 24 May 23 01:26:48 PM PDT 24 1227474011 ps
T111 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.2702870833 May 23 01:26:09 PM PDT 24 May 23 01:26:14 PM PDT 24 231102146 ps
T878 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.1475797103 May 23 01:26:16 PM PDT 24 May 23 01:26:35 PM PDT 24 2812111689 ps
T879 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.475337012 May 23 01:26:45 PM PDT 24 May 23 01:26:49 PM PDT 24 25108368 ps
T880 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.2049323411 May 23 01:26:46 PM PDT 24 May 23 01:26:50 PM PDT 24 125942507 ps
T201 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.3712995546 May 23 01:26:14 PM PDT 24 May 23 01:26:17 PM PDT 24 69946667 ps
T202 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.1077020282 May 23 01:26:46 PM PDT 24 May 23 01:26:49 PM PDT 24 108190440 ps
T203 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.1919186427 May 23 01:26:41 PM PDT 24 May 23 01:26:43 PM PDT 24 144894097 ps
T119 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.882787969 May 23 01:26:45 PM PDT 24 May 23 01:26:50 PM PDT 24 255290271 ps
T881 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.4142252539 May 23 01:26:05 PM PDT 24 May 23 01:26:15 PM PDT 24 3032885100 ps
T882 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.3380247040 May 23 01:26:15 PM PDT 24 May 23 01:26:18 PM PDT 24 229395549 ps
T883 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.3675640021 May 23 01:26:29 PM PDT 24 May 23 01:26:34 PM PDT 24 27371421 ps
T884 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.3145791230 May 23 01:26:50 PM PDT 24 May 23 01:26:54 PM PDT 24 219773269 ps
T885 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.2467105528 May 23 01:26:29 PM PDT 24 May 23 01:26:34 PM PDT 24 367080433 ps
T886 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.919403124 May 23 01:26:18 PM PDT 24 May 23 01:26:24 PM PDT 24 271680281 ps
T887 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.3656419011 May 23 01:26:15 PM PDT 24 May 23 01:26:19 PM PDT 24 38653541 ps
T888 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2279578826 May 23 01:26:11 PM PDT 24 May 23 01:26:14 PM PDT 24 127612258 ps
T889 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.1048966420 May 23 01:26:25 PM PDT 24 May 23 01:26:39 PM PDT 24 1216247320 ps
T190 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.1420618398 May 23 01:26:24 PM PDT 24 May 23 01:26:27 PM PDT 24 13427842 ps
T204 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.215208690 May 23 01:26:17 PM PDT 24 May 23 01:26:20 PM PDT 24 21920511 ps
T890 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.491870328 May 23 01:26:35 PM PDT 24 May 23 01:26:38 PM PDT 24 29575633 ps
T205 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.2111583260 May 23 01:26:18 PM PDT 24 May 23 01:26:20 PM PDT 24 29734753 ps
T891 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.157544732 May 23 01:26:39 PM PDT 24 May 23 01:26:41 PM PDT 24 53168969 ps
T892 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.3001637620 May 23 01:26:32 PM PDT 24 May 23 01:26:35 PM PDT 24 116532886 ps
T893 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.416954609 May 23 01:26:15 PM PDT 24 May 23 01:26:23 PM PDT 24 373266988 ps
T894 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.740442657 May 23 01:26:27 PM PDT 24 May 23 01:26:31 PM PDT 24 15960338 ps
T895 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.3442945484 May 23 01:26:46 PM PDT 24 May 23 01:26:49 PM PDT 24 84327228 ps
T896 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.2020367952 May 23 01:26:26 PM PDT 24 May 23 01:26:29 PM PDT 24 43896070 ps
T897 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.2908308725 May 23 01:26:21 PM PDT 24 May 23 01:26:24 PM PDT 24 68552691 ps
T116 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.209079493 May 23 01:26:22 PM PDT 24 May 23 01:26:26 PM PDT 24 99191579 ps
T898 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.4091172030 May 23 01:26:43 PM PDT 24 May 23 01:26:46 PM PDT 24 437694110 ps
T125 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.383119796 May 23 01:26:26 PM PDT 24 May 23 01:26:33 PM PDT 24 238393480 ps
T123 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.3668910989 May 23 01:26:16 PM PDT 24 May 23 01:26:21 PM PDT 24 168483072 ps
T899 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.721714107 May 23 01:26:26 PM PDT 24 May 23 01:26:30 PM PDT 24 157280955 ps
T900 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.1572548934 May 23 01:26:11 PM PDT 24 May 23 01:26:14 PM PDT 24 289875967 ps
T901 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.1845636371 May 23 01:26:15 PM PDT 24 May 23 01:26:19 PM PDT 24 171771650 ps
T902 /workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.489296006 May 23 01:26:36 PM PDT 24 May 23 01:26:40 PM PDT 24 39584855 ps
T120 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.1215003813 May 23 01:26:19 PM PDT 24 May 23 01:26:24 PM PDT 24 92389660 ps
T903 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.2072384700 May 23 01:26:00 PM PDT 24 May 23 01:26:03 PM PDT 24 171292757 ps
T904 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.3546434723 May 23 01:26:10 PM PDT 24 May 23 01:26:21 PM PDT 24 1204020133 ps
T905 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.372648144 May 23 01:26:13 PM PDT 24 May 23 01:26:15 PM PDT 24 63814425 ps
T906 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.3606438804 May 23 01:26:28 PM PDT 24 May 23 01:26:32 PM PDT 24 11466845 ps
T907 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.1941775391 May 23 01:26:47 PM PDT 24 May 23 01:26:51 PM PDT 24 41953274 ps
T908 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.2409080779 May 23 01:26:46 PM PDT 24 May 23 01:26:49 PM PDT 24 40094492 ps
T909 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.54982197 May 23 01:26:12 PM PDT 24 May 23 01:26:14 PM PDT 24 57265785 ps
T191 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.1380651290 May 23 01:26:16 PM PDT 24 May 23 01:26:19 PM PDT 24 137522678 ps
T910 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.970139325 May 23 01:26:26 PM PDT 24 May 23 01:26:29 PM PDT 24 96092016 ps
T911 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.3236289346 May 23 01:26:20 PM PDT 24 May 23 01:26:35 PM PDT 24 1896562373 ps
T912 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.2934254634 May 23 01:26:11 PM PDT 24 May 23 01:26:14 PM PDT 24 27225787 ps
T913 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.1237152013 May 23 01:26:30 PM PDT 24 May 23 01:26:35 PM PDT 24 135482110 ps
T124 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.643388996 May 23 01:26:27 PM PDT 24 May 23 01:26:31 PM PDT 24 372070918 ps
T914 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.2646710779 May 23 01:26:19 PM PDT 24 May 23 01:26:23 PM PDT 24 256302515 ps
T915 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.4023765019 May 23 01:26:19 PM PDT 24 May 23 01:26:22 PM PDT 24 87107500 ps
T916 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.1052383610 May 23 01:26:15 PM PDT 24 May 23 01:26:20 PM PDT 24 1507418189 ps
T917 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1376029709 May 23 01:26:27 PM PDT 24 May 23 01:26:35 PM PDT 24 644541727 ps
T918 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4127640713 May 23 01:26:28 PM PDT 24 May 23 01:26:33 PM PDT 24 308013641 ps
T919 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.2546000413 May 23 01:26:15 PM PDT 24 May 23 01:26:20 PM PDT 24 461260613 ps
T920 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.943691345 May 23 01:26:16 PM PDT 24 May 23 01:26:24 PM PDT 24 322496797 ps
T921 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.1263545057 May 23 01:26:19 PM PDT 24 May 23 01:26:22 PM PDT 24 45556304 ps
T922 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.4005638281 May 23 01:26:18 PM PDT 24 May 23 01:26:21 PM PDT 24 107645359 ps
T923 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.512268413 May 23 01:26:14 PM PDT 24 May 23 01:26:18 PM PDT 24 152976426 ps
T924 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.2433111050 May 23 01:26:29 PM PDT 24 May 23 01:26:34 PM PDT 24 70828466 ps
T925 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.1101447603 May 23 01:26:46 PM PDT 24 May 23 01:26:49 PM PDT 24 45731014 ps
T926 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.3731115057 May 23 01:26:03 PM PDT 24 May 23 01:26:06 PM PDT 24 53849051 ps
T927 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1437683098 May 23 01:26:16 PM PDT 24 May 23 01:26:21 PM PDT 24 105905889 ps
T928 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.3867484626 May 23 01:26:14 PM PDT 24 May 23 01:26:26 PM PDT 24 9935930517 ps
T929 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.64133428 May 23 01:26:26 PM PDT 24 May 23 01:26:30 PM PDT 24 88687159 ps
T930 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.1398536924 May 23 01:26:17 PM PDT 24 May 23 01:26:20 PM PDT 24 20572646 ps
T192 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.4034450846 May 23 01:26:10 PM PDT 24 May 23 01:26:13 PM PDT 24 13517764 ps
T931 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.1142956010 May 23 01:26:27 PM PDT 24 May 23 01:26:31 PM PDT 24 120148186 ps
T932 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.1412234448 May 23 01:26:18 PM PDT 24 May 23 01:26:21 PM PDT 24 162490986 ps
T933 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.402938251 May 23 01:26:26 PM PDT 24 May 23 01:26:29 PM PDT 24 90446714 ps
T198 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.8119787 May 23 01:26:13 PM PDT 24 May 23 01:26:15 PM PDT 24 95775030 ps
T934 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.3769797467 May 23 01:26:24 PM PDT 24 May 23 01:26:32 PM PDT 24 574460028 ps
T935 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.2790929174 May 23 01:26:45 PM PDT 24 May 23 01:26:47 PM PDT 24 57790752 ps
T936 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.322474588 May 23 01:26:13 PM PDT 24 May 23 01:26:15 PM PDT 24 18291435 ps
T193 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.3659471020 May 23 01:26:14 PM PDT 24 May 23 01:26:16 PM PDT 24 29639680 ps
T937 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.3906329751 May 23 01:26:48 PM PDT 24 May 23 01:26:52 PM PDT 24 28211116 ps
T938 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.2991452086 May 23 01:26:32 PM PDT 24 May 23 01:26:35 PM PDT 24 12290326 ps
T939 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.1540533257 May 23 01:26:18 PM PDT 24 May 23 01:26:22 PM PDT 24 41365162 ps
T194 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.1945943475 May 23 01:26:46 PM PDT 24 May 23 01:26:49 PM PDT 24 30500576 ps
T940 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.2658174427 May 23 01:26:11 PM PDT 24 May 23 01:26:13 PM PDT 24 47450137 ps
T941 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.1813947931 May 23 01:26:39 PM PDT 24 May 23 01:26:41 PM PDT 24 26555493 ps
T942 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.2009871054 May 23 01:26:09 PM PDT 24 May 23 01:26:21 PM PDT 24 944100571 ps
T943 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.4057543784 May 23 01:26:20 PM PDT 24 May 23 01:26:25 PM PDT 24 97191427 ps
T944 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.2608273193 May 23 01:26:43 PM PDT 24 May 23 01:26:47 PM PDT 24 75326463 ps
T945 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.3394875567 May 23 01:26:39 PM PDT 24 May 23 01:26:44 PM PDT 24 239621516 ps
T946 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.227873026 May 23 01:26:14 PM PDT 24 May 23 01:26:19 PM PDT 24 154744843 ps
T947 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.2244158577 May 23 01:26:38 PM PDT 24 May 23 01:26:41 PM PDT 24 31969066 ps
T948 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.3935951107 May 23 01:26:15 PM PDT 24 May 23 01:26:22 PM PDT 24 478702034 ps
T195 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.3608286608 May 23 01:26:18 PM PDT 24 May 23 01:26:20 PM PDT 24 18599633 ps
T949 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.652059817 May 23 01:26:45 PM PDT 24 May 23 01:26:50 PM PDT 24 187202076 ps
T950 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.469882041 May 23 01:26:19 PM PDT 24 May 23 01:26:23 PM PDT 24 138105017 ps
T951 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.2466949837 May 23 01:26:28 PM PDT 24 May 23 01:26:32 PM PDT 24 22232671 ps
T952 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.2831821216 May 23 01:26:47 PM PDT 24 May 23 01:26:51 PM PDT 24 316796928 ps
T953 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.327886610 May 23 01:26:45 PM PDT 24 May 23 01:26:47 PM PDT 24 18513083 ps
T954 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.285189578 May 23 01:26:18 PM PDT 24 May 23 01:26:22 PM PDT 24 78302022 ps
T955 /workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.1609182243 May 23 01:26:19 PM PDT 24 May 23 01:26:23 PM PDT 24 21318898 ps
T956 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.3841780782 May 23 01:26:46 PM PDT 24 May 23 01:26:49 PM PDT 24 15960270 ps
T957 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.314672997 May 23 01:26:43 PM PDT 24 May 23 01:26:46 PM PDT 24 1029394347 ps
T958 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.2124657040 May 23 01:26:45 PM PDT 24 May 23 01:26:49 PM PDT 24 327679965 ps
T959 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.3662959581 May 23 01:26:26 PM PDT 24 May 23 01:26:33 PM PDT 24 990349641 ps
T960 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.363608581 May 23 01:26:48 PM PDT 24 May 23 01:26:50 PM PDT 24 26242513 ps
T114 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.864603943 May 23 01:26:33 PM PDT 24 May 23 01:26:37 PM PDT 24 56512388 ps
T961 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.3556765366 May 23 01:26:17 PM PDT 24 May 23 01:26:21 PM PDT 24 583683770 ps
T962 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.3037454133 May 23 01:26:26 PM PDT 24 May 23 01:26:30 PM PDT 24 82160293 ps
T963 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.3273930606 May 23 01:26:19 PM PDT 24 May 23 01:26:22 PM PDT 24 24413295 ps
T964 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2287008657 May 23 01:26:15 PM PDT 24 May 23 01:26:18 PM PDT 24 57953506 ps
T965 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.1917305944 May 23 01:26:44 PM PDT 24 May 23 01:26:46 PM PDT 24 58579270 ps
T966 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.3389627320 May 23 01:26:15 PM PDT 24 May 23 01:26:29 PM PDT 24 501548794 ps
T967 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.4125571368 May 23 01:26:29 PM PDT 24 May 23 01:26:34 PM PDT 24 58334266 ps
T196 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.2756606863 May 23 01:26:16 PM PDT 24 May 23 01:26:19 PM PDT 24 17402152 ps
T115 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.3271646835 May 23 01:26:17 PM PDT 24 May 23 01:26:21 PM PDT 24 67872062 ps
T968 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.3268595721 May 23 01:26:46 PM PDT 24 May 23 01:26:50 PM PDT 24 174264540 ps
T969 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.2992192078 May 23 01:26:33 PM PDT 24 May 23 01:26:37 PM PDT 24 48083448 ps
T970 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.1651429285 May 23 01:26:27 PM PDT 24 May 23 01:26:40 PM PDT 24 1779093379 ps
T971 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4130402608 May 23 01:26:16 PM PDT 24 May 23 01:26:22 PM PDT 24 406321098 ps
T972 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.1250950184 May 23 01:26:15 PM PDT 24 May 23 01:26:23 PM PDT 24 2594023607 ps
T197 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.3924268427 May 23 01:26:33 PM PDT 24 May 23 01:26:36 PM PDT 24 48170868 ps
T973 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.3940638136 May 23 01:26:24 PM PDT 24 May 23 01:26:28 PM PDT 24 64836094 ps
T974 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2033152787 May 23 01:26:26 PM PDT 24 May 23 01:26:36 PM PDT 24 1368086762 ps
T975 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.4044104696 May 23 01:26:29 PM PDT 24 May 23 01:26:33 PM PDT 24 14954589 ps
T976 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.888608385 May 23 01:26:19 PM PDT 24 May 23 01:26:22 PM PDT 24 55277716 ps
T977 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.3253328619 May 23 01:26:03 PM PDT 24 May 23 01:26:06 PM PDT 24 115570995 ps
T978 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.588870874 May 23 01:26:30 PM PDT 24 May 23 01:26:33 PM PDT 24 53997908 ps
T979 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.1643951672 May 23 01:26:25 PM PDT 24 May 23 01:26:29 PM PDT 24 186704820 ps
T980 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.1368103786 May 23 01:26:20 PM PDT 24 May 23 01:26:25 PM PDT 24 136506890 ps
T981 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.1393727603 May 23 01:26:38 PM PDT 24 May 23 01:26:53 PM PDT 24 612710382 ps
T982 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.3157275664 May 23 01:26:43 PM PDT 24 May 23 01:26:45 PM PDT 24 197140351 ps
T983 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.2656354021 May 23 01:26:18 PM PDT 24 May 23 01:26:25 PM PDT 24 411336520 ps
T984 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.290789112 May 23 01:26:26 PM PDT 24 May 23 01:26:32 PM PDT 24 258866954 ps
T985 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.3422448500 May 23 01:26:13 PM PDT 24 May 23 01:26:54 PM PDT 24 15776753021 ps
T117 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.698289617 May 23 01:26:49 PM PDT 24 May 23 01:26:55 PM PDT 24 124614607 ps
T986 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.571813192 May 23 01:26:11 PM PDT 24 May 23 01:26:14 PM PDT 24 319776319 ps
T987 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.4225470989 May 23 01:26:20 PM PDT 24 May 23 01:26:24 PM PDT 24 19683663 ps
T988 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.668242156 May 23 01:26:39 PM PDT 24 May 23 01:26:42 PM PDT 24 150416342 ps
T989 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.1135347759 May 23 01:26:30 PM PDT 24 May 23 01:26:35 PM PDT 24 31043048 ps
T990 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.852922332 May 23 01:26:18 PM PDT 24 May 23 01:26:22 PM PDT 24 217972873 ps
T991 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.1106374685 May 23 01:26:19 PM PDT 24 May 23 01:26:33 PM PDT 24 5244369905 ps
T992 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.3034985987 May 23 01:26:27 PM PDT 24 May 23 01:26:30 PM PDT 24 40584916 ps
T993 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.3181713512 May 23 01:26:44 PM PDT 24 May 23 01:26:47 PM PDT 24 74136526 ps
T994 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.3534063053 May 23 01:26:46 PM PDT 24 May 23 01:26:51 PM PDT 24 97225675 ps
T995 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.829442441 May 23 01:26:43 PM PDT 24 May 23 01:26:46 PM PDT 24 90204470 ps
T996 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.827461803 May 23 01:26:10 PM PDT 24 May 23 01:26:14 PM PDT 24 675061908 ps
T997 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.6703441 May 23 01:26:20 PM PDT 24 May 23 01:26:24 PM PDT 24 86009466 ps
T998 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.903417074 May 23 01:26:14 PM PDT 24 May 23 01:26:16 PM PDT 24 59858033 ps
T999 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.3604649181 May 23 01:26:36 PM PDT 24 May 23 01:26:38 PM PDT 24 133966704 ps
T1000 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.2401533374 May 23 01:26:21 PM PDT 24 May 23 01:26:24 PM PDT 24 26236603 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%