Group : lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
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Group : lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
99.30 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_lc_ctrl_env_0.1/lc_ctrl_env_cov.sv


Summary for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 58 1 57 98.28
Crosses 84 0 84 100.00


Variables for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
clk_byp_error_rsp_cp 2 0 2 100.00 100 1 1 2
clk_byp_rsp_mubi_err_cp 2 0 2 100.00 100 1 1 2
count_backdoor_err_cp 2 0 2 100.00 100 1 1 2
count_err_cp 2 0 2 100.00 100 1 1 2
count_illegal_err_cp 2 0 2 100.00 100 1 1 2
err_inj_cp 2 0 2 100.00 100 1 1 0
flash_rma_error_rsp_cp 2 0 2 100.00 100 1 1 2
flash_rma_rsp_mubi_err_cp 2 0 2 100.00 100 1 1 2
jtag_csr_cp 2 0 2 100.00 100 1 1 2
kmac_fsm_backdoor_err_cp 2 0 2 100.00 100 1 1 2
lc_fsm_backdoor_err_cp 2 0 2 100.00 100 1 1 2
otp_lc_data_i_valid_err_cp 2 0 2 100.00 100 1 1 2
otp_partition_err_cp 2 0 2 100.00 100 1 1 2
otp_prog_err_cp 2 0 2 100.00 100 1 1 2
otp_rma_token_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
otp_secrets_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
otp_test_tokens_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
post_trans_err_cp 2 0 2 100.00 100 1 1 2
security_escalation_err_cp 2 0 2 100.00 100 1 1 2
state_backdoor_err_cp 2 0 2 100.00 100 1 1 2
state_err_cp 2 0 2 100.00 100 1 1 2
state_illegal_err_cp 2 0 2 100.00 100 1 1 2
token_invalid_err_cp 2 0 2 100.00 100 1 1 2
token_mismatch_err_cp 2 0 2 100.00 100 1 1 2
token_mux_ctrl_redun_err_cp 2 0 2 100.00 100 1 1 2
token_mux_digest_err_cp 2 1 1 50.00 100 1 1 2
token_response_err_cp 2 0 2 100.00 100 1 1 2
transition_count_err_cp 2 0 2 100.00 100 1 1 2
transition_err_cp 2 0 2 100.00 100 1 1 2


Crosses for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
post_trans_err_inj_xp 4 0 4 100.00 100 1 1 0
post_trans_state_err_xp 4 0 4 100.00 100 1 1 0
post_trans_lc_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
post_trans_state_illegal_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_illegal_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_clk_byp_error_rsp_xp 4 0 4 100.00 100 1 1 0
jtag_flash_rma_error_rsp_xp 4 0 4 100.00 100 1 1 0
jtag_otp_prog_err_xp 4 0 4 100.00 100 1 1 0
jtag_otp_partition_err_xp 4 0 4 100.00 100 1 1 0
jtag_token_mismatch_err_xp 4 0 4 100.00 100 1 1 0
jtag_state_err_xp 4 0 4 100.00 100 1 1 0
jtag_state_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_lc_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_kmac_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_count_err_xp 4 0 4 100.00 100 1 1 0
jtag_count_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_transition_err_xp 4 0 4 100.00 100 1 1 0
jtag_transition_count_err_xp 4 0 4 100.00 100 1 1 0
jtag_post_trans_err_xp 4 0 4 100.00 100 1 1 0


Summary for Variable clk_byp_error_rsp_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for clk_byp_error_rsp_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48915 1 T1 81 T2 54 T3 77
auto[1] 1675 1 T4 11 T16 7 T17 8


Summary for Variable clk_byp_rsp_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for clk_byp_rsp_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 49841 1 T1 81 T2 54 T3 59
auto[1] 749 1 T3 18 T19 12 T47 24


Summary for Variable count_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 49047 1 T1 81 T2 54 T3 77
auto[1] 1543 1 T5 4 T14 3 T42 10


Summary for Variable count_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48871 1 T1 81 T2 54 T3 77
auto[1] 1719 1 T5 7 T14 6 T42 16


Summary for Variable count_illegal_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_illegal_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48942 1 T1 81 T2 54 T3 77
auto[1] 1648 1 T5 9 T14 9 T42 9


Summary for Variable err_inj_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for err_inj_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
err_inj 45994 1 T1 81 T2 54 T3 77
no_err_inj 4596 1 T6 5 T16 17 T61 8


Summary for Variable flash_rma_error_rsp_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for flash_rma_error_rsp_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48797 1 T1 81 T2 54 T3 77
auto[1] 1793 1 T4 10 T16 10 T17 17


Summary for Variable flash_rma_rsp_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for flash_rma_rsp_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 49896 1 T1 81 T2 54 T3 67
auto[1] 694 1 T3 10 T19 10 T47 15


Summary for Variable jtag_csr_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for jtag_csr_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 35751 1 T1 81 T2 54 T3 77
auto[1] 14839 1 T4 70 T5 72 T6 5


Summary for Variable kmac_fsm_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for kmac_fsm_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48920 1 T1 81 T2 54 T3 77
auto[1] 1670 1 T5 10 T14 7 T42 8


Summary for Variable lc_fsm_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for lc_fsm_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48922 1 T1 81 T2 54 T3 77
auto[1] 1668 1 T5 6 T14 5 T42 9


Summary for Variable otp_lc_data_i_valid_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_lc_data_i_valid_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48870 1 T1 81 T2 54 T3 77
auto[1] 1720 1 T5 10 T14 6 T42 16


Summary for Variable otp_partition_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_partition_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48914 1 T1 81 T2 54 T3 77
auto[1] 1676 1 T4 6 T16 5 T17 7


Summary for Variable otp_prog_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_prog_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48352 1 T1 81 T2 54 T3 77
auto[1] 2238 1 T12 10 T64 2 T65 12


Summary for Variable otp_rma_token_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_rma_token_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 49831 1 T1 81 T2 54 T3 62
auto[1] 759 1 T3 15 T19 10 T47 16


Summary for Variable otp_secrets_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_secrets_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 49887 1 T1 81 T2 54 T3 61
auto[1] 703 1 T3 16 T19 5 T47 17


Summary for Variable otp_test_tokens_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_test_tokens_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 49860 1 T1 81 T2 54 T3 59
auto[1] 730 1 T3 18 T19 13 T47 21


Summary for Variable post_trans_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for post_trans_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48023 1 T1 81 T2 54 T3 77
auto[1] 2567 1 T17 23 T31 14 T214 15


Summary for Variable security_escalation_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for security_escalation_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 46799 1 T2 54 T3 77 T4 70
auto[1] 3791 1 T1 81 T13 93 T54 52


Summary for Variable state_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 49015 1 T1 81 T2 54 T3 77
auto[1] 1575 1 T5 12 T14 5 T42 6


Summary for Variable state_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48907 1 T1 81 T2 54 T3 77
auto[1] 1683 1 T5 6 T14 10 T42 12


Summary for Variable state_illegal_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_illegal_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48901 1 T1 81 T2 54 T3 77
auto[1] 1689 1 T5 8 T14 13 T42 9


Summary for Variable token_invalid_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_invalid_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48906 1 T1 81 T2 54 T3 77
auto[1] 1684 1 T4 7 T16 3 T17 7


Summary for Variable token_mismatch_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_mismatch_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 45039 1 T1 81 T3 77 T4 62
auto[1] 5551 1 T2 54 T4 8 T15 72


Summary for Variable token_mux_ctrl_redun_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_mux_ctrl_redun_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 46803 1 T1 81 T2 54 T3 77
auto[1] 3787 1 T40 59 T53 93 T27 51


Summary for Variable token_mux_digest_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for token_mux_digest_err_cp

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 50590 1 T1 81 T2 54 T3 77


Summary for Variable token_response_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_response_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48869 1 T1 81 T2 54 T3 77
auto[1] 1721 1 T4 7 T16 5 T17 7


Summary for Variable transition_count_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for transition_count_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48818 1 T1 81 T2 54 T3 77
auto[1] 1772 1 T4 13 T16 10 T17 15


Summary for Variable transition_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for transition_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 48834 1 T1 81 T2 54 T3 77
auto[1] 1756 1 T4 8 T16 10 T17 10


Summary for Cross post_trans_err_inj_xp

Samples crossed: post_trans_err_cp err_inj_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_err_inj_xp

Bins
post_trans_err_cperr_inj_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] err_inj 44726 1 T1 81 T2 54 T3 77
auto[0] no_err_inj 3297 1 T6 5 T16 17 T61 8
auto[1] err_inj 1268 1 T17 13 T31 11 T214 6
auto[1] no_err_inj 1299 1 T17 10 T31 3 T214 9


Summary for Cross post_trans_state_err_xp

Samples crossed: post_trans_err_cp state_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_state_err_xp

Bins
post_trans_err_cpstate_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 46470 1 T1 81 T2 54 T3 77
auto[0] auto[1] 1553 1 T5 6 T14 10 T42 12
auto[1] auto[0] 2437 1 T17 23 T31 12 T214 14
auto[1] auto[1] 130 1 T31 2 T214 1 T94 3


Summary for Cross post_trans_lc_fsm_backdoor_err_xp

Samples crossed: post_trans_err_cp lc_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_lc_fsm_backdoor_err_xp

Bins
post_trans_err_cplc_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 46484 1 T1 81 T2 54 T3 77
auto[0] auto[1] 1539 1 T5 6 T14 5 T42 9
auto[1] auto[0] 2438 1 T17 23 T31 14 T214 14
auto[1] auto[1] 129 1 T214 1 T94 2 T159 1


Summary for Cross post_trans_state_illegal_err_xp

Samples crossed: post_trans_err_cp state_illegal_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_state_illegal_err_xp

Bins
post_trans_err_cpstate_illegal_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 46499 1 T1 81 T2 54 T3 77
auto[0] auto[1] 1524 1 T5 8 T14 13 T42 9
auto[1] auto[0] 2402 1 T17 23 T31 12 T214 14
auto[1] auto[1] 165 1 T31 2 T214 1 T94 3


Summary for Cross post_trans_count_err_xp

Samples crossed: post_trans_err_cp count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_err_xp

Bins
post_trans_err_cpcount_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 46446 1 T1 81 T2 54 T3 77
auto[0] auto[1] 1577 1 T5 7 T14 6 T42 16
auto[1] auto[0] 2425 1 T17 21 T31 12 T214 15
auto[1] auto[1] 142 1 T17 2 T31 2 T94 3


Summary for Cross post_trans_count_illegal_err_xp

Samples crossed: post_trans_err_cp count_illegal_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_illegal_err_xp

Bins
post_trans_err_cpcount_illegal_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 46527 1 T1 81 T2 54 T3 77
auto[0] auto[1] 1496 1 T5 9 T14 9 T42 9
auto[1] auto[0] 2415 1 T17 22 T31 13 T214 14
auto[1] auto[1] 152 1 T17 1 T31 1 T214 1


Summary for Cross post_trans_count_backdoor_err_xp

Samples crossed: post_trans_err_cp count_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_backdoor_err_xp

Bins
post_trans_err_cpcount_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 46614 1 T1 81 T2 54 T3 77
auto[0] auto[1] 1409 1 T5 4 T14 3 T42 10
auto[1] auto[0] 2433 1 T17 19 T31 14 T214 15
auto[1] auto[1] 134 1 T17 4 T94 6 T215 1


Summary for Cross jtag_clk_byp_error_rsp_xp

Samples crossed: jtag_csr_cp clk_byp_error_rsp_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_clk_byp_error_rsp_xp

Bins
jtag_csr_cpclk_byp_error_rsp_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34769 1 T1 81 T2 54 T3 77
auto[0] auto[1] 982 1 T216 5 T94 22 T156 6
auto[1] auto[0] 14146 1 T4 59 T5 72 T6 5
auto[1] auto[1] 693 1 T4 11 T16 7 T17 8


Summary for Cross jtag_flash_rma_error_rsp_xp

Samples crossed: jtag_csr_cp flash_rma_error_rsp_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_flash_rma_error_rsp_xp

Bins
jtag_csr_cpflash_rma_error_rsp_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34777 1 T1 81 T2 54 T3 77
auto[0] auto[1] 974 1 T216 7 T94 19 T156 8
auto[1] auto[0] 14020 1 T4 60 T5 72 T6 5
auto[1] auto[1] 819 1 T4 10 T16 10 T17 17


Summary for Cross jtag_otp_prog_err_xp

Samples crossed: jtag_csr_cp otp_prog_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_otp_prog_err_xp

Bins
jtag_csr_cpotp_prog_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34458 1 T1 81 T2 54 T3 77
auto[0] auto[1] 1293 1 T12 10 T64 2 T65 12
auto[1] auto[0] 13894 1 T4 70 T5 72 T6 5
auto[1] auto[1] 945 1 T17 8 T31 2 T62 6


Summary for Cross jtag_otp_partition_err_xp

Samples crossed: jtag_csr_cp otp_partition_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_otp_partition_err_xp

Bins
jtag_csr_cpotp_partition_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34770 1 T1 81 T2 54 T3 77
auto[0] auto[1] 981 1 T216 10 T94 11 T156 8
auto[1] auto[0] 14144 1 T4 64 T5 72 T6 5
auto[1] auto[1] 695 1 T4 6 T16 5 T17 7


Summary for Cross jtag_token_mismatch_err_xp

Samples crossed: jtag_csr_cp token_mismatch_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_token_mismatch_err_xp

Bins
jtag_csr_cptoken_mismatch_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 31015 1 T1 81 T3 77 T12 10
auto[0] auto[1] 4736 1 T2 54 T15 72 T41 98
auto[1] auto[0] 14024 1 T4 62 T5 72 T6 5
auto[1] auto[1] 815 1 T4 8 T16 10 T17 13


Summary for Cross jtag_state_err_xp

Samples crossed: jtag_csr_cp state_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_state_err_xp

Bins
jtag_csr_cpstate_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34723 1 T1 81 T2 54 T3 77
auto[0] auto[1] 1028 1 T14 10 T42 12 T17 12
auto[1] auto[0] 14184 1 T4 70 T5 66 T6 5
auto[1] auto[1] 655 1 T5 6 T18 7 T31 2


Summary for Cross jtag_state_backdoor_err_xp

Samples crossed: jtag_csr_cp state_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_state_backdoor_err_xp

Bins
jtag_csr_cpstate_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34824 1 T1 81 T2 54 T3 77
auto[0] auto[1] 927 1 T14 5 T42 6 T17 17
auto[1] auto[0] 14191 1 T4 70 T5 60 T6 5
auto[1] auto[1] 648 1 T5 12 T18 4 T94 2


Summary for Cross jtag_lc_fsm_backdoor_err_xp

Samples crossed: jtag_csr_cp lc_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_lc_fsm_backdoor_err_xp

Bins
jtag_csr_cplc_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34722 1 T1 81 T2 54 T3 77
auto[0] auto[1] 1029 1 T14 5 T42 9 T17 21
auto[1] auto[0] 14200 1 T4 70 T5 66 T6 5
auto[1] auto[1] 639 1 T5 6 T18 14 T94 1


Summary for Cross jtag_kmac_fsm_backdoor_err_xp

Samples crossed: jtag_csr_cp kmac_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_kmac_fsm_backdoor_err_xp

Bins
jtag_csr_cpkmac_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34770 1 T1 81 T2 54 T3 77
auto[0] auto[1] 981 1 T14 7 T42 8 T17 13
auto[1] auto[0] 14150 1 T4 70 T5 62 T6 5
auto[1] auto[1] 689 1 T5 10 T18 8 T31 2


Summary for Cross jtag_count_err_xp

Samples crossed: jtag_csr_cp count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_count_err_xp

Bins
jtag_csr_cpcount_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34686 1 T1 81 T2 54 T3 77
auto[0] auto[1] 1065 1 T14 6 T42 16 T17 16
auto[1] auto[0] 14185 1 T4 70 T5 65 T6 5
auto[1] auto[1] 654 1 T5 7 T17 2 T18 4


Summary for Cross jtag_count_backdoor_err_xp

Samples crossed: jtag_csr_cp count_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_count_backdoor_err_xp

Bins
jtag_csr_cpcount_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34824 1 T1 81 T2 54 T3 77
auto[0] auto[1] 927 1 T14 3 T42 10 T17 15
auto[1] auto[0] 14223 1 T4 70 T5 68 T6 5
auto[1] auto[1] 616 1 T5 4 T17 3 T18 7


Summary for Cross jtag_transition_err_xp

Samples crossed: jtag_csr_cp transition_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_transition_err_xp

Bins
jtag_csr_cptransition_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34779 1 T1 81 T2 54 T3 77
auto[0] auto[1] 972 1 T216 10 T62 2 T94 19
auto[1] auto[0] 14055 1 T4 62 T5 72 T6 5
auto[1] auto[1] 784 1 T4 8 T16 10 T17 10


Summary for Cross jtag_transition_count_err_xp

Samples crossed: jtag_csr_cp transition_count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_transition_count_err_xp

Bins
jtag_csr_cptransition_count_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34778 1 T1 81 T2 54 T3 77
auto[0] auto[1] 973 1 T216 5 T94 27 T156 12
auto[1] auto[0] 14040 1 T4 57 T5 72 T6 5
auto[1] auto[1] 799 1 T4 13 T16 10 T17 15


Summary for Cross jtag_post_trans_err_xp

Samples crossed: jtag_csr_cp post_trans_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_post_trans_err_xp

Bins
jtag_csr_cppost_trans_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34308 1 T1 81 T2 54 T3 77
auto[0] auto[1] 1443 1 T17 11 T214 15 T94 25
auto[1] auto[0] 13715 1 T4 70 T5 72 T6 5
auto[1] auto[1] 1124 1 T17 12 T31 14 T94 28

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