| T817 |
/workspace/coverage/default/0.lc_ctrl_volatile_unlock_smoke.2439592334 |
|
|
Jul 27 04:55:46 PM PDT 24 |
Jul 27 04:55:47 PM PDT 24 |
13048320 ps |
| T818 |
/workspace/coverage/default/22.lc_ctrl_stress_all.1700807843 |
|
|
Jul 27 04:56:49 PM PDT 24 |
Jul 27 04:59:05 PM PDT 24 |
5712718137 ps |
| T819 |
/workspace/coverage/default/29.lc_ctrl_prog_failure.1819725549 |
|
|
Jul 27 04:57:21 PM PDT 24 |
Jul 27 04:57:24 PM PDT 24 |
246646347 ps |
| T820 |
/workspace/coverage/default/8.lc_ctrl_jtag_prog_failure.3207175943 |
|
|
Jul 27 04:56:21 PM PDT 24 |
Jul 27 04:56:35 PM PDT 24 |
1755527390 ps |
| T821 |
/workspace/coverage/default/49.lc_ctrl_stress_all.721241691 |
|
|
Jul 27 04:57:51 PM PDT 24 |
Jul 27 05:00:14 PM PDT 24 |
2765324135 ps |
| T822 |
/workspace/coverage/default/37.lc_ctrl_volatile_unlock_smoke.1981066975 |
|
|
Jul 27 04:57:14 PM PDT 24 |
Jul 27 04:57:15 PM PDT 24 |
14703631 ps |
| T823 |
/workspace/coverage/default/4.lc_ctrl_jtag_state_post_trans.1912685877 |
|
|
Jul 27 04:56:22 PM PDT 24 |
Jul 27 04:56:33 PM PDT 24 |
553656718 ps |
| T824 |
/workspace/coverage/default/48.lc_ctrl_security_escalation.1224326420 |
|
|
Jul 27 04:57:47 PM PDT 24 |
Jul 27 04:57:53 PM PDT 24 |
191744153 ps |
| T825 |
/workspace/coverage/default/1.lc_ctrl_sec_mubi.2683870993 |
|
|
Jul 27 04:55:57 PM PDT 24 |
Jul 27 04:56:09 PM PDT 24 |
1713352761 ps |
| T826 |
/workspace/coverage/default/29.lc_ctrl_alert_test.3408644040 |
|
|
Jul 27 04:56:58 PM PDT 24 |
Jul 27 04:57:00 PM PDT 24 |
114744330 ps |
| T827 |
/workspace/coverage/default/21.lc_ctrl_sec_mubi.2067474481 |
|
|
Jul 27 04:56:43 PM PDT 24 |
Jul 27 04:57:04 PM PDT 24 |
756861346 ps |
| T828 |
/workspace/coverage/default/26.lc_ctrl_sec_mubi.2584720540 |
|
|
Jul 27 04:57:06 PM PDT 24 |
Jul 27 04:57:17 PM PDT 24 |
1436280885 ps |
| T829 |
/workspace/coverage/default/48.lc_ctrl_errors.764339873 |
|
|
Jul 27 04:57:42 PM PDT 24 |
Jul 27 04:57:53 PM PDT 24 |
1107954932 ps |
| T830 |
/workspace/coverage/default/6.lc_ctrl_jtag_priority.579571191 |
|
|
Jul 27 04:56:03 PM PDT 24 |
Jul 27 04:56:08 PM PDT 24 |
588121291 ps |
| T831 |
/workspace/coverage/default/8.lc_ctrl_errors.3638038391 |
|
|
Jul 27 04:56:02 PM PDT 24 |
Jul 27 04:56:26 PM PDT 24 |
686438473 ps |
| T832 |
/workspace/coverage/default/3.lc_ctrl_state_post_trans.2072938497 |
|
|
Jul 27 04:56:00 PM PDT 24 |
Jul 27 04:56:07 PM PDT 24 |
254508400 ps |
| T833 |
/workspace/coverage/default/1.lc_ctrl_sec_token_mux.68695161 |
|
|
Jul 27 04:55:52 PM PDT 24 |
Jul 27 04:55:58 PM PDT 24 |
1688433109 ps |
| T834 |
/workspace/coverage/default/3.lc_ctrl_jtag_priority.1567955307 |
|
|
Jul 27 04:56:01 PM PDT 24 |
Jul 27 04:56:10 PM PDT 24 |
988751724 ps |
| T835 |
/workspace/coverage/default/1.lc_ctrl_jtag_priority.1718888499 |
|
|
Jul 27 04:56:02 PM PDT 24 |
Jul 27 04:56:06 PM PDT 24 |
310235786 ps |
| T836 |
/workspace/coverage/default/46.lc_ctrl_sec_mubi.2955713779 |
|
|
Jul 27 04:58:07 PM PDT 24 |
Jul 27 04:58:17 PM PDT 24 |
186635603 ps |
| T837 |
/workspace/coverage/default/2.lc_ctrl_jtag_regwen_during_op.2962267858 |
|
|
Jul 27 04:56:03 PM PDT 24 |
Jul 27 04:56:27 PM PDT 24 |
1149699530 ps |
| T838 |
/workspace/coverage/default/16.lc_ctrl_security_escalation.3351209864 |
|
|
Jul 27 04:56:42 PM PDT 24 |
Jul 27 04:56:54 PM PDT 24 |
863303633 ps |
| T839 |
/workspace/coverage/default/26.lc_ctrl_volatile_unlock_smoke.1835860220 |
|
|
Jul 27 04:57:02 PM PDT 24 |
Jul 27 04:57:03 PM PDT 24 |
19183844 ps |
| T840 |
/workspace/coverage/default/14.lc_ctrl_prog_failure.543158321 |
|
|
Jul 27 04:56:51 PM PDT 24 |
Jul 27 04:56:54 PM PDT 24 |
254548950 ps |
| T841 |
/workspace/coverage/default/1.lc_ctrl_jtag_state_failure.2184387125 |
|
|
Jul 27 04:55:47 PM PDT 24 |
Jul 27 04:56:26 PM PDT 24 |
716765497 ps |
| T842 |
/workspace/coverage/default/19.lc_ctrl_jtag_smoke.2187290074 |
|
|
Jul 27 04:56:43 PM PDT 24 |
Jul 27 04:56:50 PM PDT 24 |
2219169845 ps |
| T843 |
/workspace/coverage/default/7.lc_ctrl_volatile_unlock_smoke.3617370411 |
|
|
Jul 27 04:56:13 PM PDT 24 |
Jul 27 04:56:13 PM PDT 24 |
21101857 ps |
| T844 |
/workspace/coverage/default/0.lc_ctrl_sec_token_mux.1118004263 |
|
|
Jul 27 04:55:38 PM PDT 24 |
Jul 27 04:55:49 PM PDT 24 |
4953330380 ps |
| T845 |
/workspace/coverage/default/4.lc_ctrl_jtag_state_failure.3659969551 |
|
|
Jul 27 04:56:02 PM PDT 24 |
Jul 27 04:56:58 PM PDT 24 |
1399922637 ps |
| T846 |
/workspace/coverage/default/12.lc_ctrl_jtag_errors.40898852 |
|
|
Jul 27 04:56:30 PM PDT 24 |
Jul 27 04:56:55 PM PDT 24 |
7737649954 ps |
| T847 |
/workspace/coverage/default/32.lc_ctrl_sec_token_digest.1619471924 |
|
|
Jul 27 04:57:30 PM PDT 24 |
Jul 27 04:57:44 PM PDT 24 |
3007012018 ps |
| T848 |
/workspace/coverage/default/15.lc_ctrl_sec_token_mux.2235724139 |
|
|
Jul 27 04:56:38 PM PDT 24 |
Jul 27 04:56:44 PM PDT 24 |
2056818098 ps |
| T849 |
/workspace/coverage/default/2.lc_ctrl_state_post_trans.3414949817 |
|
|
Jul 27 04:56:01 PM PDT 24 |
Jul 27 04:56:07 PM PDT 24 |
122991782 ps |
| T850 |
/workspace/coverage/default/3.lc_ctrl_sec_token_digest.4195415148 |
|
|
Jul 27 04:56:05 PM PDT 24 |
Jul 27 04:56:17 PM PDT 24 |
1896112942 ps |
| T83 |
/workspace/coverage/default/9.lc_ctrl_claim_transition_if.3015834302 |
|
|
Jul 27 04:56:13 PM PDT 24 |
Jul 27 04:56:14 PM PDT 24 |
26836426 ps |
| T851 |
/workspace/coverage/default/34.lc_ctrl_state_post_trans.1973333918 |
|
|
Jul 27 04:57:35 PM PDT 24 |
Jul 27 04:57:42 PM PDT 24 |
153574606 ps |
| T852 |
/workspace/coverage/default/16.lc_ctrl_volatile_unlock_smoke.343035620 |
|
|
Jul 27 04:56:52 PM PDT 24 |
Jul 27 04:56:53 PM PDT 24 |
48506532 ps |
| T853 |
/workspace/coverage/default/10.lc_ctrl_volatile_unlock_smoke.1065279116 |
|
|
Jul 27 04:56:12 PM PDT 24 |
Jul 27 04:56:13 PM PDT 24 |
28330690 ps |
| T854 |
/workspace/coverage/default/8.lc_ctrl_sec_mubi.1558001585 |
|
|
Jul 27 04:56:11 PM PDT 24 |
Jul 27 04:56:22 PM PDT 24 |
224135156 ps |
| T855 |
/workspace/coverage/default/45.lc_ctrl_volatile_unlock_smoke.1473859926 |
|
|
Jul 27 04:57:47 PM PDT 24 |
Jul 27 04:57:48 PM PDT 24 |
67256312 ps |
| T856 |
/workspace/coverage/default/46.lc_ctrl_sec_token_digest.1459029828 |
|
|
Jul 27 04:57:46 PM PDT 24 |
Jul 27 04:57:57 PM PDT 24 |
1020260065 ps |
| T857 |
/workspace/coverage/default/47.lc_ctrl_errors.904266929 |
|
|
Jul 27 04:57:51 PM PDT 24 |
Jul 27 04:58:00 PM PDT 24 |
1047606415 ps |
| T176 |
/workspace/coverage/default/10.lc_ctrl_stress_all_with_rand_reset.1970713729 |
|
|
Jul 27 04:56:16 PM PDT 24 |
Jul 27 05:28:18 PM PDT 24 |
36614704230 ps |
| T858 |
/workspace/coverage/default/25.lc_ctrl_prog_failure.1203356119 |
|
|
Jul 27 04:57:09 PM PDT 24 |
Jul 27 04:57:13 PM PDT 24 |
172268196 ps |
| T859 |
/workspace/coverage/default/47.lc_ctrl_state_post_trans.2220321533 |
|
|
Jul 27 04:57:50 PM PDT 24 |
Jul 27 04:57:58 PM PDT 24 |
272612193 ps |
| T860 |
/workspace/coverage/default/49.lc_ctrl_security_escalation.3940971064 |
|
|
Jul 27 04:57:57 PM PDT 24 |
Jul 27 04:58:10 PM PDT 24 |
368010461 ps |
| T861 |
/workspace/coverage/default/42.lc_ctrl_errors.541974543 |
|
|
Jul 27 04:57:32 PM PDT 24 |
Jul 27 04:57:42 PM PDT 24 |
294225489 ps |
| T862 |
/workspace/coverage/default/31.lc_ctrl_stress_all_with_rand_reset.1898566552 |
|
|
Jul 27 04:57:10 PM PDT 24 |
Jul 27 05:04:49 PM PDT 24 |
24968837206 ps |
| T863 |
/workspace/coverage/default/21.lc_ctrl_sec_token_mux.3320881934 |
|
|
Jul 27 04:56:55 PM PDT 24 |
Jul 27 04:57:05 PM PDT 24 |
915495356 ps |
| T864 |
/workspace/coverage/default/39.lc_ctrl_sec_mubi.340038152 |
|
|
Jul 27 04:57:23 PM PDT 24 |
Jul 27 04:57:38 PM PDT 24 |
299827068 ps |
| T865 |
/workspace/coverage/default/28.lc_ctrl_stress_all.3226157853 |
|
|
Jul 27 04:57:14 PM PDT 24 |
Jul 27 04:58:42 PM PDT 24 |
3755004159 ps |
| T866 |
/workspace/coverage/default/15.lc_ctrl_smoke.3118469026 |
|
|
Jul 27 04:56:38 PM PDT 24 |
Jul 27 04:56:40 PM PDT 24 |
60380017 ps |
| T867 |
/workspace/coverage/default/40.lc_ctrl_sec_mubi.539808602 |
|
|
Jul 27 04:57:34 PM PDT 24 |
Jul 27 04:57:46 PM PDT 24 |
2356690480 ps |
| T868 |
/workspace/coverage/default/43.lc_ctrl_jtag_access.1696095920 |
|
|
Jul 27 04:57:52 PM PDT 24 |
Jul 27 04:58:00 PM PDT 24 |
3287667634 ps |
| T869 |
/workspace/coverage/default/9.lc_ctrl_sec_mubi.1762524278 |
|
|
Jul 27 04:56:30 PM PDT 24 |
Jul 27 04:56:40 PM PDT 24 |
818710863 ps |
| T870 |
/workspace/coverage/default/0.lc_ctrl_regwen_during_op.688003659 |
|
|
Jul 27 04:55:47 PM PDT 24 |
Jul 27 04:55:52 PM PDT 24 |
806735394 ps |
| T59 |
/workspace/coverage/default/39.lc_ctrl_stress_all.1735720931 |
|
|
Jul 27 04:57:29 PM PDT 24 |
Jul 27 04:59:03 PM PDT 24 |
32448643806 ps |
| T871 |
/workspace/coverage/default/14.lc_ctrl_jtag_state_failure.3891574869 |
|
|
Jul 27 04:56:44 PM PDT 24 |
Jul 27 04:58:55 PM PDT 24 |
18798393930 ps |
| T872 |
/workspace/coverage/default/10.lc_ctrl_jtag_smoke.3571912954 |
|
|
Jul 27 04:56:12 PM PDT 24 |
Jul 27 04:56:17 PM PDT 24 |
562312794 ps |
| T873 |
/workspace/coverage/default/8.lc_ctrl_sec_token_mux.3236777274 |
|
|
Jul 27 04:56:26 PM PDT 24 |
Jul 27 04:56:41 PM PDT 24 |
5570979459 ps |
| T874 |
/workspace/coverage/default/8.lc_ctrl_alert_test.3018453720 |
|
|
Jul 27 04:56:24 PM PDT 24 |
Jul 27 04:56:25 PM PDT 24 |
27813806 ps |
| T51 |
/workspace/coverage/default/31.lc_ctrl_volatile_unlock_smoke.2568476969 |
|
|
Jul 27 04:57:15 PM PDT 24 |
Jul 27 04:57:21 PM PDT 24 |
12104942 ps |
| T875 |
/workspace/coverage/default/8.lc_ctrl_regwen_during_op.2619610348 |
|
|
Jul 27 04:56:37 PM PDT 24 |
Jul 27 04:56:49 PM PDT 24 |
390615670 ps |
| T84 |
/workspace/coverage/default/16.lc_ctrl_smoke.260843634 |
|
|
Jul 27 04:56:56 PM PDT 24 |
Jul 27 04:56:59 PM PDT 24 |
817327380 ps |
| T876 |
/workspace/coverage/default/49.lc_ctrl_volatile_unlock_smoke.3402741542 |
|
|
Jul 27 04:57:53 PM PDT 24 |
Jul 27 04:57:54 PM PDT 24 |
13246059 ps |
| T877 |
/workspace/coverage/default/38.lc_ctrl_volatile_unlock_smoke.2552624508 |
|
|
Jul 27 04:57:31 PM PDT 24 |
Jul 27 04:57:32 PM PDT 24 |
54341733 ps |
| T878 |
/workspace/coverage/default/36.lc_ctrl_stress_all_with_rand_reset.3514846986 |
|
|
Jul 27 04:57:29 PM PDT 24 |
Jul 27 05:20:16 PM PDT 24 |
117547222152 ps |
| T879 |
/workspace/coverage/default/49.lc_ctrl_state_post_trans.701625928 |
|
|
Jul 27 04:57:50 PM PDT 24 |
Jul 27 04:57:57 PM PDT 24 |
176958750 ps |
| T880 |
/workspace/coverage/default/7.lc_ctrl_state_post_trans.2686099178 |
|
|
Jul 27 04:56:14 PM PDT 24 |
Jul 27 04:56:23 PM PDT 24 |
270521388 ps |
| T881 |
/workspace/coverage/default/34.lc_ctrl_stress_all.729371358 |
|
|
Jul 27 04:57:20 PM PDT 24 |
Jul 27 04:59:04 PM PDT 24 |
19570629363 ps |
| T130 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.2618537649 |
|
|
Jul 27 04:55:10 PM PDT 24 |
Jul 27 04:55:12 PM PDT 24 |
393043479 ps |
| T131 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.3266996178 |
|
|
Jul 27 04:55:05 PM PDT 24 |
Jul 27 04:55:16 PM PDT 24 |
965734437 ps |
| T132 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.1075088805 |
|
|
Jul 27 04:54:45 PM PDT 24 |
Jul 27 04:54:46 PM PDT 24 |
15722189 ps |
| T122 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.3864355281 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:11 PM PDT 24 |
64086675 ps |
| T116 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.598124144 |
|
|
Jul 27 04:55:16 PM PDT 24 |
Jul 27 04:55:20 PM PDT 24 |
94530231 ps |
| T117 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.566888482 |
|
|
Jul 27 04:55:13 PM PDT 24 |
Jul 27 04:55:15 PM PDT 24 |
1187047183 ps |
| T119 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.3503039373 |
|
|
Jul 27 04:55:18 PM PDT 24 |
Jul 27 04:55:21 PM PDT 24 |
166959048 ps |
| T139 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.335440055 |
|
|
Jul 27 04:54:43 PM PDT 24 |
Jul 27 04:54:46 PM PDT 24 |
101714897 ps |
| T882 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.1125497657 |
|
|
Jul 27 04:55:03 PM PDT 24 |
Jul 27 04:55:05 PM PDT 24 |
123412012 ps |
| T123 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.1950777040 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:10 PM PDT 24 |
749729628 ps |
| T120 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.2439157226 |
|
|
Jul 27 04:54:43 PM PDT 24 |
Jul 27 04:54:45 PM PDT 24 |
110091454 ps |
| T883 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.890265083 |
|
|
Jul 27 04:54:49 PM PDT 24 |
Jul 27 04:54:55 PM PDT 24 |
2386203158 ps |
| T155 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.1101023326 |
|
|
Jul 27 04:54:45 PM PDT 24 |
Jul 27 04:54:46 PM PDT 24 |
129374604 ps |
| T161 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.2067853421 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:10 PM PDT 24 |
15267652 ps |
| T121 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.1688891252 |
|
|
Jul 27 04:55:13 PM PDT 24 |
Jul 27 04:55:17 PM PDT 24 |
283885705 ps |
| T220 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.3461428898 |
|
|
Jul 27 04:55:20 PM PDT 24 |
Jul 27 04:55:21 PM PDT 24 |
110000904 ps |
| T884 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.2248507826 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:11 PM PDT 24 |
93563151 ps |
| T206 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.3776883428 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:15 PM PDT 24 |
24643071 ps |
| T885 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.3965606511 |
|
|
Jul 27 04:55:12 PM PDT 24 |
Jul 27 04:55:13 PM PDT 24 |
144471448 ps |
| T207 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.2781469465 |
|
|
Jul 27 04:55:14 PM PDT 24 |
Jul 27 04:55:15 PM PDT 24 |
14268633 ps |
| T886 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.4003068716 |
|
|
Jul 27 04:55:08 PM PDT 24 |
Jul 27 04:55:14 PM PDT 24 |
12976775 ps |
| T129 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.3930556341 |
|
|
Jul 27 04:55:04 PM PDT 24 |
Jul 27 04:55:07 PM PDT 24 |
584121632 ps |
| T162 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.1939124874 |
|
|
Jul 27 04:55:11 PM PDT 24 |
Jul 27 04:55:13 PM PDT 24 |
81184119 ps |
| T137 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.2240060988 |
|
|
Jul 27 04:55:35 PM PDT 24 |
Jul 27 04:55:38 PM PDT 24 |
117879733 ps |
| T140 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.3576295400 |
|
|
Jul 27 04:54:54 PM PDT 24 |
Jul 27 04:54:57 PM PDT 24 |
96972983 ps |
| T887 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.4198003770 |
|
|
Jul 27 04:54:55 PM PDT 24 |
Jul 27 04:54:59 PM PDT 24 |
519000798 ps |
| T151 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.3682886284 |
|
|
Jul 27 04:55:03 PM PDT 24 |
Jul 27 04:55:04 PM PDT 24 |
92323877 ps |
| T221 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.2796130481 |
|
|
Jul 27 04:55:14 PM PDT 24 |
Jul 27 04:55:15 PM PDT 24 |
73664650 ps |
| T222 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.1155938369 |
|
|
Jul 27 04:55:24 PM PDT 24 |
Jul 27 04:55:25 PM PDT 24 |
23112866 ps |
| T152 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2802930519 |
|
|
Jul 27 04:54:58 PM PDT 24 |
Jul 27 04:55:00 PM PDT 24 |
142785970 ps |
| T223 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.2490221257 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:09 PM PDT 24 |
34547799 ps |
| T888 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.2217177751 |
|
|
Jul 27 04:54:46 PM PDT 24 |
Jul 27 04:54:48 PM PDT 24 |
138214961 ps |
| T889 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.2488174030 |
|
|
Jul 27 04:54:57 PM PDT 24 |
Jul 27 04:55:04 PM PDT 24 |
2589562805 ps |
| T890 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.818059634 |
|
|
Jul 27 04:55:10 PM PDT 24 |
Jul 27 04:55:12 PM PDT 24 |
117723112 ps |
| T224 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.2566564838 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:08 PM PDT 24 |
23898825 ps |
| T225 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.1597609989 |
|
|
Jul 27 04:55:04 PM PDT 24 |
Jul 27 04:55:05 PM PDT 24 |
24054138 ps |
| T136 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.706414038 |
|
|
Jul 27 04:55:10 PM PDT 24 |
Jul 27 04:55:12 PM PDT 24 |
61891561 ps |
| T141 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.1453357297 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:12 PM PDT 24 |
1439635945 ps |
| T163 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.2669051064 |
|
|
Jul 27 04:54:51 PM PDT 24 |
Jul 27 04:54:53 PM PDT 24 |
57297205 ps |
| T208 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.505726118 |
|
|
Jul 27 04:55:05 PM PDT 24 |
Jul 27 04:55:06 PM PDT 24 |
12197002 ps |
| T891 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.2970140436 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:11 PM PDT 24 |
38689840 ps |
| T892 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.91424355 |
|
|
Jul 27 04:54:50 PM PDT 24 |
Jul 27 04:54:51 PM PDT 24 |
25081394 ps |
| T893 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.1745194009 |
|
|
Jul 27 04:54:44 PM PDT 24 |
Jul 27 04:54:45 PM PDT 24 |
18118850 ps |
| T894 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.1875881362 |
|
|
Jul 27 04:55:04 PM PDT 24 |
Jul 27 04:55:05 PM PDT 24 |
14765553 ps |
| T895 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.3782597684 |
|
|
Jul 27 04:55:11 PM PDT 24 |
Jul 27 04:55:12 PM PDT 24 |
90407036 ps |
| T209 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.4196582234 |
|
|
Jul 27 04:54:51 PM PDT 24 |
Jul 27 04:54:52 PM PDT 24 |
110106507 ps |
| T896 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.922377336 |
|
|
Jul 27 04:55:04 PM PDT 24 |
Jul 27 04:55:06 PM PDT 24 |
31866790 ps |
| T135 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.258252201 |
|
|
Jul 27 04:55:14 PM PDT 24 |
Jul 27 04:55:15 PM PDT 24 |
20576563 ps |
| T210 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.2648116226 |
|
|
Jul 27 04:54:43 PM PDT 24 |
Jul 27 04:54:44 PM PDT 24 |
30369656 ps |
| T897 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.642942751 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:08 PM PDT 24 |
17186339 ps |
| T898 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.4169722231 |
|
|
Jul 27 04:54:59 PM PDT 24 |
Jul 27 04:55:01 PM PDT 24 |
74263604 ps |
| T124 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.1593444697 |
|
|
Jul 27 04:54:56 PM PDT 24 |
Jul 27 04:54:58 PM PDT 24 |
100916355 ps |
| T899 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.799784324 |
|
|
Jul 27 04:55:00 PM PDT 24 |
Jul 27 04:55:01 PM PDT 24 |
15218918 ps |
| T138 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.2935357567 |
|
|
Jul 27 04:55:25 PM PDT 24 |
Jul 27 04:55:29 PM PDT 24 |
103873524 ps |
| T900 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.465886216 |
|
|
Jul 27 04:55:10 PM PDT 24 |
Jul 27 04:55:11 PM PDT 24 |
18043982 ps |
| T142 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.2723518719 |
|
|
Jul 27 04:55:19 PM PDT 24 |
Jul 27 04:55:21 PM PDT 24 |
35083257 ps |
| T153 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1199167803 |
|
|
Jul 27 04:54:48 PM PDT 24 |
Jul 27 04:54:52 PM PDT 24 |
179294197 ps |
| T125 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.205626073 |
|
|
Jul 27 04:55:00 PM PDT 24 |
Jul 27 04:55:03 PM PDT 24 |
319467964 ps |
| T901 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.1297026446 |
|
|
Jul 27 04:55:04 PM PDT 24 |
Jul 27 04:55:06 PM PDT 24 |
26779112 ps |
| T902 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.4282830382 |
|
|
Jul 27 04:54:44 PM PDT 24 |
Jul 27 04:54:55 PM PDT 24 |
905554318 ps |
| T903 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.2394555193 |
|
|
Jul 27 04:54:54 PM PDT 24 |
Jul 27 04:54:57 PM PDT 24 |
63910115 ps |
| T147 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.2765134860 |
|
|
Jul 27 04:55:08 PM PDT 24 |
Jul 27 04:55:10 PM PDT 24 |
136228911 ps |
| T904 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.998789607 |
|
|
Jul 27 04:54:54 PM PDT 24 |
Jul 27 04:54:56 PM PDT 24 |
36772028 ps |
| T905 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.329067180 |
|
|
Jul 27 04:55:11 PM PDT 24 |
Jul 27 04:55:12 PM PDT 24 |
54205624 ps |
| T906 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.3493214965 |
|
|
Jul 27 04:55:00 PM PDT 24 |
Jul 27 04:55:01 PM PDT 24 |
35613048 ps |
| T907 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.2484517009 |
|
|
Jul 27 04:54:57 PM PDT 24 |
Jul 27 04:55:01 PM PDT 24 |
447753915 ps |
| T908 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.1771193420 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:08 PM PDT 24 |
110162538 ps |
| T909 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.1019078211 |
|
|
Jul 27 04:54:49 PM PDT 24 |
Jul 27 04:54:50 PM PDT 24 |
207835577 ps |
| T910 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.406488929 |
|
|
Jul 27 04:55:27 PM PDT 24 |
Jul 27 04:55:29 PM PDT 24 |
198863500 ps |
| T911 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.4216245324 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:08 PM PDT 24 |
18489310 ps |
| T912 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.1479861824 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:12 PM PDT 24 |
1966087047 ps |
| T143 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.473741288 |
|
|
Jul 27 04:54:54 PM PDT 24 |
Jul 27 04:54:57 PM PDT 24 |
63245732 ps |
| T913 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.1482790445 |
|
|
Jul 27 04:55:01 PM PDT 24 |
Jul 27 04:55:04 PM PDT 24 |
427567935 ps |
| T914 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.1142001160 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:21 PM PDT 24 |
1070413092 ps |
| T915 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.2764918148 |
|
|
Jul 27 04:55:29 PM PDT 24 |
Jul 27 04:55:30 PM PDT 24 |
62690938 ps |
| T211 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.1950103469 |
|
|
Jul 27 04:55:22 PM PDT 24 |
Jul 27 04:55:23 PM PDT 24 |
43676324 ps |
| T916 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.66225594 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:20 PM PDT 24 |
421563276 ps |
| T148 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.2415591758 |
|
|
Jul 27 04:55:11 PM PDT 24 |
Jul 27 04:55:13 PM PDT 24 |
164069487 ps |
| T212 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.1937966731 |
|
|
Jul 27 04:55:15 PM PDT 24 |
Jul 27 04:55:16 PM PDT 24 |
51053994 ps |
| T917 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.853751427 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:10 PM PDT 24 |
91449799 ps |
| T918 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.1323831739 |
|
|
Jul 27 04:54:48 PM PDT 24 |
Jul 27 04:54:50 PM PDT 24 |
163087682 ps |
| T919 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.3958315574 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:09 PM PDT 24 |
62009963 ps |
| T920 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.2066958708 |
|
|
Jul 27 04:55:47 PM PDT 24 |
Jul 27 04:55:49 PM PDT 24 |
115955167 ps |
| T921 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.3506221403 |
|
|
Jul 27 04:54:51 PM PDT 24 |
Jul 27 04:54:52 PM PDT 24 |
362192615 ps |
| T922 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.1054322579 |
|
|
Jul 27 04:55:02 PM PDT 24 |
Jul 27 04:55:07 PM PDT 24 |
733262926 ps |
| T923 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.3887407016 |
|
|
Jul 27 04:54:42 PM PDT 24 |
Jul 27 04:54:44 PM PDT 24 |
63761846 ps |
| T924 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.1235831553 |
|
|
Jul 27 04:55:10 PM PDT 24 |
Jul 27 04:55:11 PM PDT 24 |
37581053 ps |
| T925 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.67767523 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:18 PM PDT 24 |
1243036423 ps |
| T126 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.2610886933 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:08 PM PDT 24 |
164616545 ps |
| T926 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.2598170412 |
|
|
Jul 27 04:55:12 PM PDT 24 |
Jul 27 04:55:13 PM PDT 24 |
24818604 ps |
| T927 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.748967151 |
|
|
Jul 27 04:55:17 PM PDT 24 |
Jul 27 04:55:19 PM PDT 24 |
127592068 ps |
| T928 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.198331220 |
|
|
Jul 27 04:54:43 PM PDT 24 |
Jul 27 04:55:01 PM PDT 24 |
1946004645 ps |
| T929 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.9252526 |
|
|
Jul 27 04:54:55 PM PDT 24 |
Jul 27 04:54:56 PM PDT 24 |
42560442 ps |
| T930 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.1231202319 |
|
|
Jul 27 04:54:45 PM PDT 24 |
Jul 27 04:54:50 PM PDT 24 |
371441529 ps |
| T213 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.3339771403 |
|
|
Jul 27 04:55:16 PM PDT 24 |
Jul 27 04:55:17 PM PDT 24 |
42076239 ps |
| T931 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.1999735822 |
|
|
Jul 27 04:55:12 PM PDT 24 |
Jul 27 04:55:14 PM PDT 24 |
96081942 ps |
| T932 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.22460791 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:11 PM PDT 24 |
106597511 ps |
| T933 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.2417554153 |
|
|
Jul 27 04:55:10 PM PDT 24 |
Jul 27 04:55:20 PM PDT 24 |
2295238361 ps |
| T934 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.3162577992 |
|
|
Jul 27 04:54:43 PM PDT 24 |
Jul 27 04:54:44 PM PDT 24 |
52208542 ps |
| T935 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.3388669560 |
|
|
Jul 27 04:55:08 PM PDT 24 |
Jul 27 04:55:10 PM PDT 24 |
25832371 ps |
| T150 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.3555640911 |
|
|
Jul 27 04:55:24 PM PDT 24 |
Jul 27 04:55:28 PM PDT 24 |
318097947 ps |
| T936 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.3604726915 |
|
|
Jul 27 04:55:34 PM PDT 24 |
Jul 27 04:55:35 PM PDT 24 |
14711237 ps |
| T937 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.1431223475 |
|
|
Jul 27 04:55:04 PM PDT 24 |
Jul 27 04:55:16 PM PDT 24 |
989144758 ps |
| T938 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.2134853258 |
|
|
Jul 27 04:55:08 PM PDT 24 |
Jul 27 04:55:10 PM PDT 24 |
42188051 ps |
| T939 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.2391367612 |
|
|
Jul 27 04:55:08 PM PDT 24 |
Jul 27 04:55:10 PM PDT 24 |
88493441 ps |
| T940 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4249411104 |
|
|
Jul 27 04:55:10 PM PDT 24 |
Jul 27 04:55:12 PM PDT 24 |
429159027 ps |
| T941 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.1134798146 |
|
|
Jul 27 04:55:27 PM PDT 24 |
Jul 27 04:55:29 PM PDT 24 |
26392298 ps |
| T942 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.2885260507 |
|
|
Jul 27 04:55:15 PM PDT 24 |
Jul 27 04:55:16 PM PDT 24 |
59223648 ps |
| T943 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1006798123 |
|
|
Jul 27 04:55:20 PM PDT 24 |
Jul 27 04:55:32 PM PDT 24 |
1105522706 ps |
| T944 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.1258250755 |
|
|
Jul 27 04:54:45 PM PDT 24 |
Jul 27 04:54:46 PM PDT 24 |
19482068 ps |
| T945 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.2139228527 |
|
|
Jul 27 04:54:47 PM PDT 24 |
Jul 27 04:54:48 PM PDT 24 |
59804615 ps |
| T946 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.352146897 |
|
|
Jul 27 04:55:02 PM PDT 24 |
Jul 27 04:55:04 PM PDT 24 |
48921221 ps |
| T214 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.1134860046 |
|
|
Jul 27 04:54:43 PM PDT 24 |
Jul 27 04:54:44 PM PDT 24 |
18306125 ps |
| T947 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.565232396 |
|
|
Jul 27 04:55:08 PM PDT 24 |
Jul 27 04:55:12 PM PDT 24 |
147206524 ps |
| T948 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.2090903006 |
|
|
Jul 27 04:54:45 PM PDT 24 |
Jul 27 04:54:46 PM PDT 24 |
17614848 ps |
| T949 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.3429935117 |
|
|
Jul 27 04:55:11 PM PDT 24 |
Jul 27 04:55:13 PM PDT 24 |
138197298 ps |
| T950 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.3288890346 |
|
|
Jul 27 04:55:18 PM PDT 24 |
Jul 27 04:55:20 PM PDT 24 |
536420841 ps |
| T951 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.1777300756 |
|
|
Jul 27 04:55:34 PM PDT 24 |
Jul 27 04:55:35 PM PDT 24 |
47092473 ps |
| T952 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.3201881791 |
|
|
Jul 27 04:54:48 PM PDT 24 |
Jul 27 04:54:50 PM PDT 24 |
20499971 ps |
| T953 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.1634055088 |
|
|
Jul 27 04:55:06 PM PDT 24 |
Jul 27 04:55:07 PM PDT 24 |
67646679 ps |
| T954 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2775360839 |
|
|
Jul 27 04:54:43 PM PDT 24 |
Jul 27 04:54:44 PM PDT 24 |
93262246 ps |
| T146 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.3722141187 |
|
|
Jul 27 04:54:53 PM PDT 24 |
Jul 27 04:54:56 PM PDT 24 |
475243509 ps |
| T215 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.3471129452 |
|
|
Jul 27 04:54:50 PM PDT 24 |
Jul 27 04:54:51 PM PDT 24 |
50283921 ps |
| T955 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.2601659215 |
|
|
Jul 27 04:54:59 PM PDT 24 |
Jul 27 04:55:01 PM PDT 24 |
139809504 ps |
| T956 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3216518525 |
|
|
Jul 27 04:54:57 PM PDT 24 |
Jul 27 04:55:01 PM PDT 24 |
340369651 ps |
| T957 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.616678442 |
|
|
Jul 27 04:55:20 PM PDT 24 |
Jul 27 04:55:21 PM PDT 24 |
79674691 ps |
| T958 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.3027559258 |
|
|
Jul 27 04:55:15 PM PDT 24 |
Jul 27 04:55:17 PM PDT 24 |
88879944 ps |
| T133 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.2925578542 |
|
|
Jul 27 04:54:46 PM PDT 24 |
Jul 27 04:54:50 PM PDT 24 |
335559421 ps |
| T145 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.1219567165 |
|
|
Jul 27 04:55:13 PM PDT 24 |
Jul 27 04:55:17 PM PDT 24 |
405639267 ps |
| T959 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.2035374032 |
|
|
Jul 27 04:54:42 PM PDT 24 |
Jul 27 04:54:45 PM PDT 24 |
382650553 ps |
| T216 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.850923760 |
|
|
Jul 27 04:55:00 PM PDT 24 |
Jul 27 04:55:01 PM PDT 24 |
88191494 ps |
| T960 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.2655974026 |
|
|
Jul 27 04:55:06 PM PDT 24 |
Jul 27 04:55:08 PM PDT 24 |
97153837 ps |
| T217 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.1518430691 |
|
|
Jul 27 04:54:48 PM PDT 24 |
Jul 27 04:54:49 PM PDT 24 |
35026339 ps |
| T961 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.2928818839 |
|
|
Jul 27 04:54:45 PM PDT 24 |
Jul 27 04:54:46 PM PDT 24 |
109881898 ps |
| T962 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.996507338 |
|
|
Jul 27 04:55:12 PM PDT 24 |
Jul 27 04:55:14 PM PDT 24 |
136066065 ps |
| T963 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.2861536395 |
|
|
Jul 27 04:55:13 PM PDT 24 |
Jul 27 04:55:16 PM PDT 24 |
75726628 ps |
| T964 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.3388548260 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:11 PM PDT 24 |
415170500 ps |
| T965 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.1976561351 |
|
|
Jul 27 04:55:01 PM PDT 24 |
Jul 27 04:55:04 PM PDT 24 |
173800129 ps |
| T966 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.659758747 |
|
|
Jul 27 04:54:44 PM PDT 24 |
Jul 27 04:54:46 PM PDT 24 |
37426548 ps |
| T967 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.1231116023 |
|
|
Jul 27 04:55:04 PM PDT 24 |
Jul 27 04:55:06 PM PDT 24 |
46160358 ps |
| T134 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.3958990346 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:13 PM PDT 24 |
442460716 ps |
| T968 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.2092075775 |
|
|
Jul 27 04:55:12 PM PDT 24 |
Jul 27 04:55:14 PM PDT 24 |
121066465 ps |
| T144 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.1930144710 |
|
|
Jul 27 04:55:08 PM PDT 24 |
Jul 27 04:55:11 PM PDT 24 |
1246721638 ps |
| T218 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.4111474621 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:10 PM PDT 24 |
29843878 ps |
| T969 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.3698728360 |
|
|
Jul 27 04:54:46 PM PDT 24 |
Jul 27 04:54:48 PM PDT 24 |
34593063 ps |
| T970 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.1176212142 |
|
|
Jul 27 04:55:14 PM PDT 24 |
Jul 27 04:55:15 PM PDT 24 |
37791700 ps |
| T971 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.1361453138 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:08 PM PDT 24 |
284729953 ps |
| T972 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.1887908525 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:10 PM PDT 24 |
90995073 ps |
| T127 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.3960182040 |
|
|
Jul 27 04:55:15 PM PDT 24 |
Jul 27 04:55:17 PM PDT 24 |
154890072 ps |
| T973 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.3040553230 |
|
|
Jul 27 04:55:05 PM PDT 24 |
Jul 27 04:55:06 PM PDT 24 |
18807153 ps |
| T974 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.3617169378 |
|
|
Jul 27 04:55:12 PM PDT 24 |
Jul 27 04:55:14 PM PDT 24 |
83006767 ps |
| T975 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.414085311 |
|
|
Jul 27 04:55:13 PM PDT 24 |
Jul 27 04:55:16 PM PDT 24 |
95961733 ps |
| T976 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.98252081 |
|
|
Jul 27 04:54:44 PM PDT 24 |
Jul 27 04:54:46 PM PDT 24 |
212521454 ps |
| T977 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.1858875023 |
|
|
Jul 27 04:55:19 PM PDT 24 |
Jul 27 04:55:21 PM PDT 24 |
106124905 ps |
| T978 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.2047535943 |
|
|
Jul 27 04:54:49 PM PDT 24 |
Jul 27 04:54:50 PM PDT 24 |
103990672 ps |
| T979 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.403120750 |
|
|
Jul 27 04:54:59 PM PDT 24 |
Jul 27 04:55:09 PM PDT 24 |
372516529 ps |
| T980 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.1992529274 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:09 PM PDT 24 |
40471971 ps |
| T981 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.250800406 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:11 PM PDT 24 |
37858557 ps |
| T982 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2985859924 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:11 PM PDT 24 |
110609676 ps |
| T983 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.3570946987 |
|
|
Jul 27 04:55:15 PM PDT 24 |
Jul 27 04:55:21 PM PDT 24 |
5711435177 ps |
| T128 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.32040151 |
|
|
Jul 27 04:55:18 PM PDT 24 |
Jul 27 04:55:21 PM PDT 24 |
395877276 ps |
| T219 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.2730673929 |
|
|
Jul 27 04:54:43 PM PDT 24 |
Jul 27 04:54:44 PM PDT 24 |
72497439 ps |
| T984 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.3929691718 |
|
|
Jul 27 04:55:09 PM PDT 24 |
Jul 27 04:55:12 PM PDT 24 |
562257183 ps |
| T985 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.4209115225 |
|
|
Jul 27 04:55:11 PM PDT 24 |
Jul 27 04:55:13 PM PDT 24 |
268014849 ps |
| T986 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.3126804247 |
|
|
Jul 27 04:55:17 PM PDT 24 |
Jul 27 04:55:20 PM PDT 24 |
148538785 ps |
| T987 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3550402809 |
|
|
Jul 27 04:55:14 PM PDT 24 |
Jul 27 04:55:16 PM PDT 24 |
49651223 ps |
| T988 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.641502271 |
|
|
Jul 27 04:55:27 PM PDT 24 |
Jul 27 04:55:28 PM PDT 24 |
13647269 ps |
| T989 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.3758101388 |
|
|
Jul 27 04:55:14 PM PDT 24 |
Jul 27 04:55:16 PM PDT 24 |
44050244 ps |
| T990 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.644485752 |
|
|
Jul 27 04:55:08 PM PDT 24 |
Jul 27 04:55:10 PM PDT 24 |
31920321 ps |
| T991 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.2118592987 |
|
|
Jul 27 04:55:02 PM PDT 24 |
Jul 27 04:55:04 PM PDT 24 |
154468671 ps |
| T992 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.1895094390 |
|
|
Jul 27 04:55:12 PM PDT 24 |
Jul 27 04:55:16 PM PDT 24 |
90943682 ps |
| T993 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.2526370884 |
|
|
Jul 27 04:55:15 PM PDT 24 |
Jul 27 04:55:17 PM PDT 24 |
190147420 ps |
| T994 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.1932824706 |
|
|
Jul 27 04:55:00 PM PDT 24 |
Jul 27 04:55:08 PM PDT 24 |
1456857736 ps |
| T995 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.3273306530 |
|
|
Jul 27 04:55:24 PM PDT 24 |
Jul 27 04:55:26 PM PDT 24 |
34012805 ps |
| T996 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.4285067199 |
|
|
Jul 27 04:54:56 PM PDT 24 |
Jul 27 04:54:58 PM PDT 24 |
74950393 ps |
| T997 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.2440800161 |
|
|
Jul 27 04:54:51 PM PDT 24 |
Jul 27 04:54:55 PM PDT 24 |
234179479 ps |
| T998 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.224807122 |
|
|
Jul 27 04:54:57 PM PDT 24 |
Jul 27 04:54:59 PM PDT 24 |
47593471 ps |
| T999 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.2824765499 |
|
|
Jul 27 04:54:57 PM PDT 24 |
Jul 27 04:54:58 PM PDT 24 |
158916709 ps |
| T1000 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.564479670 |
|
|
Jul 27 04:55:07 PM PDT 24 |
Jul 27 04:55:19 PM PDT 24 |
1760278910 ps |
| T1001 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.1250432329 |
|
|
Jul 27 04:54:57 PM PDT 24 |
Jul 27 04:54:59 PM PDT 24 |
60410459 ps |