| T812 |
/workspace/coverage/default/22.lc_ctrl_jtag_access.1952476670 |
|
|
Jul 30 05:54:25 PM PDT 24 |
Jul 30 05:54:29 PM PDT 24 |
1097378122 ps |
| T813 |
/workspace/coverage/default/27.lc_ctrl_state_failure.2525760382 |
|
|
Jul 30 05:54:40 PM PDT 24 |
Jul 30 05:54:56 PM PDT 24 |
903336164 ps |
| T814 |
/workspace/coverage/default/34.lc_ctrl_volatile_unlock_smoke.2124034621 |
|
|
Jul 30 05:55:01 PM PDT 24 |
Jul 30 05:55:02 PM PDT 24 |
35345129 ps |
| T815 |
/workspace/coverage/default/44.lc_ctrl_jtag_access.2673758919 |
|
|
Jul 30 05:55:34 PM PDT 24 |
Jul 30 05:56:00 PM PDT 24 |
4330846159 ps |
| T816 |
/workspace/coverage/default/38.lc_ctrl_stress_all.4210866037 |
|
|
Jul 30 05:55:15 PM PDT 24 |
Jul 30 06:01:04 PM PDT 24 |
56741309780 ps |
| T817 |
/workspace/coverage/default/38.lc_ctrl_sec_mubi.1511285165 |
|
|
Jul 30 05:55:16 PM PDT 24 |
Jul 30 05:55:32 PM PDT 24 |
684402293 ps |
| T818 |
/workspace/coverage/default/11.lc_ctrl_state_post_trans.2191148391 |
|
|
Jul 30 05:53:35 PM PDT 24 |
Jul 30 05:53:39 PM PDT 24 |
58886800 ps |
| T819 |
/workspace/coverage/default/20.lc_ctrl_prog_failure.2504427594 |
|
|
Jul 30 05:54:16 PM PDT 24 |
Jul 30 05:54:19 PM PDT 24 |
799690226 ps |
| T820 |
/workspace/coverage/default/25.lc_ctrl_errors.437194038 |
|
|
Jul 30 05:54:34 PM PDT 24 |
Jul 30 05:54:49 PM PDT 24 |
435878125 ps |
| T821 |
/workspace/coverage/default/9.lc_ctrl_jtag_state_post_trans.800167185 |
|
|
Jul 30 05:53:25 PM PDT 24 |
Jul 30 05:53:56 PM PDT 24 |
909406305 ps |
| T822 |
/workspace/coverage/default/18.lc_ctrl_jtag_errors.100063134 |
|
|
Jul 30 05:54:08 PM PDT 24 |
Jul 30 05:55:08 PM PDT 24 |
3043671363 ps |
| T823 |
/workspace/coverage/default/37.lc_ctrl_prog_failure.2362261309 |
|
|
Jul 30 05:55:12 PM PDT 24 |
Jul 30 05:55:14 PM PDT 24 |
23358423 ps |
| T824 |
/workspace/coverage/default/44.lc_ctrl_security_escalation.1392466359 |
|
|
Jul 30 05:55:33 PM PDT 24 |
Jul 30 05:55:42 PM PDT 24 |
691826705 ps |
| T825 |
/workspace/coverage/default/30.lc_ctrl_smoke.41110181 |
|
|
Jul 30 05:54:45 PM PDT 24 |
Jul 30 05:54:48 PM PDT 24 |
80922103 ps |
| T826 |
/workspace/coverage/default/45.lc_ctrl_alert_test.626315147 |
|
|
Jul 30 05:55:38 PM PDT 24 |
Jul 30 05:55:39 PM PDT 24 |
18068012 ps |
| T827 |
/workspace/coverage/default/33.lc_ctrl_volatile_unlock_smoke.1220562986 |
|
|
Jul 30 05:55:02 PM PDT 24 |
Jul 30 05:55:03 PM PDT 24 |
64640642 ps |
| T89 |
/workspace/coverage/default/3.lc_ctrl_sec_cm.3994623655 |
|
|
Jul 30 05:52:55 PM PDT 24 |
Jul 30 05:53:19 PM PDT 24 |
217568090 ps |
| T828 |
/workspace/coverage/default/17.lc_ctrl_prog_failure.900627173 |
|
|
Jul 30 05:54:01 PM PDT 24 |
Jul 30 05:54:03 PM PDT 24 |
46620459 ps |
| T829 |
/workspace/coverage/default/15.lc_ctrl_jtag_prog_failure.1686036567 |
|
|
Jul 30 05:53:59 PM PDT 24 |
Jul 30 05:54:04 PM PDT 24 |
511514100 ps |
| T830 |
/workspace/coverage/default/11.lc_ctrl_sec_token_digest.1842194043 |
|
|
Jul 30 05:53:43 PM PDT 24 |
Jul 30 05:53:54 PM PDT 24 |
271056904 ps |
| T831 |
/workspace/coverage/default/43.lc_ctrl_volatile_unlock_smoke.2613326666 |
|
|
Jul 30 05:55:27 PM PDT 24 |
Jul 30 05:55:28 PM PDT 24 |
24056134 ps |
| T832 |
/workspace/coverage/default/10.lc_ctrl_sec_token_mux.2052959197 |
|
|
Jul 30 05:53:33 PM PDT 24 |
Jul 30 05:53:43 PM PDT 24 |
1822075919 ps |
| T833 |
/workspace/coverage/default/5.lc_ctrl_regwen_during_op.4061682364 |
|
|
Jul 30 05:53:05 PM PDT 24 |
Jul 30 05:53:21 PM PDT 24 |
227752435 ps |
| T834 |
/workspace/coverage/default/12.lc_ctrl_stress_all.4019341340 |
|
|
Jul 30 05:53:50 PM PDT 24 |
Jul 30 05:54:12 PM PDT 24 |
2074650162 ps |
| T835 |
/workspace/coverage/default/43.lc_ctrl_state_post_trans.472695513 |
|
|
Jul 30 05:55:28 PM PDT 24 |
Jul 30 05:55:37 PM PDT 24 |
407404437 ps |
| T836 |
/workspace/coverage/default/46.lc_ctrl_prog_failure.1311277972 |
|
|
Jul 30 05:55:36 PM PDT 24 |
Jul 30 05:55:38 PM PDT 24 |
22508036 ps |
| T837 |
/workspace/coverage/default/18.lc_ctrl_state_post_trans.3022044466 |
|
|
Jul 30 05:54:05 PM PDT 24 |
Jul 30 05:54:13 PM PDT 24 |
342362726 ps |
| T838 |
/workspace/coverage/default/28.lc_ctrl_volatile_unlock_smoke.3569721725 |
|
|
Jul 30 05:54:45 PM PDT 24 |
Jul 30 05:54:46 PM PDT 24 |
120917037 ps |
| T839 |
/workspace/coverage/default/22.lc_ctrl_sec_mubi.534431534 |
|
|
Jul 30 05:54:25 PM PDT 24 |
Jul 30 05:54:35 PM PDT 24 |
894120571 ps |
| T840 |
/workspace/coverage/default/39.lc_ctrl_state_failure.1753153984 |
|
|
Jul 30 05:55:15 PM PDT 24 |
Jul 30 05:55:43 PM PDT 24 |
343971751 ps |
| T841 |
/workspace/coverage/default/7.lc_ctrl_volatile_unlock_smoke.2175355144 |
|
|
Jul 30 05:53:09 PM PDT 24 |
Jul 30 05:53:10 PM PDT 24 |
45373581 ps |
| T842 |
/workspace/coverage/default/6.lc_ctrl_alert_test.1712996848 |
|
|
Jul 30 05:53:11 PM PDT 24 |
Jul 30 05:53:13 PM PDT 24 |
24708415 ps |
| T843 |
/workspace/coverage/default/12.lc_ctrl_jtag_smoke.1768649188 |
|
|
Jul 30 05:53:50 PM PDT 24 |
Jul 30 05:53:57 PM PDT 24 |
1537354163 ps |
| T844 |
/workspace/coverage/default/37.lc_ctrl_errors.3369628388 |
|
|
Jul 30 05:55:15 PM PDT 24 |
Jul 30 05:55:32 PM PDT 24 |
690585290 ps |
| T845 |
/workspace/coverage/default/0.lc_ctrl_jtag_priority.3410185617 |
|
|
Jul 30 05:52:40 PM PDT 24 |
Jul 30 05:52:44 PM PDT 24 |
518168672 ps |
| T846 |
/workspace/coverage/default/18.lc_ctrl_volatile_unlock_smoke.3312325103 |
|
|
Jul 30 05:54:07 PM PDT 24 |
Jul 30 05:54:08 PM PDT 24 |
82925505 ps |
| T847 |
/workspace/coverage/default/13.lc_ctrl_alert_test.1879071921 |
|
|
Jul 30 05:53:52 PM PDT 24 |
Jul 30 05:53:53 PM PDT 24 |
69847513 ps |
| T848 |
/workspace/coverage/default/1.lc_ctrl_jtag_priority.810478939 |
|
|
Jul 30 05:52:45 PM PDT 24 |
Jul 30 05:52:48 PM PDT 24 |
587701940 ps |
| T849 |
/workspace/coverage/default/13.lc_ctrl_stress_all.2321271261 |
|
|
Jul 30 05:53:50 PM PDT 24 |
Jul 30 05:56:02 PM PDT 24 |
23423308352 ps |
| T850 |
/workspace/coverage/default/41.lc_ctrl_volatile_unlock_smoke.951551124 |
|
|
Jul 30 05:55:24 PM PDT 24 |
Jul 30 05:55:25 PM PDT 24 |
13061890 ps |
| T851 |
/workspace/coverage/default/12.lc_ctrl_state_post_trans.2379266310 |
|
|
Jul 30 05:53:41 PM PDT 24 |
Jul 30 05:53:49 PM PDT 24 |
61833543 ps |
| T852 |
/workspace/coverage/default/38.lc_ctrl_errors.3266637739 |
|
|
Jul 30 05:55:12 PM PDT 24 |
Jul 30 05:55:28 PM PDT 24 |
4148650165 ps |
| T42 |
/workspace/coverage/default/27.lc_ctrl_volatile_unlock_smoke.3594759324 |
|
|
Jul 30 05:54:40 PM PDT 24 |
Jul 30 05:54:41 PM PDT 24 |
18185356 ps |
| T853 |
/workspace/coverage/default/41.lc_ctrl_sec_token_digest.746538039 |
|
|
Jul 30 05:55:27 PM PDT 24 |
Jul 30 05:55:42 PM PDT 24 |
6536615766 ps |
| T854 |
/workspace/coverage/default/3.lc_ctrl_sec_token_mux.1521302432 |
|
|
Jul 30 05:52:56 PM PDT 24 |
Jul 30 05:53:07 PM PDT 24 |
880491300 ps |
| T855 |
/workspace/coverage/default/23.lc_ctrl_prog_failure.1208381412 |
|
|
Jul 30 05:54:27 PM PDT 24 |
Jul 30 05:54:30 PM PDT 24 |
106952565 ps |
| T856 |
/workspace/coverage/default/5.lc_ctrl_sec_mubi.2565304295 |
|
|
Jul 30 05:53:04 PM PDT 24 |
Jul 30 05:53:20 PM PDT 24 |
1302664561 ps |
| T857 |
/workspace/coverage/default/40.lc_ctrl_alert_test.1123766759 |
|
|
Jul 30 05:55:20 PM PDT 24 |
Jul 30 05:55:21 PM PDT 24 |
49863761 ps |
| T858 |
/workspace/coverage/default/8.lc_ctrl_sec_token_mux.1353140082 |
|
|
Jul 30 05:53:25 PM PDT 24 |
Jul 30 05:53:33 PM PDT 24 |
1387047642 ps |
| T859 |
/workspace/coverage/default/40.lc_ctrl_smoke.1996715891 |
|
|
Jul 30 05:55:20 PM PDT 24 |
Jul 30 05:55:32 PM PDT 24 |
455704961 ps |
| T860 |
/workspace/coverage/default/12.lc_ctrl_jtag_access.1179016415 |
|
|
Jul 30 05:53:44 PM PDT 24 |
Jul 30 05:53:52 PM PDT 24 |
2315432841 ps |
| T861 |
/workspace/coverage/default/14.lc_ctrl_state_failure.796139445 |
|
|
Jul 30 05:53:56 PM PDT 24 |
Jul 30 05:54:21 PM PDT 24 |
1954879836 ps |
| T862 |
/workspace/coverage/default/14.lc_ctrl_state_post_trans.685882037 |
|
|
Jul 30 05:53:50 PM PDT 24 |
Jul 30 05:53:54 PM PDT 24 |
280683004 ps |
| T863 |
/workspace/coverage/default/9.lc_ctrl_smoke.1807593790 |
|
|
Jul 30 05:53:24 PM PDT 24 |
Jul 30 05:53:25 PM PDT 24 |
16413350 ps |
| T864 |
/workspace/coverage/default/20.lc_ctrl_errors.379039056 |
|
|
Jul 30 05:54:15 PM PDT 24 |
Jul 30 05:54:27 PM PDT 24 |
1358757931 ps |
| T865 |
/workspace/coverage/default/27.lc_ctrl_jtag_access.1654958720 |
|
|
Jul 30 05:54:38 PM PDT 24 |
Jul 30 05:55:01 PM PDT 24 |
3479925834 ps |
| T866 |
/workspace/coverage/default/43.lc_ctrl_prog_failure.620892795 |
|
|
Jul 30 05:55:31 PM PDT 24 |
Jul 30 05:55:33 PM PDT 24 |
66986628 ps |
| T867 |
/workspace/coverage/default/39.lc_ctrl_security_escalation.594679769 |
|
|
Jul 30 05:55:16 PM PDT 24 |
Jul 30 05:55:26 PM PDT 24 |
297044227 ps |
| T868 |
/workspace/coverage/default/24.lc_ctrl_jtag_access.2448198567 |
|
|
Jul 30 05:54:32 PM PDT 24 |
Jul 30 05:54:49 PM PDT 24 |
688674940 ps |
| T869 |
/workspace/coverage/default/35.lc_ctrl_sec_token_mux.3222937093 |
|
|
Jul 30 05:55:07 PM PDT 24 |
Jul 30 05:55:15 PM PDT 24 |
4518229513 ps |
| T870 |
/workspace/coverage/default/27.lc_ctrl_stress_all.3389062487 |
|
|
Jul 30 05:54:39 PM PDT 24 |
Jul 30 05:55:39 PM PDT 24 |
5282912850 ps |
| T871 |
/workspace/coverage/default/37.lc_ctrl_sec_mubi.2222764470 |
|
|
Jul 30 05:55:13 PM PDT 24 |
Jul 30 05:55:27 PM PDT 24 |
256466068 ps |
| T872 |
/workspace/coverage/default/14.lc_ctrl_alert_test.869592602 |
|
|
Jul 30 05:53:53 PM PDT 24 |
Jul 30 05:53:54 PM PDT 24 |
35602336 ps |
| T873 |
/workspace/coverage/default/43.lc_ctrl_sec_mubi.3288131528 |
|
|
Jul 30 05:55:35 PM PDT 24 |
Jul 30 05:55:47 PM PDT 24 |
265830898 ps |
| T874 |
/workspace/coverage/default/48.lc_ctrl_smoke.137281434 |
|
|
Jul 30 05:55:44 PM PDT 24 |
Jul 30 05:55:47 PM PDT 24 |
193707639 ps |
| T875 |
/workspace/coverage/default/13.lc_ctrl_jtag_state_post_trans.923152973 |
|
|
Jul 30 05:53:47 PM PDT 24 |
Jul 30 05:54:02 PM PDT 24 |
429372321 ps |
| T876 |
/workspace/coverage/default/33.lc_ctrl_sec_token_digest.912130014 |
|
|
Jul 30 05:55:02 PM PDT 24 |
Jul 30 05:55:11 PM PDT 24 |
1324084987 ps |
| T877 |
/workspace/coverage/default/28.lc_ctrl_sec_token_mux.2734334066 |
|
|
Jul 30 05:54:43 PM PDT 24 |
Jul 30 05:54:51 PM PDT 24 |
308258957 ps |
| T878 |
/workspace/coverage/default/34.lc_ctrl_sec_token_mux.3743029374 |
|
|
Jul 30 05:55:03 PM PDT 24 |
Jul 30 05:55:19 PM PDT 24 |
863074786 ps |
| T101 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.181846933 |
|
|
Jul 30 05:51:52 PM PDT 24 |
Jul 30 05:51:54 PM PDT 24 |
235531930 ps |
| T138 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.3528623244 |
|
|
Jul 30 05:52:22 PM PDT 24 |
Jul 30 05:52:25 PM PDT 24 |
77808373 ps |
| T108 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.26467648 |
|
|
Jul 30 05:52:02 PM PDT 24 |
Jul 30 05:52:03 PM PDT 24 |
26900393 ps |
| T116 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.1989055708 |
|
|
Jul 30 05:52:22 PM PDT 24 |
Jul 30 05:52:32 PM PDT 24 |
516508378 ps |
| T136 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.3419665683 |
|
|
Jul 30 05:51:51 PM PDT 24 |
Jul 30 05:51:53 PM PDT 24 |
38851729 ps |
| T109 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.2090030179 |
|
|
Jul 30 05:52:02 PM PDT 24 |
Jul 30 05:52:15 PM PDT 24 |
514303204 ps |
| T135 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.2807673795 |
|
|
Jul 30 05:52:03 PM PDT 24 |
Jul 30 05:52:04 PM PDT 24 |
16948437 ps |
| T195 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.1687531616 |
|
|
Jul 30 05:51:58 PM PDT 24 |
Jul 30 05:51:59 PM PDT 24 |
154235267 ps |
| T879 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.1787534285 |
|
|
Jul 30 05:52:12 PM PDT 24 |
Jul 30 05:52:13 PM PDT 24 |
118771031 ps |
| T102 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2840971801 |
|
|
Jul 30 05:52:01 PM PDT 24 |
Jul 30 05:52:06 PM PDT 24 |
280386358 ps |
| T103 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.2968233125 |
|
|
Jul 30 05:52:15 PM PDT 24 |
Jul 30 05:52:20 PM PDT 24 |
132791409 ps |
| T106 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.849418352 |
|
|
Jul 30 05:52:30 PM PDT 24 |
Jul 30 05:52:33 PM PDT 24 |
541758901 ps |
| T107 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.1695960619 |
|
|
Jul 30 05:52:27 PM PDT 24 |
Jul 30 05:52:29 PM PDT 24 |
30155238 ps |
| T196 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.2068176339 |
|
|
Jul 30 05:52:29 PM PDT 24 |
Jul 30 05:52:30 PM PDT 24 |
24851274 ps |
| T129 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.1919127157 |
|
|
Jul 30 05:52:26 PM PDT 24 |
Jul 30 05:52:28 PM PDT 24 |
246886018 ps |
| T128 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.2181210163 |
|
|
Jul 30 05:52:36 PM PDT 24 |
Jul 30 05:52:38 PM PDT 24 |
47434469 ps |
| T197 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.2492334970 |
|
|
Jul 30 05:52:05 PM PDT 24 |
Jul 30 05:52:07 PM PDT 24 |
50010920 ps |
| T182 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.2412984351 |
|
|
Jul 30 05:52:30 PM PDT 24 |
Jul 30 05:52:31 PM PDT 24 |
43697704 ps |
| T110 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.2130423740 |
|
|
Jul 30 05:52:14 PM PDT 24 |
Jul 30 05:52:17 PM PDT 24 |
81325326 ps |
| T201 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.3816927325 |
|
|
Jul 30 05:52:14 PM PDT 24 |
Jul 30 05:52:15 PM PDT 24 |
69927121 ps |
| T169 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3794040594 |
|
|
Jul 30 05:52:04 PM PDT 24 |
Jul 30 05:52:09 PM PDT 24 |
945358774 ps |
| T183 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.1578180303 |
|
|
Jul 30 05:52:09 PM PDT 24 |
Jul 30 05:52:10 PM PDT 24 |
38316788 ps |
| T198 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.2078583684 |
|
|
Jul 30 05:52:12 PM PDT 24 |
Jul 30 05:52:13 PM PDT 24 |
29211394 ps |
| T111 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.2724592637 |
|
|
Jul 30 05:52:17 PM PDT 24 |
Jul 30 05:52:20 PM PDT 24 |
375752882 ps |
| T880 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.2801957299 |
|
|
Jul 30 05:52:13 PM PDT 24 |
Jul 30 05:52:15 PM PDT 24 |
113753039 ps |
| T119 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.2404205860 |
|
|
Jul 30 05:52:31 PM PDT 24 |
Jul 30 05:52:37 PM PDT 24 |
923197203 ps |
| T150 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.682529882 |
|
|
Jul 30 05:52:28 PM PDT 24 |
Jul 30 05:52:30 PM PDT 24 |
296504677 ps |
| T881 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.1131712133 |
|
|
Jul 30 05:52:21 PM PDT 24 |
Jul 30 05:52:32 PM PDT 24 |
1663122977 ps |
| T882 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.1704355276 |
|
|
Jul 30 05:52:03 PM PDT 24 |
Jul 30 05:52:05 PM PDT 24 |
18421307 ps |
| T883 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.2372316814 |
|
|
Jul 30 05:51:59 PM PDT 24 |
Jul 30 05:52:00 PM PDT 24 |
41208567 ps |
| T884 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.3431093146 |
|
|
Jul 30 05:52:04 PM PDT 24 |
Jul 30 05:52:08 PM PDT 24 |
493633702 ps |
| T199 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.1924510448 |
|
|
Jul 30 05:52:27 PM PDT 24 |
Jul 30 05:52:28 PM PDT 24 |
16489543 ps |
| T137 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.2037880720 |
|
|
Jul 30 05:52:02 PM PDT 24 |
Jul 30 05:52:04 PM PDT 24 |
618740758 ps |
| T885 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3835717196 |
|
|
Jul 30 05:52:22 PM PDT 24 |
Jul 30 05:52:27 PM PDT 24 |
153753488 ps |
| T886 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3932950480 |
|
|
Jul 30 05:52:10 PM PDT 24 |
Jul 30 05:52:12 PM PDT 24 |
91149593 ps |
| T123 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.1501016650 |
|
|
Jul 30 05:52:15 PM PDT 24 |
Jul 30 05:52:19 PM PDT 24 |
286419292 ps |
| T120 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.1384844155 |
|
|
Jul 30 05:52:38 PM PDT 24 |
Jul 30 05:52:42 PM PDT 24 |
123333541 ps |
| T200 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.506093047 |
|
|
Jul 30 05:52:17 PM PDT 24 |
Jul 30 05:52:19 PM PDT 24 |
68810380 ps |
| T887 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.4124138789 |
|
|
Jul 30 05:51:56 PM PDT 24 |
Jul 30 05:52:02 PM PDT 24 |
1039130422 ps |
| T888 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.1761813609 |
|
|
Jul 30 05:52:00 PM PDT 24 |
Jul 30 05:52:01 PM PDT 24 |
21457892 ps |
| T117 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1154131709 |
|
|
Jul 30 05:52:03 PM PDT 24 |
Jul 30 05:52:09 PM PDT 24 |
245885676 ps |
| T889 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.1704081572 |
|
|
Jul 30 05:52:34 PM PDT 24 |
Jul 30 05:52:38 PM PDT 24 |
196339433 ps |
| T151 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.2665756517 |
|
|
Jul 30 05:52:38 PM PDT 24 |
Jul 30 05:52:41 PM PDT 24 |
226809557 ps |
| T125 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.2349301309 |
|
|
Jul 30 05:52:23 PM PDT 24 |
Jul 30 05:52:25 PM PDT 24 |
125279014 ps |
| T890 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.1376287401 |
|
|
Jul 30 05:51:52 PM PDT 24 |
Jul 30 05:52:01 PM PDT 24 |
3318823144 ps |
| T184 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.2299574130 |
|
|
Jul 30 05:52:11 PM PDT 24 |
Jul 30 05:52:12 PM PDT 24 |
41293432 ps |
| T891 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.2899057576 |
|
|
Jul 30 05:51:50 PM PDT 24 |
Jul 30 05:51:53 PM PDT 24 |
80855045 ps |
| T131 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.4229266601 |
|
|
Jul 30 05:51:57 PM PDT 24 |
Jul 30 05:52:02 PM PDT 24 |
208390819 ps |
| T892 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.2728365472 |
|
|
Jul 30 05:51:52 PM PDT 24 |
Jul 30 05:51:53 PM PDT 24 |
230410296 ps |
| T893 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2578366584 |
|
|
Jul 30 05:52:06 PM PDT 24 |
Jul 30 05:52:11 PM PDT 24 |
1833511001 ps |
| T894 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.938985311 |
|
|
Jul 30 05:51:53 PM PDT 24 |
Jul 30 05:51:55 PM PDT 24 |
48713584 ps |
| T895 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.4052504852 |
|
|
Jul 30 05:52:10 PM PDT 24 |
Jul 30 05:52:12 PM PDT 24 |
81741627 ps |
| T896 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.575852045 |
|
|
Jul 30 05:52:28 PM PDT 24 |
Jul 30 05:52:32 PM PDT 24 |
526266171 ps |
| T897 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.1368379634 |
|
|
Jul 30 05:52:07 PM PDT 24 |
Jul 30 05:52:15 PM PDT 24 |
300589176 ps |
| T132 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.2061357731 |
|
|
Jul 30 05:52:34 PM PDT 24 |
Jul 30 05:52:36 PM PDT 24 |
158363378 ps |
| T185 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.4186458137 |
|
|
Jul 30 05:52:34 PM PDT 24 |
Jul 30 05:52:35 PM PDT 24 |
14800065 ps |
| T898 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.420174963 |
|
|
Jul 30 05:51:58 PM PDT 24 |
Jul 30 05:52:00 PM PDT 24 |
103836542 ps |
| T899 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.1542458978 |
|
|
Jul 30 05:51:58 PM PDT 24 |
Jul 30 05:51:59 PM PDT 24 |
39939118 ps |
| T900 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.1425397771 |
|
|
Jul 30 05:52:38 PM PDT 24 |
Jul 30 05:52:39 PM PDT 24 |
96177123 ps |
| T901 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.1295312540 |
|
|
Jul 30 05:52:35 PM PDT 24 |
Jul 30 05:52:36 PM PDT 24 |
31178476 ps |
| T902 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.1583956549 |
|
|
Jul 30 05:51:52 PM PDT 24 |
Jul 30 05:51:54 PM PDT 24 |
138191507 ps |
| T903 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.2789677861 |
|
|
Jul 30 05:52:14 PM PDT 24 |
Jul 30 05:52:27 PM PDT 24 |
558445467 ps |
| T904 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.2942964270 |
|
|
Jul 30 05:52:05 PM PDT 24 |
Jul 30 05:52:16 PM PDT 24 |
437237649 ps |
| T905 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.1380019459 |
|
|
Jul 30 05:52:06 PM PDT 24 |
Jul 30 05:52:07 PM PDT 24 |
50151140 ps |
| T906 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.3351691441 |
|
|
Jul 30 05:51:49 PM PDT 24 |
Jul 30 05:51:59 PM PDT 24 |
963388031 ps |
| T907 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.1211439135 |
|
|
Jul 30 05:52:11 PM PDT 24 |
Jul 30 05:52:12 PM PDT 24 |
47644711 ps |
| T908 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.379225478 |
|
|
Jul 30 05:52:19 PM PDT 24 |
Jul 30 05:52:20 PM PDT 24 |
16452909 ps |
| T909 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.1425697629 |
|
|
Jul 30 05:52:10 PM PDT 24 |
Jul 30 05:52:12 PM PDT 24 |
40338177 ps |
| T910 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.3155110524 |
|
|
Jul 30 05:52:01 PM PDT 24 |
Jul 30 05:52:31 PM PDT 24 |
1523164906 ps |
| T911 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.434938571 |
|
|
Jul 30 05:52:03 PM PDT 24 |
Jul 30 05:52:04 PM PDT 24 |
37543987 ps |
| T912 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.287092661 |
|
|
Jul 30 05:52:26 PM PDT 24 |
Jul 30 05:52:30 PM PDT 24 |
1854809696 ps |
| T913 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.3091698001 |
|
|
Jul 30 05:52:03 PM PDT 24 |
Jul 30 05:52:05 PM PDT 24 |
175098720 ps |
| T914 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.1348005371 |
|
|
Jul 30 05:51:53 PM PDT 24 |
Jul 30 05:51:54 PM PDT 24 |
25250651 ps |
| T915 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.1893844218 |
|
|
Jul 30 05:52:34 PM PDT 24 |
Jul 30 05:52:35 PM PDT 24 |
18997759 ps |
| T916 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.3025924791 |
|
|
Jul 30 05:52:33 PM PDT 24 |
Jul 30 05:52:35 PM PDT 24 |
83252366 ps |
| T917 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.1356895246 |
|
|
Jul 30 05:52:21 PM PDT 24 |
Jul 30 05:52:27 PM PDT 24 |
1336111425 ps |
| T133 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.3272686765 |
|
|
Jul 30 05:52:21 PM PDT 24 |
Jul 30 05:52:23 PM PDT 24 |
115448356 ps |
| T918 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.1409755554 |
|
|
Jul 30 05:51:55 PM PDT 24 |
Jul 30 05:51:56 PM PDT 24 |
33927422 ps |
| T919 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.602515455 |
|
|
Jul 30 05:52:29 PM PDT 24 |
Jul 30 05:52:31 PM PDT 24 |
25945433 ps |
| T920 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.903140158 |
|
|
Jul 30 05:52:14 PM PDT 24 |
Jul 30 05:52:17 PM PDT 24 |
119516036 ps |
| T186 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.3247503022 |
|
|
Jul 30 05:52:09 PM PDT 24 |
Jul 30 05:52:11 PM PDT 24 |
41117483 ps |
| T921 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.2551199311 |
|
|
Jul 30 05:52:10 PM PDT 24 |
Jul 30 05:52:12 PM PDT 24 |
27572998 ps |
| T130 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.3645848890 |
|
|
Jul 30 05:52:12 PM PDT 24 |
Jul 30 05:52:15 PM PDT 24 |
77880200 ps |
| T922 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.3466956356 |
|
|
Jul 30 05:51:55 PM PDT 24 |
Jul 30 05:51:59 PM PDT 24 |
144623103 ps |
| T923 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.272517439 |
|
|
Jul 30 05:51:49 PM PDT 24 |
Jul 30 05:51:50 PM PDT 24 |
416602708 ps |
| T924 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.4058382556 |
|
|
Jul 30 05:52:18 PM PDT 24 |
Jul 30 05:52:19 PM PDT 24 |
19971470 ps |
| T925 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.3989165729 |
|
|
Jul 30 05:52:07 PM PDT 24 |
Jul 30 05:52:09 PM PDT 24 |
120690747 ps |
| T121 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.1785655273 |
|
|
Jul 30 05:52:29 PM PDT 24 |
Jul 30 05:52:32 PM PDT 24 |
136011280 ps |
| T926 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.4040384660 |
|
|
Jul 30 05:52:21 PM PDT 24 |
Jul 30 05:52:22 PM PDT 24 |
69893097 ps |
| T113 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.517332692 |
|
|
Jul 30 05:52:27 PM PDT 24 |
Jul 30 05:52:29 PM PDT 24 |
48232687 ps |
| T187 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.1236284948 |
|
|
Jul 30 05:52:01 PM PDT 24 |
Jul 30 05:52:03 PM PDT 24 |
40364671 ps |
| T927 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.2939981513 |
|
|
Jul 30 05:51:55 PM PDT 24 |
Jul 30 05:52:04 PM PDT 24 |
2621065805 ps |
| T112 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.2896079976 |
|
|
Jul 30 05:52:07 PM PDT 24 |
Jul 30 05:52:09 PM PDT 24 |
1006935479 ps |
| T928 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.2125155322 |
|
|
Jul 30 05:51:48 PM PDT 24 |
Jul 30 05:51:54 PM PDT 24 |
557898651 ps |
| T929 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.1361091190 |
|
|
Jul 30 05:52:07 PM PDT 24 |
Jul 30 05:52:08 PM PDT 24 |
33827465 ps |
| T930 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.3538458540 |
|
|
Jul 30 05:52:22 PM PDT 24 |
Jul 30 05:52:23 PM PDT 24 |
60874688 ps |
| T931 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.1902011820 |
|
|
Jul 30 05:52:28 PM PDT 24 |
Jul 30 05:52:30 PM PDT 24 |
128146889 ps |
| T188 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.2001063462 |
|
|
Jul 30 05:52:05 PM PDT 24 |
Jul 30 05:52:06 PM PDT 24 |
66550600 ps |
| T932 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.1553561812 |
|
|
Jul 30 05:52:15 PM PDT 24 |
Jul 30 05:52:16 PM PDT 24 |
36799520 ps |
| T933 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.1938371511 |
|
|
Jul 30 05:51:52 PM PDT 24 |
Jul 30 05:51:55 PM PDT 24 |
418868729 ps |
| T934 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.2459994839 |
|
|
Jul 30 05:52:22 PM PDT 24 |
Jul 30 05:52:25 PM PDT 24 |
129804375 ps |
| T189 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.2018310681 |
|
|
Jul 30 05:51:56 PM PDT 24 |
Jul 30 05:51:57 PM PDT 24 |
13029053 ps |
| T935 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.3188375602 |
|
|
Jul 30 05:52:08 PM PDT 24 |
Jul 30 05:52:10 PM PDT 24 |
214303491 ps |
| T126 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.3678486914 |
|
|
Jul 30 05:52:40 PM PDT 24 |
Jul 30 05:52:42 PM PDT 24 |
98664015 ps |
| T936 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2863551373 |
|
|
Jul 30 05:51:48 PM PDT 24 |
Jul 30 05:51:49 PM PDT 24 |
39317722 ps |
| T937 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.878192722 |
|
|
Jul 30 05:52:25 PM PDT 24 |
Jul 30 05:52:26 PM PDT 24 |
18053576 ps |
| T127 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.218030070 |
|
|
Jul 30 05:52:27 PM PDT 24 |
Jul 30 05:52:30 PM PDT 24 |
60705892 ps |
| T938 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.3651539671 |
|
|
Jul 30 05:52:26 PM PDT 24 |
Jul 30 05:52:27 PM PDT 24 |
53857296 ps |
| T939 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.608935725 |
|
|
Jul 30 05:52:10 PM PDT 24 |
Jul 30 05:52:12 PM PDT 24 |
95096290 ps |
| T940 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.182323478 |
|
|
Jul 30 05:51:48 PM PDT 24 |
Jul 30 05:51:50 PM PDT 24 |
188394074 ps |
| T941 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.724939736 |
|
|
Jul 30 05:52:27 PM PDT 24 |
Jul 30 05:52:29 PM PDT 24 |
557244535 ps |
| T942 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.3955316284 |
|
|
Jul 30 05:52:29 PM PDT 24 |
Jul 30 05:52:31 PM PDT 24 |
85905504 ps |
| T114 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.3719125330 |
|
|
Jul 30 05:52:03 PM PDT 24 |
Jul 30 05:52:05 PM PDT 24 |
191694700 ps |
| T943 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.3884809516 |
|
|
Jul 30 05:52:16 PM PDT 24 |
Jul 30 05:52:22 PM PDT 24 |
228770661 ps |
| T944 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.1650008045 |
|
|
Jul 30 05:52:09 PM PDT 24 |
Jul 30 05:52:24 PM PDT 24 |
2618937781 ps |
| T945 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.1774676300 |
|
|
Jul 30 05:52:08 PM PDT 24 |
Jul 30 05:52:09 PM PDT 24 |
102421037 ps |
| T946 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.545457400 |
|
|
Jul 30 05:52:35 PM PDT 24 |
Jul 30 05:52:36 PM PDT 24 |
18688224 ps |
| T190 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.4020871701 |
|
|
Jul 30 05:52:25 PM PDT 24 |
Jul 30 05:52:26 PM PDT 24 |
35584724 ps |
| T947 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.1742723182 |
|
|
Jul 30 05:52:33 PM PDT 24 |
Jul 30 05:52:34 PM PDT 24 |
80423658 ps |
| T948 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.3816409995 |
|
|
Jul 30 05:51:54 PM PDT 24 |
Jul 30 05:51:55 PM PDT 24 |
20988628 ps |
| T949 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.1799089888 |
|
|
Jul 30 05:52:27 PM PDT 24 |
Jul 30 05:52:29 PM PDT 24 |
46384329 ps |
| T118 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.3234436973 |
|
|
Jul 30 05:52:23 PM PDT 24 |
Jul 30 05:52:26 PM PDT 24 |
175588866 ps |
| T950 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.3504680039 |
|
|
Jul 30 05:51:55 PM PDT 24 |
Jul 30 05:51:56 PM PDT 24 |
49396088 ps |
| T951 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.701500325 |
|
|
Jul 30 05:52:32 PM PDT 24 |
Jul 30 05:52:34 PM PDT 24 |
14677625 ps |
| T952 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.1747753966 |
|
|
Jul 30 05:52:23 PM PDT 24 |
Jul 30 05:52:26 PM PDT 24 |
126383608 ps |
| T191 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.4021300995 |
|
|
Jul 30 05:52:31 PM PDT 24 |
Jul 30 05:52:33 PM PDT 24 |
11908621 ps |
| T953 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.1303271834 |
|
|
Jul 30 05:52:01 PM PDT 24 |
Jul 30 05:52:04 PM PDT 24 |
679522205 ps |
| T954 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3025815267 |
|
|
Jul 30 05:51:50 PM PDT 24 |
Jul 30 05:51:52 PM PDT 24 |
287433069 ps |
| T955 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.3481451459 |
|
|
Jul 30 05:51:59 PM PDT 24 |
Jul 30 05:52:01 PM PDT 24 |
44503877 ps |
| T194 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.2837566332 |
|
|
Jul 30 05:52:02 PM PDT 24 |
Jul 30 05:52:04 PM PDT 24 |
34397060 ps |
| T956 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.1830502597 |
|
|
Jul 30 05:52:08 PM PDT 24 |
Jul 30 05:52:09 PM PDT 24 |
54874498 ps |
| T192 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.2328849737 |
|
|
Jul 30 05:51:52 PM PDT 24 |
Jul 30 05:51:53 PM PDT 24 |
361243767 ps |
| T957 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.2894562364 |
|
|
Jul 30 05:52:33 PM PDT 24 |
Jul 30 05:52:35 PM PDT 24 |
232400789 ps |
| T958 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.1330018443 |
|
|
Jul 30 05:52:05 PM PDT 24 |
Jul 30 05:52:08 PM PDT 24 |
133257955 ps |
| T124 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.609741208 |
|
|
Jul 30 05:52:34 PM PDT 24 |
Jul 30 05:52:36 PM PDT 24 |
130944789 ps |
| T193 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.3513654114 |
|
|
Jul 30 05:51:52 PM PDT 24 |
Jul 30 05:51:53 PM PDT 24 |
34753187 ps |
| T134 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.1646878464 |
|
|
Jul 30 05:52:14 PM PDT 24 |
Jul 30 05:52:17 PM PDT 24 |
55785346 ps |
| T959 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.4029378215 |
|
|
Jul 30 05:52:34 PM PDT 24 |
Jul 30 05:52:36 PM PDT 24 |
221114855 ps |
| T960 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.1708110972 |
|
|
Jul 30 05:52:29 PM PDT 24 |
Jul 30 05:52:44 PM PDT 24 |
580404255 ps |
| T961 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.209684323 |
|
|
Jul 30 05:52:41 PM PDT 24 |
Jul 30 05:52:43 PM PDT 24 |
161254088 ps |
| T962 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.1068509997 |
|
|
Jul 30 05:52:28 PM PDT 24 |
Jul 30 05:52:30 PM PDT 24 |
35442438 ps |
| T963 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.1079090437 |
|
|
Jul 30 05:52:16 PM PDT 24 |
Jul 30 05:52:18 PM PDT 24 |
19148171 ps |
| T964 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.731192098 |
|
|
Jul 30 05:52:07 PM PDT 24 |
Jul 30 05:52:17 PM PDT 24 |
1256329448 ps |
| T965 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.1606612875 |
|
|
Jul 30 05:52:08 PM PDT 24 |
Jul 30 05:52:09 PM PDT 24 |
68451907 ps |
| T966 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.2944151012 |
|
|
Jul 30 05:52:21 PM PDT 24 |
Jul 30 05:52:22 PM PDT 24 |
14813670 ps |
| T122 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.797108666 |
|
|
Jul 30 05:52:32 PM PDT 24 |
Jul 30 05:52:34 PM PDT 24 |
116043008 ps |
| T967 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.2951580975 |
|
|
Jul 30 05:52:36 PM PDT 24 |
Jul 30 05:52:37 PM PDT 24 |
32440645 ps |
| T968 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.269144827 |
|
|
Jul 30 05:52:38 PM PDT 24 |
Jul 30 05:52:39 PM PDT 24 |
25012218 ps |
| T969 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.1415456665 |
|
|
Jul 30 05:52:31 PM PDT 24 |
Jul 30 05:52:32 PM PDT 24 |
23045778 ps |
| T970 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.1989480567 |
|
|
Jul 30 05:52:21 PM PDT 24 |
Jul 30 05:52:23 PM PDT 24 |
228021682 ps |
| T971 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.564045101 |
|
|
Jul 30 05:52:36 PM PDT 24 |
Jul 30 05:52:37 PM PDT 24 |
29614541 ps |
| T972 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.737415337 |
|
|
Jul 30 05:52:25 PM PDT 24 |
Jul 30 05:52:30 PM PDT 24 |
331421534 ps |
| T973 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.3260566436 |
|
|
Jul 30 05:52:23 PM PDT 24 |
Jul 30 05:52:24 PM PDT 24 |
174996977 ps |
| T974 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.3845730491 |
|
|
Jul 30 05:52:12 PM PDT 24 |
Jul 30 05:52:14 PM PDT 24 |
271396233 ps |
| T975 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.1499594759 |
|
|
Jul 30 05:52:01 PM PDT 24 |
Jul 30 05:52:04 PM PDT 24 |
132232427 ps |
| T976 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.2833950877 |
|
|
Jul 30 05:52:29 PM PDT 24 |
Jul 30 05:52:31 PM PDT 24 |
74782322 ps |
| T977 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.3598730393 |
|
|
Jul 30 05:52:35 PM PDT 24 |
Jul 30 05:52:36 PM PDT 24 |
19711325 ps |
| T978 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.1967070095 |
|
|
Jul 30 05:52:29 PM PDT 24 |
Jul 30 05:52:30 PM PDT 24 |
77293788 ps |
| T979 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.1413321570 |
|
|
Jul 30 05:52:23 PM PDT 24 |
Jul 30 05:52:24 PM PDT 24 |
22274267 ps |
| T980 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.3952418292 |
|
|
Jul 30 05:51:55 PM PDT 24 |
Jul 30 05:52:01 PM PDT 24 |
585052430 ps |
| T981 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.3796762753 |
|
|
Jul 30 05:51:53 PM PDT 24 |
Jul 30 05:51:55 PM PDT 24 |
53226388 ps |
| T982 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.3801424857 |
|
|
Jul 30 05:52:17 PM PDT 24 |
Jul 30 05:52:19 PM PDT 24 |
196825102 ps |
| T983 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.995757765 |
|
|
Jul 30 05:51:59 PM PDT 24 |
Jul 30 05:52:00 PM PDT 24 |
208498300 ps |
| T984 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.410243534 |
|
|
Jul 30 05:52:19 PM PDT 24 |
Jul 30 05:52:34 PM PDT 24 |
1515384556 ps |
| T985 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.866257070 |
|
|
Jul 30 05:51:58 PM PDT 24 |
Jul 30 05:51:59 PM PDT 24 |
17849713 ps |
| T986 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.1934465386 |
|
|
Jul 30 05:52:24 PM PDT 24 |
Jul 30 05:52:27 PM PDT 24 |
1090730850 ps |
| T987 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.2172057992 |
|
|
Jul 30 05:51:52 PM PDT 24 |
Jul 30 05:51:54 PM PDT 24 |
26356663 ps |
| T988 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.1667239845 |
|
|
Jul 30 05:52:12 PM PDT 24 |
Jul 30 05:52:21 PM PDT 24 |
599362299 ps |
| T989 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.1908234229 |
|
|
Jul 30 05:52:31 PM PDT 24 |
Jul 30 05:52:34 PM PDT 24 |
367021892 ps |
| T990 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1683266563 |
|
|
Jul 30 05:52:06 PM PDT 24 |
Jul 30 05:52:08 PM PDT 24 |
48163534 ps |
| T991 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.1627218574 |
|
|
Jul 30 05:52:19 PM PDT 24 |
Jul 30 05:52:22 PM PDT 24 |
1206624536 ps |
| T992 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.3257394234 |
|
|
Jul 30 05:52:14 PM PDT 24 |
Jul 30 05:52:17 PM PDT 24 |
320369392 ps |
| T993 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.3351878340 |
|
|
Jul 30 05:52:39 PM PDT 24 |
Jul 30 05:52:40 PM PDT 24 |
47150036 ps |
| T994 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.2242801318 |
|
|
Jul 30 05:52:22 PM PDT 24 |
Jul 30 05:52:24 PM PDT 24 |
58171718 ps |
| T995 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.3159156456 |
|
|
Jul 30 05:52:20 PM PDT 24 |
Jul 30 05:52:21 PM PDT 24 |
28106482 ps |
| T996 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.2714530214 |
|
|
Jul 30 05:52:36 PM PDT 24 |
Jul 30 05:52:37 PM PDT 24 |
174349741 ps |
| T997 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.2101426555 |
|
|
Jul 30 05:51:47 PM PDT 24 |
Jul 30 05:51:52 PM PDT 24 |
672411527 ps |
| T998 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3579227494 |
|
|
Jul 30 05:52:21 PM PDT 24 |
Jul 30 05:52:24 PM PDT 24 |
497348978 ps |
| T115 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.3604576843 |
|
|
Jul 30 05:52:29 PM PDT 24 |
Jul 30 05:52:32 PM PDT 24 |
78469038 ps |
| T999 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.3370844673 |
|
|
Jul 30 05:52:24 PM PDT 24 |
Jul 30 05:52:25 PM PDT 24 |
47918415 ps |
| T1000 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.3298618351 |
|
|
Jul 30 05:52:07 PM PDT 24 |
Jul 30 05:52:08 PM PDT 24 |
14315074 ps |