| T814 |
/workspace/coverage/default/22.lc_ctrl_volatile_unlock_smoke.707330913 |
|
|
Jul 31 05:10:56 PM PDT 24 |
Jul 31 05:10:57 PM PDT 24 |
13231866 ps |
| T815 |
/workspace/coverage/default/9.lc_ctrl_jtag_state_failure.590564627 |
|
|
Jul 31 05:10:15 PM PDT 24 |
Jul 31 05:10:47 PM PDT 24 |
3234774846 ps |
| T816 |
/workspace/coverage/default/1.lc_ctrl_errors.2083587676 |
|
|
Jul 31 05:09:52 PM PDT 24 |
Jul 31 05:10:10 PM PDT 24 |
982980601 ps |
| T817 |
/workspace/coverage/default/10.lc_ctrl_state_failure.23513003 |
|
|
Jul 31 05:10:24 PM PDT 24 |
Jul 31 05:10:49 PM PDT 24 |
305408210 ps |
| T818 |
/workspace/coverage/default/44.lc_ctrl_smoke.3326600221 |
|
|
Jul 31 05:11:29 PM PDT 24 |
Jul 31 05:11:31 PM PDT 24 |
422952572 ps |
| T110 |
/workspace/coverage/default/7.lc_ctrl_stress_all_with_rand_reset.1051339268 |
|
|
Jul 31 05:10:04 PM PDT 24 |
Jul 31 05:41:04 PM PDT 24 |
980911257374 ps |
| T819 |
/workspace/coverage/default/11.lc_ctrl_errors.3555547887 |
|
|
Jul 31 05:10:11 PM PDT 24 |
Jul 31 05:10:22 PM PDT 24 |
1029514298 ps |
| T211 |
/workspace/coverage/default/2.lc_ctrl_claim_transition_if.3752617796 |
|
|
Jul 31 05:09:46 PM PDT 24 |
Jul 31 05:09:47 PM PDT 24 |
59156477 ps |
| T820 |
/workspace/coverage/default/39.lc_ctrl_errors.1910614396 |
|
|
Jul 31 05:11:40 PM PDT 24 |
Jul 31 05:11:50 PM PDT 24 |
893799936 ps |
| T821 |
/workspace/coverage/default/24.lc_ctrl_stress_all.4107211503 |
|
|
Jul 31 05:11:15 PM PDT 24 |
Jul 31 05:14:59 PM PDT 24 |
12241171417 ps |
| T822 |
/workspace/coverage/default/9.lc_ctrl_state_post_trans.1682711039 |
|
|
Jul 31 05:10:05 PM PDT 24 |
Jul 31 05:10:10 PM PDT 24 |
74761507 ps |
| T823 |
/workspace/coverage/default/7.lc_ctrl_jtag_smoke.4014823588 |
|
|
Jul 31 05:10:07 PM PDT 24 |
Jul 31 05:10:10 PM PDT 24 |
744227317 ps |
| T824 |
/workspace/coverage/default/44.lc_ctrl_state_post_trans.1288131545 |
|
|
Jul 31 05:11:25 PM PDT 24 |
Jul 31 05:11:34 PM PDT 24 |
333824187 ps |
| T825 |
/workspace/coverage/default/45.lc_ctrl_smoke.3566578415 |
|
|
Jul 31 05:11:34 PM PDT 24 |
Jul 31 05:11:38 PM PDT 24 |
83430246 ps |
| T826 |
/workspace/coverage/default/18.lc_ctrl_state_failure.3677853798 |
|
|
Jul 31 05:10:39 PM PDT 24 |
Jul 31 05:11:02 PM PDT 24 |
259065909 ps |
| T827 |
/workspace/coverage/default/2.lc_ctrl_state_post_trans.1683382045 |
|
|
Jul 31 05:09:49 PM PDT 24 |
Jul 31 05:09:57 PM PDT 24 |
341860891 ps |
| T828 |
/workspace/coverage/default/23.lc_ctrl_jtag_access.2305128208 |
|
|
Jul 31 05:10:58 PM PDT 24 |
Jul 31 05:11:00 PM PDT 24 |
37764739 ps |
| T829 |
/workspace/coverage/default/8.lc_ctrl_jtag_prog_failure.279806794 |
|
|
Jul 31 05:10:13 PM PDT 24 |
Jul 31 05:10:19 PM PDT 24 |
1103798554 ps |
| T830 |
/workspace/coverage/default/44.lc_ctrl_prog_failure.3204505358 |
|
|
Jul 31 05:11:37 PM PDT 24 |
Jul 31 05:11:41 PM PDT 24 |
94957702 ps |
| T831 |
/workspace/coverage/default/43.lc_ctrl_volatile_unlock_smoke.1502550724 |
|
|
Jul 31 05:11:33 PM PDT 24 |
Jul 31 05:11:33 PM PDT 24 |
17182537 ps |
| T832 |
/workspace/coverage/default/23.lc_ctrl_smoke.3446496879 |
|
|
Jul 31 05:10:51 PM PDT 24 |
Jul 31 05:10:52 PM PDT 24 |
16597934 ps |
| T833 |
/workspace/coverage/default/10.lc_ctrl_prog_failure.3330109704 |
|
|
Jul 31 05:10:16 PM PDT 24 |
Jul 31 05:10:18 PM PDT 24 |
67024223 ps |
| T834 |
/workspace/coverage/default/13.lc_ctrl_jtag_state_failure.2947761550 |
|
|
Jul 31 05:10:19 PM PDT 24 |
Jul 31 05:11:28 PM PDT 24 |
1584973576 ps |
| T835 |
/workspace/coverage/default/9.lc_ctrl_jtag_state_post_trans.505719413 |
|
|
Jul 31 05:10:06 PM PDT 24 |
Jul 31 05:10:22 PM PDT 24 |
1330206581 ps |
| T836 |
/workspace/coverage/default/8.lc_ctrl_sec_token_mux.2655324108 |
|
|
Jul 31 05:10:07 PM PDT 24 |
Jul 31 05:10:19 PM PDT 24 |
306936906 ps |
| T837 |
/workspace/coverage/default/32.lc_ctrl_stress_all_with_rand_reset.2662125192 |
|
|
Jul 31 05:11:07 PM PDT 24 |
Jul 31 05:18:46 PM PDT 24 |
22535784688 ps |
| T838 |
/workspace/coverage/default/17.lc_ctrl_smoke.1187789186 |
|
|
Jul 31 05:10:28 PM PDT 24 |
Jul 31 05:10:30 PM PDT 24 |
41454777 ps |
| T839 |
/workspace/coverage/default/29.lc_ctrl_security_escalation.891122424 |
|
|
Jul 31 05:11:04 PM PDT 24 |
Jul 31 05:11:13 PM PDT 24 |
1590412548 ps |
| T840 |
/workspace/coverage/default/3.lc_ctrl_state_failure.2413395596 |
|
|
Jul 31 05:09:57 PM PDT 24 |
Jul 31 05:10:16 PM PDT 24 |
289912719 ps |
| T841 |
/workspace/coverage/default/37.lc_ctrl_security_escalation.14144546 |
|
|
Jul 31 05:11:13 PM PDT 24 |
Jul 31 05:11:26 PM PDT 24 |
613779939 ps |
| T842 |
/workspace/coverage/default/4.lc_ctrl_smoke.4185213379 |
|
|
Jul 31 05:09:52 PM PDT 24 |
Jul 31 05:09:55 PM PDT 24 |
73079218 ps |
| T843 |
/workspace/coverage/default/14.lc_ctrl_jtag_state_post_trans.2204354110 |
|
|
Jul 31 05:10:24 PM PDT 24 |
Jul 31 05:10:46 PM PDT 24 |
1947332755 ps |
| T844 |
/workspace/coverage/default/18.lc_ctrl_sec_token_digest.2481342416 |
|
|
Jul 31 05:10:51 PM PDT 24 |
Jul 31 05:11:06 PM PDT 24 |
477345118 ps |
| T845 |
/workspace/coverage/default/5.lc_ctrl_alert_test.1907490439 |
|
|
Jul 31 05:10:00 PM PDT 24 |
Jul 31 05:10:01 PM PDT 24 |
56878744 ps |
| T846 |
/workspace/coverage/default/46.lc_ctrl_stress_all.386477079 |
|
|
Jul 31 05:11:41 PM PDT 24 |
Jul 31 05:12:14 PM PDT 24 |
3572920167 ps |
| T847 |
/workspace/coverage/default/2.lc_ctrl_prog_failure.1152926212 |
|
|
Jul 31 05:09:45 PM PDT 24 |
Jul 31 05:09:46 PM PDT 24 |
78220608 ps |
| T848 |
/workspace/coverage/default/5.lc_ctrl_sec_mubi.2833698389 |
|
|
Jul 31 05:10:04 PM PDT 24 |
Jul 31 05:10:18 PM PDT 24 |
2020357607 ps |
| T849 |
/workspace/coverage/default/37.lc_ctrl_sec_token_digest.3349714010 |
|
|
Jul 31 05:11:17 PM PDT 24 |
Jul 31 05:11:33 PM PDT 24 |
2959148061 ps |
| T850 |
/workspace/coverage/default/23.lc_ctrl_state_post_trans.2245983742 |
|
|
Jul 31 05:10:52 PM PDT 24 |
Jul 31 05:10:55 PM PDT 24 |
85341219 ps |
| T851 |
/workspace/coverage/default/7.lc_ctrl_stress_all.619830125 |
|
|
Jul 31 05:10:06 PM PDT 24 |
Jul 31 05:11:10 PM PDT 24 |
3322251498 ps |
| T852 |
/workspace/coverage/default/19.lc_ctrl_jtag_state_post_trans.713842242 |
|
|
Jul 31 05:10:53 PM PDT 24 |
Jul 31 05:11:10 PM PDT 24 |
729332431 ps |
| T853 |
/workspace/coverage/default/2.lc_ctrl_jtag_smoke.2083931232 |
|
|
Jul 31 05:09:59 PM PDT 24 |
Jul 31 05:10:03 PM PDT 24 |
236453030 ps |
| T854 |
/workspace/coverage/default/26.lc_ctrl_state_post_trans.1085379552 |
|
|
Jul 31 05:11:07 PM PDT 24 |
Jul 31 05:11:15 PM PDT 24 |
160783643 ps |
| T855 |
/workspace/coverage/default/2.lc_ctrl_jtag_state_post_trans.2155608210 |
|
|
Jul 31 05:09:44 PM PDT 24 |
Jul 31 05:09:59 PM PDT 24 |
465981382 ps |
| T856 |
/workspace/coverage/default/38.lc_ctrl_alert_test.1791467347 |
|
|
Jul 31 05:11:35 PM PDT 24 |
Jul 31 05:11:36 PM PDT 24 |
36924637 ps |
| T857 |
/workspace/coverage/default/41.lc_ctrl_state_failure.3173411719 |
|
|
Jul 31 05:11:34 PM PDT 24 |
Jul 31 05:12:00 PM PDT 24 |
253215923 ps |
| T858 |
/workspace/coverage/default/30.lc_ctrl_prog_failure.2123833638 |
|
|
Jul 31 05:11:15 PM PDT 24 |
Jul 31 05:11:16 PM PDT 24 |
65492140 ps |
| T859 |
/workspace/coverage/default/15.lc_ctrl_sec_token_digest.850904427 |
|
|
Jul 31 05:10:30 PM PDT 24 |
Jul 31 05:10:44 PM PDT 24 |
1221841671 ps |
| T860 |
/workspace/coverage/default/5.lc_ctrl_volatile_unlock_smoke.2664480419 |
|
|
Jul 31 05:09:58 PM PDT 24 |
Jul 31 05:09:59 PM PDT 24 |
13779949 ps |
| T861 |
/workspace/coverage/default/26.lc_ctrl_alert_test.2993158186 |
|
|
Jul 31 05:10:55 PM PDT 24 |
Jul 31 05:10:56 PM PDT 24 |
242083148 ps |
| T862 |
/workspace/coverage/default/16.lc_ctrl_stress_all.1906656095 |
|
|
Jul 31 05:10:51 PM PDT 24 |
Jul 31 05:12:33 PM PDT 24 |
11555311545 ps |
| T863 |
/workspace/coverage/default/27.lc_ctrl_sec_mubi.4205209908 |
|
|
Jul 31 05:11:07 PM PDT 24 |
Jul 31 05:11:26 PM PDT 24 |
1003856845 ps |
| T864 |
/workspace/coverage/default/3.lc_ctrl_security_escalation.2846349020 |
|
|
Jul 31 05:09:49 PM PDT 24 |
Jul 31 05:09:58 PM PDT 24 |
359889164 ps |
| T865 |
/workspace/coverage/default/3.lc_ctrl_sec_token_mux.3308426575 |
|
|
Jul 31 05:10:02 PM PDT 24 |
Jul 31 05:10:14 PM PDT 24 |
1313579414 ps |
| T866 |
/workspace/coverage/default/24.lc_ctrl_sec_token_digest.2917333901 |
|
|
Jul 31 05:14:04 PM PDT 24 |
Jul 31 05:14:13 PM PDT 24 |
1148190038 ps |
| T867 |
/workspace/coverage/default/6.lc_ctrl_prog_failure.731297519 |
|
|
Jul 31 05:10:04 PM PDT 24 |
Jul 31 05:10:06 PM PDT 24 |
32805953 ps |
| T868 |
/workspace/coverage/default/20.lc_ctrl_state_post_trans.3900343472 |
|
|
Jul 31 05:11:00 PM PDT 24 |
Jul 31 05:11:07 PM PDT 24 |
66329111 ps |
| T869 |
/workspace/coverage/default/33.lc_ctrl_smoke.1550997761 |
|
|
Jul 31 05:11:19 PM PDT 24 |
Jul 31 05:11:22 PM PDT 24 |
365274977 ps |
| T870 |
/workspace/coverage/default/0.lc_ctrl_jtag_smoke.731373622 |
|
|
Jul 31 05:09:44 PM PDT 24 |
Jul 31 05:09:47 PM PDT 24 |
618006107 ps |
| T871 |
/workspace/coverage/default/5.lc_ctrl_prog_failure.2012578594 |
|
|
Jul 31 05:10:03 PM PDT 24 |
Jul 31 05:10:06 PM PDT 24 |
112249337 ps |
| T872 |
/workspace/coverage/default/7.lc_ctrl_regwen_during_op.1834375553 |
|
|
Jul 31 05:10:01 PM PDT 24 |
Jul 31 05:10:21 PM PDT 24 |
1338134846 ps |
| T873 |
/workspace/coverage/default/30.lc_ctrl_security_escalation.3295965137 |
|
|
Jul 31 05:11:04 PM PDT 24 |
Jul 31 05:11:13 PM PDT 24 |
427166881 ps |
| T874 |
/workspace/coverage/default/4.lc_ctrl_jtag_state_failure.3728323073 |
|
|
Jul 31 05:10:02 PM PDT 24 |
Jul 31 05:10:49 PM PDT 24 |
1793548381 ps |
| T875 |
/workspace/coverage/default/26.lc_ctrl_stress_all.2695940173 |
|
|
Jul 31 05:11:07 PM PDT 24 |
Jul 31 05:17:38 PM PDT 24 |
11774989419 ps |
| T876 |
/workspace/coverage/default/16.lc_ctrl_jtag_prog_failure.483359805 |
|
|
Jul 31 05:10:42 PM PDT 24 |
Jul 31 05:10:47 PM PDT 24 |
586077765 ps |
| T877 |
/workspace/coverage/default/28.lc_ctrl_errors.2122451475 |
|
|
Jul 31 05:11:16 PM PDT 24 |
Jul 31 05:11:32 PM PDT 24 |
1592920466 ps |
| T878 |
/workspace/coverage/default/44.lc_ctrl_security_escalation.1637722498 |
|
|
Jul 31 05:11:41 PM PDT 24 |
Jul 31 05:11:50 PM PDT 24 |
420091504 ps |
| T879 |
/workspace/coverage/default/19.lc_ctrl_smoke.4142226180 |
|
|
Jul 31 05:10:52 PM PDT 24 |
Jul 31 05:10:54 PM PDT 24 |
84100819 ps |
| T880 |
/workspace/coverage/default/45.lc_ctrl_stress_all.554359544 |
|
|
Jul 31 05:11:46 PM PDT 24 |
Jul 31 05:14:10 PM PDT 24 |
3559408144 ps |
| T881 |
/workspace/coverage/default/11.lc_ctrl_stress_all.1243688057 |
|
|
Jul 31 05:10:33 PM PDT 24 |
Jul 31 05:13:44 PM PDT 24 |
18409155778 ps |
| T882 |
/workspace/coverage/default/1.lc_ctrl_state_post_trans.112946380 |
|
|
Jul 31 05:09:52 PM PDT 24 |
Jul 31 05:09:58 PM PDT 24 |
233543572 ps |
| T121 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.36375506 |
|
|
Jul 31 05:04:26 PM PDT 24 |
Jul 31 05:04:28 PM PDT 24 |
587760419 ps |
| T111 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.720823873 |
|
|
Jul 31 05:04:18 PM PDT 24 |
Jul 31 05:04:21 PM PDT 24 |
208443427 ps |
| T122 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.4073203140 |
|
|
Jul 31 05:04:30 PM PDT 24 |
Jul 31 05:04:32 PM PDT 24 |
108813295 ps |
| T144 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.3352623170 |
|
|
Jul 31 05:04:08 PM PDT 24 |
Jul 31 05:04:09 PM PDT 24 |
127120490 ps |
| T883 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.358489668 |
|
|
Jul 31 05:04:26 PM PDT 24 |
Jul 31 05:04:27 PM PDT 24 |
27187299 ps |
| T107 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.3827854260 |
|
|
Jul 31 05:04:19 PM PDT 24 |
Jul 31 05:04:21 PM PDT 24 |
91647704 ps |
| T145 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.2311125920 |
|
|
Jul 31 05:04:48 PM PDT 24 |
Jul 31 05:04:49 PM PDT 24 |
29457943 ps |
| T884 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.2210419935 |
|
|
Jul 31 05:04:20 PM PDT 24 |
Jul 31 05:04:26 PM PDT 24 |
449972991 ps |
| T885 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.1226800760 |
|
|
Jul 31 05:04:29 PM PDT 24 |
Jul 31 05:04:33 PM PDT 24 |
159969188 ps |
| T108 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.3775059120 |
|
|
Jul 31 05:04:22 PM PDT 24 |
Jul 31 05:04:24 PM PDT 24 |
68045706 ps |
| T886 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.3444941705 |
|
|
Jul 31 05:04:07 PM PDT 24 |
Jul 31 05:04:08 PM PDT 24 |
35908774 ps |
| T187 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.4162429242 |
|
|
Jul 31 05:04:07 PM PDT 24 |
Jul 31 05:04:08 PM PDT 24 |
40978501 ps |
| T195 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.715235007 |
|
|
Jul 31 05:04:36 PM PDT 24 |
Jul 31 05:04:37 PM PDT 24 |
30521951 ps |
| T196 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.1554297563 |
|
|
Jul 31 05:04:35 PM PDT 24 |
Jul 31 05:04:36 PM PDT 24 |
25477280 ps |
| T205 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.4291869026 |
|
|
Jul 31 05:04:25 PM PDT 24 |
Jul 31 05:04:30 PM PDT 24 |
425970734 ps |
| T115 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.833254548 |
|
|
Jul 31 05:04:28 PM PDT 24 |
Jul 31 05:04:30 PM PDT 24 |
12647113 ps |
| T206 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.3669132925 |
|
|
Jul 31 05:04:30 PM PDT 24 |
Jul 31 05:04:35 PM PDT 24 |
3412934878 ps |
| T116 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.2431932266 |
|
|
Jul 31 05:04:41 PM PDT 24 |
Jul 31 05:04:42 PM PDT 24 |
47203714 ps |
| T123 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1676061832 |
|
|
Jul 31 05:04:06 PM PDT 24 |
Jul 31 05:04:10 PM PDT 24 |
3056155088 ps |
| T112 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1384109749 |
|
|
Jul 31 05:04:34 PM PDT 24 |
Jul 31 05:04:36 PM PDT 24 |
256916025 ps |
| T197 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.2352183285 |
|
|
Jul 31 05:04:40 PM PDT 24 |
Jul 31 05:04:41 PM PDT 24 |
106346351 ps |
| T146 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.142940577 |
|
|
Jul 31 05:04:05 PM PDT 24 |
Jul 31 05:04:13 PM PDT 24 |
1260638527 ps |
| T109 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.1682985171 |
|
|
Jul 31 05:04:28 PM PDT 24 |
Jul 31 05:04:31 PM PDT 24 |
489427697 ps |
| T147 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.1205608858 |
|
|
Jul 31 05:04:07 PM PDT 24 |
Jul 31 05:04:23 PM PDT 24 |
3934929595 ps |
| T117 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.3732171683 |
|
|
Jul 31 05:04:49 PM PDT 24 |
Jul 31 05:04:51 PM PDT 24 |
30061783 ps |
| T887 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.3188523198 |
|
|
Jul 31 05:04:39 PM PDT 24 |
Jul 31 05:04:40 PM PDT 24 |
260105892 ps |
| T130 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.1781708011 |
|
|
Jul 31 05:04:26 PM PDT 24 |
Jul 31 05:04:27 PM PDT 24 |
52396690 ps |
| T118 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.3556209727 |
|
|
Jul 31 05:04:37 PM PDT 24 |
Jul 31 05:04:38 PM PDT 24 |
263951944 ps |
| T198 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.3395336413 |
|
|
Jul 31 05:04:40 PM PDT 24 |
Jul 31 05:04:41 PM PDT 24 |
36575429 ps |
| T888 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.1570451133 |
|
|
Jul 31 05:04:26 PM PDT 24 |
Jul 31 05:04:27 PM PDT 24 |
31256731 ps |
| T889 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1403992816 |
|
|
Jul 31 05:04:29 PM PDT 24 |
Jul 31 05:04:32 PM PDT 24 |
404934352 ps |
| T890 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.1519263303 |
|
|
Jul 31 05:04:36 PM PDT 24 |
Jul 31 05:04:37 PM PDT 24 |
37609791 ps |
| T891 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.1177610198 |
|
|
Jul 31 05:04:29 PM PDT 24 |
Jul 31 05:04:30 PM PDT 24 |
46378914 ps |
| T892 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.727113989 |
|
|
Jul 31 05:04:21 PM PDT 24 |
Jul 31 05:04:23 PM PDT 24 |
50904851 ps |
| T199 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.1571141802 |
|
|
Jul 31 05:04:05 PM PDT 24 |
Jul 31 05:04:06 PM PDT 24 |
22307590 ps |
| T200 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.2011388870 |
|
|
Jul 31 05:04:31 PM PDT 24 |
Jul 31 05:04:32 PM PDT 24 |
19479410 ps |
| T153 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.854263781 |
|
|
Jul 31 05:04:59 PM PDT 24 |
Jul 31 05:05:00 PM PDT 24 |
24432036 ps |
| T893 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.1975853842 |
|
|
Jul 31 05:04:33 PM PDT 24 |
Jul 31 05:04:34 PM PDT 24 |
50348218 ps |
| T120 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.1949157833 |
|
|
Jul 31 05:04:25 PM PDT 24 |
Jul 31 05:04:29 PM PDT 24 |
97047431 ps |
| T188 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.77171861 |
|
|
Jul 31 05:04:16 PM PDT 24 |
Jul 31 05:04:17 PM PDT 24 |
53850425 ps |
| T131 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.2100939732 |
|
|
Jul 31 05:04:29 PM PDT 24 |
Jul 31 05:04:31 PM PDT 24 |
42206487 ps |
| T894 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.4129105275 |
|
|
Jul 31 05:04:28 PM PDT 24 |
Jul 31 05:04:29 PM PDT 24 |
112242075 ps |
| T154 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.4289852114 |
|
|
Jul 31 05:04:39 PM PDT 24 |
Jul 31 05:04:40 PM PDT 24 |
54705887 ps |
| T125 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.879425815 |
|
|
Jul 31 05:04:47 PM PDT 24 |
Jul 31 05:04:52 PM PDT 24 |
484658664 ps |
| T895 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.3868331029 |
|
|
Jul 31 05:04:21 PM PDT 24 |
Jul 31 05:04:41 PM PDT 24 |
3922537510 ps |
| T201 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.302575 |
|
|
Jul 31 05:04:20 PM PDT 24 |
Jul 31 05:04:22 PM PDT 24 |
74041741 ps |
| T133 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.1261534689 |
|
|
Jul 31 05:04:36 PM PDT 24 |
Jul 31 05:04:40 PM PDT 24 |
239999218 ps |
| T113 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.3630293084 |
|
|
Jul 31 05:04:21 PM PDT 24 |
Jul 31 05:04:24 PM PDT 24 |
1669677747 ps |
| T202 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.4208473320 |
|
|
Jul 31 05:04:47 PM PDT 24 |
Jul 31 05:04:48 PM PDT 24 |
15498103 ps |
| T896 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.3718217058 |
|
|
Jul 31 05:04:23 PM PDT 24 |
Jul 31 05:04:25 PM PDT 24 |
24941098 ps |
| T897 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.2767781895 |
|
|
Jul 31 05:04:05 PM PDT 24 |
Jul 31 05:04:22 PM PDT 24 |
3434673473 ps |
| T898 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.3643306911 |
|
|
Jul 31 05:04:53 PM PDT 24 |
Jul 31 05:04:54 PM PDT 24 |
30736827 ps |
| T203 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.1249753709 |
|
|
Jul 31 05:04:45 PM PDT 24 |
Jul 31 05:04:46 PM PDT 24 |
35374424 ps |
| T155 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.1884860565 |
|
|
Jul 31 05:04:18 PM PDT 24 |
Jul 31 05:04:20 PM PDT 24 |
172392791 ps |
| T899 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.1344095143 |
|
|
Jul 31 05:04:38 PM PDT 24 |
Jul 31 05:04:41 PM PDT 24 |
94883082 ps |
| T900 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.1406850067 |
|
|
Jul 31 05:04:31 PM PDT 24 |
Jul 31 05:04:32 PM PDT 24 |
31768605 ps |
| T901 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.1491685077 |
|
|
Jul 31 05:04:14 PM PDT 24 |
Jul 31 05:04:15 PM PDT 24 |
20378998 ps |
| T902 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.5831516 |
|
|
Jul 31 05:04:16 PM PDT 24 |
Jul 31 05:04:26 PM PDT 24 |
15388347771 ps |
| T903 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.3023833440 |
|
|
Jul 31 05:04:05 PM PDT 24 |
Jul 31 05:04:25 PM PDT 24 |
8764761643 ps |
| T126 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.2559483027 |
|
|
Jul 31 05:04:40 PM PDT 24 |
Jul 31 05:04:42 PM PDT 24 |
83693724 ps |
| T156 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.1928623828 |
|
|
Jul 31 05:04:22 PM PDT 24 |
Jul 31 05:04:24 PM PDT 24 |
54112523 ps |
| T904 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.417545373 |
|
|
Jul 31 05:04:34 PM PDT 24 |
Jul 31 05:04:36 PM PDT 24 |
55778323 ps |
| T905 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.72051817 |
|
|
Jul 31 05:04:20 PM PDT 24 |
Jul 31 05:04:21 PM PDT 24 |
15056601 ps |
| T906 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1129061993 |
|
|
Jul 31 05:04:21 PM PDT 24 |
Jul 31 05:04:40 PM PDT 24 |
832331532 ps |
| T907 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.1151161289 |
|
|
Jul 31 05:04:28 PM PDT 24 |
Jul 31 05:04:30 PM PDT 24 |
454878495 ps |
| T135 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.3460451535 |
|
|
Jul 31 05:04:20 PM PDT 24 |
Jul 31 05:04:26 PM PDT 24 |
499195301 ps |
| T908 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1038073485 |
|
|
Jul 31 05:04:36 PM PDT 24 |
Jul 31 05:04:40 PM PDT 24 |
3349859672 ps |
| T909 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.2154460266 |
|
|
Jul 31 05:04:28 PM PDT 24 |
Jul 31 05:04:40 PM PDT 24 |
1248360755 ps |
| T127 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.807335324 |
|
|
Jul 31 05:04:21 PM PDT 24 |
Jul 31 05:04:24 PM PDT 24 |
292932095 ps |
| T910 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4236270777 |
|
|
Jul 31 05:04:22 PM PDT 24 |
Jul 31 05:04:25 PM PDT 24 |
124003809 ps |
| T911 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.1566206066 |
|
|
Jul 31 05:04:15 PM PDT 24 |
Jul 31 05:04:44 PM PDT 24 |
2366385127 ps |
| T912 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.3814195053 |
|
|
Jul 31 05:04:45 PM PDT 24 |
Jul 31 05:04:46 PM PDT 24 |
45164724 ps |
| T128 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.168463691 |
|
|
Jul 31 05:04:51 PM PDT 24 |
Jul 31 05:04:56 PM PDT 24 |
117994075 ps |
| T913 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.2951049127 |
|
|
Jul 31 05:04:34 PM PDT 24 |
Jul 31 05:04:36 PM PDT 24 |
93180846 ps |
| T914 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.3907403239 |
|
|
Jul 31 05:04:05 PM PDT 24 |
Jul 31 05:04:07 PM PDT 24 |
44404584 ps |
| T915 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.1164561263 |
|
|
Jul 31 05:04:23 PM PDT 24 |
Jul 31 05:04:30 PM PDT 24 |
529631127 ps |
| T142 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.3936179636 |
|
|
Jul 31 05:04:51 PM PDT 24 |
Jul 31 05:04:56 PM PDT 24 |
466994310 ps |
| T124 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.2317218003 |
|
|
Jul 31 05:04:35 PM PDT 24 |
Jul 31 05:04:37 PM PDT 24 |
87746897 ps |
| T916 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.1061391032 |
|
|
Jul 31 05:04:08 PM PDT 24 |
Jul 31 05:04:10 PM PDT 24 |
101174798 ps |
| T917 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.2439039563 |
|
|
Jul 31 05:04:46 PM PDT 24 |
Jul 31 05:04:47 PM PDT 24 |
77367258 ps |
| T918 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.2663100689 |
|
|
Jul 31 05:04:20 PM PDT 24 |
Jul 31 05:04:21 PM PDT 24 |
50800240 ps |
| T919 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.1861809656 |
|
|
Jul 31 05:04:30 PM PDT 24 |
Jul 31 05:04:31 PM PDT 24 |
29133738 ps |
| T129 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.3288624767 |
|
|
Jul 31 05:04:34 PM PDT 24 |
Jul 31 05:04:36 PM PDT 24 |
204586030 ps |
| T920 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.698430645 |
|
|
Jul 31 05:04:13 PM PDT 24 |
Jul 31 05:04:15 PM PDT 24 |
18646912 ps |
| T921 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.2206194390 |
|
|
Jul 31 05:04:19 PM PDT 24 |
Jul 31 05:04:21 PM PDT 24 |
292780313 ps |
| T922 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.3703145635 |
|
|
Jul 31 05:04:20 PM PDT 24 |
Jul 31 05:04:21 PM PDT 24 |
127135929 ps |
| T923 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.1040741628 |
|
|
Jul 31 05:04:30 PM PDT 24 |
Jul 31 05:04:36 PM PDT 24 |
1548432132 ps |
| T924 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.3904963835 |
|
|
Jul 31 05:04:14 PM PDT 24 |
Jul 31 05:04:19 PM PDT 24 |
1332108900 ps |
| T925 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.1802727180 |
|
|
Jul 31 05:04:26 PM PDT 24 |
Jul 31 05:04:28 PM PDT 24 |
381502140 ps |
| T926 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.647040286 |
|
|
Jul 31 05:04:47 PM PDT 24 |
Jul 31 05:04:50 PM PDT 24 |
175591261 ps |
| T927 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.780224267 |
|
|
Jul 31 05:04:11 PM PDT 24 |
Jul 31 05:04:13 PM PDT 24 |
28815257 ps |
| T928 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.450339929 |
|
|
Jul 31 05:04:03 PM PDT 24 |
Jul 31 05:04:07 PM PDT 24 |
217090544 ps |
| T929 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.2195731411 |
|
|
Jul 31 05:04:24 PM PDT 24 |
Jul 31 05:04:26 PM PDT 24 |
53643021 ps |
| T930 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.3216903075 |
|
|
Jul 31 05:04:49 PM PDT 24 |
Jul 31 05:04:50 PM PDT 24 |
31667696 ps |
| T931 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.3998085867 |
|
|
Jul 31 05:04:36 PM PDT 24 |
Jul 31 05:04:37 PM PDT 24 |
44703283 ps |
| T932 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.2035062724 |
|
|
Jul 31 05:04:35 PM PDT 24 |
Jul 31 05:04:37 PM PDT 24 |
88561771 ps |
| T933 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.791695189 |
|
|
Jul 31 05:04:22 PM PDT 24 |
Jul 31 05:04:24 PM PDT 24 |
248805187 ps |
| T934 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.3548758137 |
|
|
Jul 31 05:04:25 PM PDT 24 |
Jul 31 05:04:27 PM PDT 24 |
51880576 ps |
| T935 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.1707034528 |
|
|
Jul 31 05:04:34 PM PDT 24 |
Jul 31 05:04:36 PM PDT 24 |
20319481 ps |
| T936 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.3317769084 |
|
|
Jul 31 05:04:16 PM PDT 24 |
Jul 31 05:04:17 PM PDT 24 |
26355631 ps |
| T937 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.2490895208 |
|
|
Jul 31 05:04:20 PM PDT 24 |
Jul 31 05:04:21 PM PDT 24 |
15837504 ps |
| T938 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.2242809191 |
|
|
Jul 31 05:04:15 PM PDT 24 |
Jul 31 05:04:16 PM PDT 24 |
119213428 ps |
| T939 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.3508124174 |
|
|
Jul 31 05:04:26 PM PDT 24 |
Jul 31 05:04:29 PM PDT 24 |
138184891 ps |
| T940 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.510734675 |
|
|
Jul 31 05:04:40 PM PDT 24 |
Jul 31 05:04:41 PM PDT 24 |
17815923 ps |
| T941 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.1790418899 |
|
|
Jul 31 05:04:43 PM PDT 24 |
Jul 31 05:04:44 PM PDT 24 |
24968072 ps |
| T942 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.112253538 |
|
|
Jul 31 05:04:26 PM PDT 24 |
Jul 31 05:04:29 PM PDT 24 |
132191247 ps |
| T943 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.3417459805 |
|
|
Jul 31 05:04:35 PM PDT 24 |
Jul 31 05:04:38 PM PDT 24 |
409723651 ps |
| T944 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.2613185868 |
|
|
Jul 31 05:04:31 PM PDT 24 |
Jul 31 05:04:32 PM PDT 24 |
37038977 ps |
| T945 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.847321084 |
|
|
Jul 31 05:04:07 PM PDT 24 |
Jul 31 05:04:08 PM PDT 24 |
134438601 ps |
| T946 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.405914678 |
|
|
Jul 31 05:04:36 PM PDT 24 |
Jul 31 05:04:37 PM PDT 24 |
266473057 ps |
| T189 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.2730223008 |
|
|
Jul 31 05:04:36 PM PDT 24 |
Jul 31 05:04:37 PM PDT 24 |
17991395 ps |
| T947 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.3613963409 |
|
|
Jul 31 05:04:35 PM PDT 24 |
Jul 31 05:04:36 PM PDT 24 |
52037549 ps |
| T948 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.3412138113 |
|
|
Jul 31 05:04:59 PM PDT 24 |
Jul 31 05:05:00 PM PDT 24 |
63425384 ps |
| T949 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.543711576 |
|
|
Jul 31 05:04:31 PM PDT 24 |
Jul 31 05:04:32 PM PDT 24 |
27972474 ps |
| T950 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.1385458806 |
|
|
Jul 31 05:04:13 PM PDT 24 |
Jul 31 05:04:16 PM PDT 24 |
91414318 ps |
| T951 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4229003846 |
|
|
Jul 31 05:04:17 PM PDT 24 |
Jul 31 05:04:19 PM PDT 24 |
365363871 ps |
| T137 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.1488367025 |
|
|
Jul 31 05:04:31 PM PDT 24 |
Jul 31 05:04:34 PM PDT 24 |
391319421 ps |
| T952 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.3125790413 |
|
|
Jul 31 05:04:28 PM PDT 24 |
Jul 31 05:04:30 PM PDT 24 |
107479564 ps |
| T953 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.1822784775 |
|
|
Jul 31 05:04:25 PM PDT 24 |
Jul 31 05:04:26 PM PDT 24 |
20405914 ps |
| T954 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.854172603 |
|
|
Jul 31 05:04:36 PM PDT 24 |
Jul 31 05:04:38 PM PDT 24 |
95188622 ps |
| T955 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.1757788227 |
|
|
Jul 31 05:04:06 PM PDT 24 |
Jul 31 05:04:09 PM PDT 24 |
119726907 ps |
| T956 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.3692645471 |
|
|
Jul 31 05:04:19 PM PDT 24 |
Jul 31 05:04:21 PM PDT 24 |
313187496 ps |
| T957 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.1370981155 |
|
|
Jul 31 05:04:16 PM PDT 24 |
Jul 31 05:04:19 PM PDT 24 |
200358214 ps |
| T958 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.4240601098 |
|
|
Jul 31 05:04:04 PM PDT 24 |
Jul 31 05:04:05 PM PDT 24 |
29478400 ps |
| T959 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.3462320121 |
|
|
Jul 31 05:04:19 PM PDT 24 |
Jul 31 05:04:20 PM PDT 24 |
66928965 ps |
| T190 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.4115156403 |
|
|
Jul 31 05:04:10 PM PDT 24 |
Jul 31 05:04:11 PM PDT 24 |
29947199 ps |
| T960 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.1944919433 |
|
|
Jul 31 05:04:55 PM PDT 24 |
Jul 31 05:04:57 PM PDT 24 |
46633260 ps |
| T961 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.3253398579 |
|
|
Jul 31 05:04:37 PM PDT 24 |
Jul 31 05:04:41 PM PDT 24 |
106253366 ps |
| T962 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.1527751451 |
|
|
Jul 31 05:04:06 PM PDT 24 |
Jul 31 05:04:08 PM PDT 24 |
79465920 ps |
| T963 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.993259106 |
|
|
Jul 31 05:04:18 PM PDT 24 |
Jul 31 05:04:29 PM PDT 24 |
3038420786 ps |
| T964 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.173512880 |
|
|
Jul 31 05:04:11 PM PDT 24 |
Jul 31 05:04:13 PM PDT 24 |
21613063 ps |
| T191 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.1208684137 |
|
|
Jul 31 05:04:21 PM PDT 24 |
Jul 31 05:04:22 PM PDT 24 |
20944464 ps |
| T965 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.1296504065 |
|
|
Jul 31 05:04:27 PM PDT 24 |
Jul 31 05:04:30 PM PDT 24 |
44117489 ps |
| T966 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.2381639480 |
|
|
Jul 31 05:04:14 PM PDT 24 |
Jul 31 05:04:15 PM PDT 24 |
159570365 ps |
| T967 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.1003890102 |
|
|
Jul 31 05:04:30 PM PDT 24 |
Jul 31 05:04:32 PM PDT 24 |
110226106 ps |
| T968 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.3513357840 |
|
|
Jul 31 05:04:30 PM PDT 24 |
Jul 31 05:04:41 PM PDT 24 |
3364376153 ps |
| T969 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.444828486 |
|
|
Jul 31 05:04:31 PM PDT 24 |
Jul 31 05:04:32 PM PDT 24 |
31511614 ps |
| T970 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.142335144 |
|
|
Jul 31 05:04:33 PM PDT 24 |
Jul 31 05:04:34 PM PDT 24 |
317631400 ps |
| T971 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.3955671528 |
|
|
Jul 31 05:04:36 PM PDT 24 |
Jul 31 05:04:37 PM PDT 24 |
17861944 ps |
| T134 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.1008646422 |
|
|
Jul 31 05:04:52 PM PDT 24 |
Jul 31 05:04:54 PM PDT 24 |
235389433 ps |
| T972 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.4136745926 |
|
|
Jul 31 05:04:25 PM PDT 24 |
Jul 31 05:04:27 PM PDT 24 |
1164828309 ps |
| T140 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.4227507777 |
|
|
Jul 31 05:04:08 PM PDT 24 |
Jul 31 05:04:11 PM PDT 24 |
932788026 ps |
| T973 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.788084574 |
|
|
Jul 31 05:04:28 PM PDT 24 |
Jul 31 05:04:31 PM PDT 24 |
278844906 ps |
| T974 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.114623438 |
|
|
Jul 31 05:04:40 PM PDT 24 |
Jul 31 05:04:41 PM PDT 24 |
94178565 ps |
| T975 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.770965636 |
|
|
Jul 31 05:04:20 PM PDT 24 |
Jul 31 05:04:22 PM PDT 24 |
200770831 ps |
| T976 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.2912944024 |
|
|
Jul 31 05:04:09 PM PDT 24 |
Jul 31 05:04:10 PM PDT 24 |
48947295 ps |
| T119 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.4200725205 |
|
|
Jul 31 05:04:18 PM PDT 24 |
Jul 31 05:04:23 PM PDT 24 |
110970884 ps |
| T192 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.590030481 |
|
|
Jul 31 05:04:20 PM PDT 24 |
Jul 31 05:04:21 PM PDT 24 |
64597054 ps |
| T977 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.808222305 |
|
|
Jul 31 05:04:22 PM PDT 24 |
Jul 31 05:04:23 PM PDT 24 |
98376963 ps |
| T978 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.1767813619 |
|
|
Jul 31 05:04:09 PM PDT 24 |
Jul 31 05:04:10 PM PDT 24 |
416724228 ps |
| T193 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.57415700 |
|
|
Jul 31 05:04:31 PM PDT 24 |
Jul 31 05:04:32 PM PDT 24 |
18095716 ps |
| T979 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.178155485 |
|
|
Jul 31 05:04:33 PM PDT 24 |
Jul 31 05:04:52 PM PDT 24 |
2347184987 ps |
| T980 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.699525148 |
|
|
Jul 31 05:04:39 PM PDT 24 |
Jul 31 05:04:40 PM PDT 24 |
92272132 ps |
| T981 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.3338560325 |
|
|
Jul 31 05:04:56 PM PDT 24 |
Jul 31 05:04:57 PM PDT 24 |
24861906 ps |
| T982 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.2877681431 |
|
|
Jul 31 05:04:37 PM PDT 24 |
Jul 31 05:04:38 PM PDT 24 |
76889310 ps |
| T983 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.3135833839 |
|
|
Jul 31 05:04:45 PM PDT 24 |
Jul 31 05:04:46 PM PDT 24 |
47782182 ps |
| T141 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.2293319668 |
|
|
Jul 31 05:04:08 PM PDT 24 |
Jul 31 05:04:11 PM PDT 24 |
104620507 ps |
| T984 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.1371394245 |
|
|
Jul 31 05:04:28 PM PDT 24 |
Jul 31 05:04:29 PM PDT 24 |
40667626 ps |
| T138 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.576600425 |
|
|
Jul 31 05:04:05 PM PDT 24 |
Jul 31 05:04:08 PM PDT 24 |
219175171 ps |
| T985 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.3103348021 |
|
|
Jul 31 05:04:43 PM PDT 24 |
Jul 31 05:04:44 PM PDT 24 |
53221373 ps |
| T986 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.302996381 |
|
|
Jul 31 05:04:28 PM PDT 24 |
Jul 31 05:04:29 PM PDT 24 |
127690091 ps |
| T132 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.3956313138 |
|
|
Jul 31 05:04:43 PM PDT 24 |
Jul 31 05:04:45 PM PDT 24 |
164127329 ps |
| T136 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.3407934503 |
|
|
Jul 31 05:04:26 PM PDT 24 |
Jul 31 05:04:29 PM PDT 24 |
128300927 ps |
| T987 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.331321019 |
|
|
Jul 31 05:04:28 PM PDT 24 |
Jul 31 05:04:30 PM PDT 24 |
651425992 ps |
| T988 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.4151976000 |
|
|
Jul 31 05:04:18 PM PDT 24 |
Jul 31 05:04:19 PM PDT 24 |
79727562 ps |
| T989 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2843034399 |
|
|
Jul 31 05:04:22 PM PDT 24 |
Jul 31 05:04:25 PM PDT 24 |
248168483 ps |
| T990 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.2078298572 |
|
|
Jul 31 05:04:20 PM PDT 24 |
Jul 31 05:04:21 PM PDT 24 |
90060142 ps |
| T991 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.3019284306 |
|
|
Jul 31 05:04:16 PM PDT 24 |
Jul 31 05:04:29 PM PDT 24 |
5335195596 ps |
| T992 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.1209799978 |
|
|
Jul 31 05:04:19 PM PDT 24 |
Jul 31 05:04:22 PM PDT 24 |
554812687 ps |
| T993 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.1794236660 |
|
|
Jul 31 05:04:32 PM PDT 24 |
Jul 31 05:04:33 PM PDT 24 |
47349256 ps |
| T194 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.4015621132 |
|
|
Jul 31 05:04:09 PM PDT 24 |
Jul 31 05:04:20 PM PDT 24 |
54647920 ps |
| T994 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.614863344 |
|
|
Jul 31 05:04:24 PM PDT 24 |
Jul 31 05:04:26 PM PDT 24 |
376619409 ps |
| T995 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.1489279899 |
|
|
Jul 31 05:04:06 PM PDT 24 |
Jul 31 05:04:08 PM PDT 24 |
49554102 ps |
| T996 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.396124674 |
|
|
Jul 31 05:04:22 PM PDT 24 |
Jul 31 05:04:34 PM PDT 24 |
1598734754 ps |
| T997 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.3826282139 |
|
|
Jul 31 05:04:40 PM PDT 24 |
Jul 31 05:04:42 PM PDT 24 |
306269366 ps |
| T998 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.3510017146 |
|
|
Jul 31 05:04:22 PM PDT 24 |
Jul 31 05:04:23 PM PDT 24 |
764053862 ps |
| T999 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2987441369 |
|
|
Jul 31 05:04:34 PM PDT 24 |
Jul 31 05:04:37 PM PDT 24 |
137363004 ps |
| T1000 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.135313701 |
|
|
Jul 31 05:04:27 PM PDT 24 |
Jul 31 05:04:30 PM PDT 24 |
250984811 ps |
| T1001 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.651294551 |
|
|
Jul 31 05:04:33 PM PDT 24 |
Jul 31 05:04:36 PM PDT 24 |
44685542 ps |