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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.87 97.99 95.68 93.40 97.67 98.55 98.51 96.29


Total test records in report: 1011
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T810 /workspace/coverage/default/42.lc_ctrl_errors.2898664617 Aug 03 05:19:55 PM PDT 24 Aug 03 05:20:11 PM PDT 24 1810421156 ps
T811 /workspace/coverage/default/5.lc_ctrl_state_failure.1754017991 Aug 03 05:17:35 PM PDT 24 Aug 03 05:17:58 PM PDT 24 427494615 ps
T812 /workspace/coverage/default/37.lc_ctrl_security_escalation.3963610272 Aug 03 05:19:39 PM PDT 24 Aug 03 05:19:47 PM PDT 24 542587636 ps
T813 /workspace/coverage/default/47.lc_ctrl_state_failure.2807260046 Aug 03 05:20:09 PM PDT 24 Aug 03 05:20:39 PM PDT 24 476261062 ps
T814 /workspace/coverage/default/23.lc_ctrl_smoke.2363729921 Aug 03 05:18:55 PM PDT 24 Aug 03 05:18:58 PM PDT 24 41852073 ps
T815 /workspace/coverage/default/34.lc_ctrl_security_escalation.3436116224 Aug 03 05:19:27 PM PDT 24 Aug 03 05:19:35 PM PDT 24 246137381 ps
T75 /workspace/coverage/default/2.lc_ctrl_sec_cm.450267765 Aug 03 05:17:12 PM PDT 24 Aug 03 05:17:51 PM PDT 24 964588008 ps
T816 /workspace/coverage/default/24.lc_ctrl_sec_token_digest.821848902 Aug 03 05:19:01 PM PDT 24 Aug 03 05:19:10 PM PDT 24 743259124 ps
T817 /workspace/coverage/default/48.lc_ctrl_volatile_unlock_smoke.2383984604 Aug 03 05:20:09 PM PDT 24 Aug 03 05:20:10 PM PDT 24 22864752 ps
T818 /workspace/coverage/default/8.lc_ctrl_jtag_state_failure.3359918700 Aug 03 05:17:53 PM PDT 24 Aug 03 05:18:30 PM PDT 24 19413598039 ps
T819 /workspace/coverage/default/12.lc_ctrl_stress_all.4119139921 Aug 03 05:18:17 PM PDT 24 Aug 03 05:19:58 PM PDT 24 28146953293 ps
T172 /workspace/coverage/default/32.lc_ctrl_stress_all_with_rand_reset.2475121629 Aug 03 05:19:29 PM PDT 24 Aug 03 05:33:26 PM PDT 24 196892081678 ps
T820 /workspace/coverage/default/18.lc_ctrl_prog_failure.3508595214 Aug 03 05:18:36 PM PDT 24 Aug 03 05:18:39 PM PDT 24 46235059 ps
T821 /workspace/coverage/default/32.lc_ctrl_errors.3735391525 Aug 03 05:19:23 PM PDT 24 Aug 03 05:19:32 PM PDT 24 451895176 ps
T822 /workspace/coverage/default/36.lc_ctrl_alert_test.1393210877 Aug 03 05:19:43 PM PDT 24 Aug 03 05:19:44 PM PDT 24 27306672 ps
T823 /workspace/coverage/default/37.lc_ctrl_alert_test.4159578865 Aug 03 05:19:42 PM PDT 24 Aug 03 05:19:43 PM PDT 24 23047991 ps
T824 /workspace/coverage/default/4.lc_ctrl_claim_transition_if.3971081828 Aug 03 05:17:22 PM PDT 24 Aug 03 05:17:23 PM PDT 24 52972057 ps
T825 /workspace/coverage/default/2.lc_ctrl_smoke.1148487237 Aug 03 05:17:03 PM PDT 24 Aug 03 05:17:06 PM PDT 24 45087539 ps
T826 /workspace/coverage/default/32.lc_ctrl_state_post_trans.2111777515 Aug 03 05:19:24 PM PDT 24 Aug 03 05:19:31 PM PDT 24 100629442 ps
T827 /workspace/coverage/default/11.lc_ctrl_state_failure.1715084371 Aug 03 05:18:04 PM PDT 24 Aug 03 05:18:38 PM PDT 24 1615642135 ps
T828 /workspace/coverage/default/29.lc_ctrl_state_failure.3745618864 Aug 03 05:19:19 PM PDT 24 Aug 03 05:19:47 PM PDT 24 272617327 ps
T829 /workspace/coverage/default/39.lc_ctrl_jtag_access.1286726832 Aug 03 05:19:43 PM PDT 24 Aug 03 05:19:53 PM PDT 24 354306448 ps
T830 /workspace/coverage/default/10.lc_ctrl_jtag_errors.3023472573 Aug 03 05:18:06 PM PDT 24 Aug 03 05:18:36 PM PDT 24 7413396532 ps
T831 /workspace/coverage/default/21.lc_ctrl_state_failure.400710577 Aug 03 05:18:52 PM PDT 24 Aug 03 05:19:17 PM PDT 24 889604864 ps
T832 /workspace/coverage/default/30.lc_ctrl_stress_all_with_rand_reset.2986811824 Aug 03 05:19:19 PM PDT 24 Aug 03 05:30:33 PM PDT 24 128462802505 ps
T833 /workspace/coverage/default/0.lc_ctrl_volatile_unlock_smoke.4157689764 Aug 03 05:16:52 PM PDT 24 Aug 03 05:16:53 PM PDT 24 20582833 ps
T834 /workspace/coverage/default/9.lc_ctrl_jtag_access.2386608568 Aug 03 05:18:00 PM PDT 24 Aug 03 05:18:06 PM PDT 24 949274495 ps
T835 /workspace/coverage/default/26.lc_ctrl_state_post_trans.235785390 Aug 03 05:19:08 PM PDT 24 Aug 03 05:19:17 PM PDT 24 310911202 ps
T836 /workspace/coverage/default/46.lc_ctrl_jtag_access.3822385177 Aug 03 05:20:06 PM PDT 24 Aug 03 05:20:23 PM PDT 24 2769761980 ps
T837 /workspace/coverage/default/41.lc_ctrl_sec_mubi.1288949718 Aug 03 05:19:55 PM PDT 24 Aug 03 05:20:07 PM PDT 24 1299948165 ps
T838 /workspace/coverage/default/29.lc_ctrl_stress_all.2752878522 Aug 03 05:19:17 PM PDT 24 Aug 03 05:24:59 PM PDT 24 62058858782 ps
T839 /workspace/coverage/default/27.lc_ctrl_state_post_trans.1582896901 Aug 03 05:19:05 PM PDT 24 Aug 03 05:19:12 PM PDT 24 244193245 ps
T840 /workspace/coverage/default/3.lc_ctrl_jtag_state_failure.3766614513 Aug 03 05:17:17 PM PDT 24 Aug 03 05:17:51 PM PDT 24 14654107243 ps
T841 /workspace/coverage/default/36.lc_ctrl_state_post_trans.2571878990 Aug 03 05:19:34 PM PDT 24 Aug 03 05:19:40 PM PDT 24 105139745 ps
T842 /workspace/coverage/default/16.lc_ctrl_jtag_state_post_trans.2839843441 Aug 03 05:18:32 PM PDT 24 Aug 03 05:18:47 PM PDT 24 3724017673 ps
T843 /workspace/coverage/default/13.lc_ctrl_state_failure.2789121828 Aug 03 05:18:16 PM PDT 24 Aug 03 05:18:39 PM PDT 24 232810037 ps
T844 /workspace/coverage/default/13.lc_ctrl_jtag_smoke.3435028799 Aug 03 05:18:16 PM PDT 24 Aug 03 05:18:25 PM PDT 24 1502247859 ps
T845 /workspace/coverage/default/28.lc_ctrl_stress_all.142115156 Aug 03 05:19:12 PM PDT 24 Aug 03 05:19:55 PM PDT 24 5019998718 ps
T846 /workspace/coverage/default/15.lc_ctrl_prog_failure.2694268315 Aug 03 05:18:33 PM PDT 24 Aug 03 05:18:36 PM PDT 24 359860184 ps
T847 /workspace/coverage/default/45.lc_ctrl_stress_all.3734786426 Aug 03 05:19:59 PM PDT 24 Aug 03 05:22:14 PM PDT 24 8470453443 ps
T848 /workspace/coverage/default/36.lc_ctrl_security_escalation.1711577085 Aug 03 05:19:39 PM PDT 24 Aug 03 05:19:48 PM PDT 24 402161428 ps
T849 /workspace/coverage/default/35.lc_ctrl_state_failure.3093820114 Aug 03 05:19:36 PM PDT 24 Aug 03 05:20:05 PM PDT 24 1004722595 ps
T850 /workspace/coverage/default/4.lc_ctrl_jtag_errors.3197390936 Aug 03 05:17:23 PM PDT 24 Aug 03 05:19:11 PM PDT 24 7852167451 ps
T851 /workspace/coverage/default/46.lc_ctrl_stress_all.3607312235 Aug 03 05:20:07 PM PDT 24 Aug 03 05:20:46 PM PDT 24 738105457 ps
T852 /workspace/coverage/default/0.lc_ctrl_jtag_errors.1107864655 Aug 03 05:16:58 PM PDT 24 Aug 03 05:18:38 PM PDT 24 17921274843 ps
T853 /workspace/coverage/default/48.lc_ctrl_stress_all.310813324 Aug 03 05:20:10 PM PDT 24 Aug 03 05:22:03 PM PDT 24 14592267395 ps
T854 /workspace/coverage/default/25.lc_ctrl_smoke.2989550229 Aug 03 05:19:00 PM PDT 24 Aug 03 05:19:03 PM PDT 24 101396786 ps
T855 /workspace/coverage/default/2.lc_ctrl_jtag_prog_failure.1398235501 Aug 03 05:17:07 PM PDT 24 Aug 03 05:17:11 PM PDT 24 558269158 ps
T856 /workspace/coverage/default/23.lc_ctrl_sec_mubi.1285469307 Aug 03 05:18:55 PM PDT 24 Aug 03 05:19:07 PM PDT 24 907874965 ps
T857 /workspace/coverage/default/8.lc_ctrl_state_post_trans.1545541592 Aug 03 05:17:47 PM PDT 24 Aug 03 05:17:54 PM PDT 24 256011158 ps
T858 /workspace/coverage/default/39.lc_ctrl_state_post_trans.205886444 Aug 03 05:19:44 PM PDT 24 Aug 03 05:19:52 PM PDT 24 50882631 ps
T859 /workspace/coverage/default/43.lc_ctrl_sec_token_digest.2440120806 Aug 03 05:19:58 PM PDT 24 Aug 03 05:20:10 PM PDT 24 235289477 ps
T860 /workspace/coverage/default/10.lc_ctrl_stress_all.320285807 Aug 03 05:18:06 PM PDT 24 Aug 03 05:20:36 PM PDT 24 4046329556 ps
T861 /workspace/coverage/default/30.lc_ctrl_state_post_trans.410288645 Aug 03 05:19:19 PM PDT 24 Aug 03 05:19:25 PM PDT 24 53691161 ps
T862 /workspace/coverage/default/2.lc_ctrl_jtag_state_failure.1971685101 Aug 03 05:17:07 PM PDT 24 Aug 03 05:17:45 PM PDT 24 4146693616 ps
T181 /workspace/coverage/default/39.lc_ctrl_stress_all_with_rand_reset.471109070 Aug 03 05:19:46 PM PDT 24 Aug 03 05:31:10 PM PDT 24 68705352054 ps
T863 /workspace/coverage/default/47.lc_ctrl_security_escalation.2486568694 Aug 03 05:20:12 PM PDT 24 Aug 03 05:20:22 PM PDT 24 1543754288 ps
T864 /workspace/coverage/default/42.lc_ctrl_prog_failure.705285913 Aug 03 05:19:51 PM PDT 24 Aug 03 05:19:55 PM PDT 24 368262438 ps
T865 /workspace/coverage/default/24.lc_ctrl_prog_failure.2223427322 Aug 03 05:19:01 PM PDT 24 Aug 03 05:19:06 PM PDT 24 108942499 ps
T866 /workspace/coverage/default/21.lc_ctrl_sec_token_mux.2216428720 Aug 03 05:18:53 PM PDT 24 Aug 03 05:19:06 PM PDT 24 823935738 ps
T867 /workspace/coverage/default/4.lc_ctrl_prog_failure.1589746966 Aug 03 05:17:28 PM PDT 24 Aug 03 05:17:31 PM PDT 24 251428678 ps
T868 /workspace/coverage/default/5.lc_ctrl_jtag_priority.407681420 Aug 03 05:17:34 PM PDT 24 Aug 03 05:17:36 PM PDT 24 291613939 ps
T869 /workspace/coverage/default/3.lc_ctrl_sec_token_digest.3212172772 Aug 03 05:17:18 PM PDT 24 Aug 03 05:17:30 PM PDT 24 1903595612 ps
T870 /workspace/coverage/default/49.lc_ctrl_security_escalation.2494036161 Aug 03 05:20:12 PM PDT 24 Aug 03 05:20:23 PM PDT 24 344302332 ps
T871 /workspace/coverage/default/9.lc_ctrl_state_post_trans.384224125 Aug 03 05:17:56 PM PDT 24 Aug 03 05:18:05 PM PDT 24 115214780 ps
T872 /workspace/coverage/default/10.lc_ctrl_security_escalation.1474663308 Aug 03 05:17:58 PM PDT 24 Aug 03 05:18:05 PM PDT 24 242934477 ps
T873 /workspace/coverage/default/18.lc_ctrl_stress_all_with_rand_reset.390489685 Aug 03 05:18:41 PM PDT 24 Aug 03 05:47:00 PM PDT 24 49144120517 ps
T874 /workspace/coverage/default/16.lc_ctrl_alert_test.3749107864 Aug 03 05:18:33 PM PDT 24 Aug 03 05:18:34 PM PDT 24 20791243 ps
T875 /workspace/coverage/default/49.lc_ctrl_state_post_trans.204829432 Aug 03 05:20:12 PM PDT 24 Aug 03 05:20:19 PM PDT 24 660325107 ps
T876 /workspace/coverage/default/38.lc_ctrl_sec_token_mux.2037209527 Aug 03 05:19:44 PM PDT 24 Aug 03 05:19:55 PM PDT 24 4249217431 ps
T877 /workspace/coverage/default/26.lc_ctrl_volatile_unlock_smoke.2145663591 Aug 03 05:19:05 PM PDT 24 Aug 03 05:19:06 PM PDT 24 15600509 ps
T878 /workspace/coverage/default/38.lc_ctrl_sec_mubi.3734321474 Aug 03 05:19:41 PM PDT 24 Aug 03 05:19:58 PM PDT 24 385008960 ps
T879 /workspace/coverage/default/9.lc_ctrl_jtag_smoke.1829554626 Aug 03 05:17:53 PM PDT 24 Aug 03 05:17:55 PM PDT 24 1356661448 ps
T880 /workspace/coverage/default/12.lc_ctrl_alert_test.2066046626 Aug 03 05:18:17 PM PDT 24 Aug 03 05:18:18 PM PDT 24 14677044 ps
T881 /workspace/coverage/default/3.lc_ctrl_jtag_smoke.2901978952 Aug 03 05:17:12 PM PDT 24 Aug 03 05:17:16 PM PDT 24 104172984 ps
T882 /workspace/coverage/default/26.lc_ctrl_jtag_access.1750243545 Aug 03 05:19:05 PM PDT 24 Aug 03 05:19:10 PM PDT 24 323500161 ps
T118 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.3396931009 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:11 PM PDT 24 322525838 ps
T128 /workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.2437853306 Aug 03 04:32:06 PM PDT 24 Aug 03 04:32:07 PM PDT 24 99087505 ps
T156 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.1592739649 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:08 PM PDT 24 157027806 ps
T129 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.1136552500 Aug 03 04:32:04 PM PDT 24 Aug 03 04:32:46 PM PDT 24 7400596785 ps
T152 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.138237604 Aug 03 04:32:00 PM PDT 24 Aug 03 04:32:02 PM PDT 24 403751103 ps
T121 /workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.1391545212 Aug 03 04:32:00 PM PDT 24 Aug 03 04:32:02 PM PDT 24 30153231 ps
T122 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.620880721 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:09 PM PDT 24 30260722 ps
T126 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.3368314330 Aug 03 04:31:53 PM PDT 24 Aug 03 04:31:56 PM PDT 24 840860241 ps
T119 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.3984227991 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:09 PM PDT 24 122244389 ps
T120 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.2752162455 Aug 03 04:32:06 PM PDT 24 Aug 03 04:32:10 PM PDT 24 111226769 ps
T151 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.3819203459 Aug 03 04:32:05 PM PDT 24 Aug 03 04:32:06 PM PDT 24 81371953 ps
T163 /workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.2390118325 Aug 03 04:32:02 PM PDT 24 Aug 03 04:32:04 PM PDT 24 44092665 ps
T123 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.1384083412 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:10 PM PDT 24 64202625 ps
T142 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.2948293420 Aug 03 04:31:55 PM PDT 24 Aug 03 04:31:57 PM PDT 24 27225355 ps
T155 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.3549287228 Aug 03 04:32:03 PM PDT 24 Aug 03 04:32:06 PM PDT 24 124664924 ps
T153 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1691210065 Aug 03 04:32:00 PM PDT 24 Aug 03 04:32:01 PM PDT 24 383227846 ps
T125 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.1924056469 Aug 03 04:32:06 PM PDT 24 Aug 03 04:32:07 PM PDT 24 33676900 ps
T883 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.639285857 Aug 03 04:32:04 PM PDT 24 Aug 03 04:32:05 PM PDT 24 49755211 ps
T164 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.2258247432 Aug 03 04:31:58 PM PDT 24 Aug 03 04:32:00 PM PDT 24 141784648 ps
T202 /workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.675318421 Aug 03 04:32:00 PM PDT 24 Aug 03 04:32:01 PM PDT 24 24009982 ps
T154 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.1849227700 Aug 03 04:32:04 PM PDT 24 Aug 03 04:32:12 PM PDT 24 805397435 ps
T124 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.3181426908 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:10 PM PDT 24 156761467 ps
T884 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.216025828 Aug 03 04:32:03 PM PDT 24 Aug 03 04:32:07 PM PDT 24 104666976 ps
T885 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.4154618878 Aug 03 04:32:00 PM PDT 24 Aug 03 04:32:08 PM PDT 24 1280397640 ps
T203 /workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.144121666 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:08 PM PDT 24 40102787 ps
T130 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.2241002158 Aug 03 04:32:03 PM PDT 24 Aug 03 04:32:06 PM PDT 24 880750376 ps
T133 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_errors.1330753367 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:09 PM PDT 24 210234460 ps
T886 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.4222342080 Aug 03 04:31:48 PM PDT 24 Aug 03 04:31:49 PM PDT 24 56247180 ps
T887 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.1437896406 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:10 PM PDT 24 123133433 ps
T888 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.1611447059 Aug 03 04:32:01 PM PDT 24 Aug 03 04:32:02 PM PDT 24 25636827 ps
T127 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.823450058 Aug 03 04:32:06 PM PDT 24 Aug 03 04:32:09 PM PDT 24 44927514 ps
T144 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.3074362499 Aug 03 04:32:14 PM PDT 24 Aug 03 04:32:15 PM PDT 24 79662913 ps
T131 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.3351379234 Aug 03 04:32:03 PM PDT 24 Aug 03 04:32:05 PM PDT 24 229764000 ps
T145 /workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.250360952 Aug 03 04:32:15 PM PDT 24 Aug 03 04:32:16 PM PDT 24 162395577 ps
T204 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.1216126531 Aug 03 04:32:05 PM PDT 24 Aug 03 04:32:06 PM PDT 24 15940851 ps
T134 /workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.439795566 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:12 PM PDT 24 308853908 ps
T889 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1391470627 Aug 03 04:32:01 PM PDT 24 Aug 03 04:32:05 PM PDT 24 125535374 ps
T140 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3901276904 Aug 03 04:31:57 PM PDT 24 Aug 03 04:32:00 PM PDT 24 240487213 ps
T890 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.3845858574 Aug 03 04:32:12 PM PDT 24 Aug 03 04:32:14 PM PDT 24 27781038 ps
T891 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_alert_test.762334406 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:13 PM PDT 24 217675911 ps
T892 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.2186874303 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:11 PM PDT 24 26614129 ps
T205 /workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.2921297412 Aug 03 04:31:56 PM PDT 24 Aug 03 04:31:58 PM PDT 24 66984757 ps
T893 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.1989667321 Aug 03 04:31:57 PM PDT 24 Aug 03 04:31:59 PM PDT 24 88281303 ps
T894 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.4240901005 Aug 03 04:31:54 PM PDT 24 Aug 03 04:32:05 PM PDT 24 745485306 ps
T193 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.3331929294 Aug 03 04:32:05 PM PDT 24 Aug 03 04:32:06 PM PDT 24 188094363 ps
T895 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.1484028637 Aug 03 04:31:55 PM PDT 24 Aug 03 04:31:57 PM PDT 24 135645461 ps
T896 /workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.2023834049 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:11 PM PDT 24 362017311 ps
T897 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.3095127313 Aug 03 04:32:02 PM PDT 24 Aug 03 04:32:03 PM PDT 24 14176391 ps
T206 /workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.3655399881 Aug 03 04:32:16 PM PDT 24 Aug 03 04:32:17 PM PDT 24 73430209 ps
T898 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_errors.289208069 Aug 03 04:32:12 PM PDT 24 Aug 03 04:32:15 PM PDT 24 82209640 ps
T899 /workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.872079017 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:12 PM PDT 24 56822304 ps
T207 /workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.2177374326 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:11 PM PDT 24 103911803 ps
T900 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.894412247 Aug 03 04:31:59 PM PDT 24 Aug 03 04:32:00 PM PDT 24 107108643 ps
T901 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.3294920375 Aug 03 04:31:54 PM PDT 24 Aug 03 04:31:56 PM PDT 24 21042735 ps
T150 /workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.1894379344 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:13 PM PDT 24 71928308 ps
T902 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.3081307093 Aug 03 04:32:02 PM PDT 24 Aug 03 04:32:04 PM PDT 24 292879123 ps
T903 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_rw.2155092727 Aug 03 04:32:00 PM PDT 24 Aug 03 04:32:01 PM PDT 24 64634065 ps
T904 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.2286689899 Aug 03 04:32:05 PM PDT 24 Aug 03 04:32:07 PM PDT 24 273047753 ps
T905 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.1353348802 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:12 PM PDT 24 416664477 ps
T906 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.1240589161 Aug 03 04:32:05 PM PDT 24 Aug 03 04:32:07 PM PDT 24 137408489 ps
T907 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.4018407844 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:12 PM PDT 24 337493772 ps
T194 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.2551519193 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:11 PM PDT 24 14217899 ps
T908 /workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.3653337402 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:08 PM PDT 24 102085771 ps
T135 /workspace/coverage/cover_reg_top/11.lc_ctrl_tl_intg_err.3118857915 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:15 PM PDT 24 147580516 ps
T909 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.2947598314 Aug 03 04:31:56 PM PDT 24 Aug 03 04:31:58 PM PDT 24 16989990 ps
T910 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.1804252852 Aug 03 04:31:53 PM PDT 24 Aug 03 04:31:54 PM PDT 24 76856798 ps
T911 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.929720050 Aug 03 04:32:00 PM PDT 24 Aug 03 04:32:05 PM PDT 24 1265965860 ps
T912 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.2164104967 Aug 03 04:31:55 PM PDT 24 Aug 03 04:31:56 PM PDT 24 24289420 ps
T137 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.527258352 Aug 03 04:32:12 PM PDT 24 Aug 03 04:32:15 PM PDT 24 561750977 ps
T913 /workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.1068253250 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:12 PM PDT 24 43610361 ps
T914 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.1221374773 Aug 03 04:32:02 PM PDT 24 Aug 03 04:32:04 PM PDT 24 223676976 ps
T915 /workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.865897939 Aug 03 04:32:01 PM PDT 24 Aug 03 04:32:05 PM PDT 24 71944246 ps
T916 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.566519547 Aug 03 04:32:02 PM PDT 24 Aug 03 04:32:04 PM PDT 24 82078125 ps
T917 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.36692730 Aug 03 04:31:55 PM PDT 24 Aug 03 04:31:57 PM PDT 24 290427989 ps
T918 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.1917021614 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:11 PM PDT 24 19933192 ps
T919 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.3275471174 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:14 PM PDT 24 244247132 ps
T920 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.1671971543 Aug 03 04:31:48 PM PDT 24 Aug 03 04:31:58 PM PDT 24 5175414186 ps
T921 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.438918469 Aug 03 04:31:56 PM PDT 24 Aug 03 04:31:59 PM PDT 24 340993951 ps
T922 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.559861937 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:09 PM PDT 24 119126681 ps
T923 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.2896721597 Aug 03 04:32:06 PM PDT 24 Aug 03 04:32:07 PM PDT 24 33630827 ps
T924 /workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.2332530070 Aug 03 04:32:15 PM PDT 24 Aug 03 04:32:16 PM PDT 24 41402018 ps
T925 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.3474676851 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:15 PM PDT 24 134913995 ps
T132 /workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.1998086073 Aug 03 04:31:58 PM PDT 24 Aug 03 04:32:01 PM PDT 24 366933014 ps
T143 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.286123069 Aug 03 04:32:06 PM PDT 24 Aug 03 04:32:11 PM PDT 24 787136321 ps
T926 /workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.3800058495 Aug 03 04:32:02 PM PDT 24 Aug 03 04:32:04 PM PDT 24 58846855 ps
T927 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.1123432508 Aug 03 04:32:03 PM PDT 24 Aug 03 04:32:08 PM PDT 24 6359740463 ps
T141 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.2295435269 Aug 03 04:32:14 PM PDT 24 Aug 03 04:32:17 PM PDT 24 1757927266 ps
T195 /workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.2766845977 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:11 PM PDT 24 13628509 ps
T928 /workspace/coverage/cover_reg_top/7.lc_ctrl_same_csr_outstanding.2848810005 Aug 03 04:32:04 PM PDT 24 Aug 03 04:32:05 PM PDT 24 15782604 ps
T196 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.2697839269 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:09 PM PDT 24 24595373 ps
T929 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.1399773250 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:11 PM PDT 24 23194513 ps
T930 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.4086086260 Aug 03 04:32:09 PM PDT 24 Aug 03 04:32:10 PM PDT 24 140496052 ps
T931 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.988804317 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:17 PM PDT 24 4026112446 ps
T932 /workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.389184920 Aug 03 04:31:55 PM PDT 24 Aug 03 04:31:58 PM PDT 24 120795136 ps
T933 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.1600091377 Aug 03 04:31:59 PM PDT 24 Aug 03 04:32:00 PM PDT 24 35234404 ps
T934 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.1563891059 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:09 PM PDT 24 64931115 ps
T935 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.2702488984 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:18 PM PDT 24 1460383724 ps
T197 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.2675901668 Aug 03 04:31:54 PM PDT 24 Aug 03 04:31:56 PM PDT 24 78125918 ps
T936 /workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.2546504493 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:10 PM PDT 24 62262543 ps
T937 /workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.408593920 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:12 PM PDT 24 105125968 ps
T938 /workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.2732139979 Aug 03 04:32:14 PM PDT 24 Aug 03 04:32:15 PM PDT 24 79642719 ps
T939 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.3629661752 Aug 03 04:32:06 PM PDT 24 Aug 03 04:32:08 PM PDT 24 94378042 ps
T940 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.1334312723 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:11 PM PDT 24 33648711 ps
T941 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.1910066807 Aug 03 04:32:01 PM PDT 24 Aug 03 04:32:02 PM PDT 24 58075176 ps
T942 /workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.3960949587 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:12 PM PDT 24 67838309 ps
T943 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.1322241471 Aug 03 04:32:05 PM PDT 24 Aug 03 04:32:06 PM PDT 24 195689023 ps
T944 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.2835793061 Aug 03 04:31:59 PM PDT 24 Aug 03 04:32:00 PM PDT 24 70666248 ps
T945 /workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.3969931490 Aug 03 04:31:52 PM PDT 24 Aug 03 04:31:55 PM PDT 24 121629014 ps
T946 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.846805746 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:09 PM PDT 24 46402707 ps
T947 /workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.4203101451 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:09 PM PDT 24 30468082 ps
T948 /workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.2431372751 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:08 PM PDT 24 116512558 ps
T949 /workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.3194379473 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:11 PM PDT 24 78954502 ps
T950 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.4002443455 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:14 PM PDT 24 226747661 ps
T951 /workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.1032897051 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:11 PM PDT 24 42559651 ps
T952 /workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.2990144326 Aug 03 04:31:58 PM PDT 24 Aug 03 04:32:00 PM PDT 24 52025881 ps
T139 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.2849816972 Aug 03 04:32:03 PM PDT 24 Aug 03 04:32:05 PM PDT 24 180282070 ps
T953 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.1620701546 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:10 PM PDT 24 96866346 ps
T954 /workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.804813486 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:13 PM PDT 24 30202456 ps
T955 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_bit_bash.1319674889 Aug 03 04:32:04 PM PDT 24 Aug 03 04:32:56 PM PDT 24 2617598122 ps
T956 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.3893575816 Aug 03 04:31:51 PM PDT 24 Aug 03 04:31:52 PM PDT 24 17794712 ps
T957 /workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.2216347906 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:13 PM PDT 24 106627172 ps
T958 /workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.2379576115 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:08 PM PDT 24 40840940 ps
T959 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.3706916753 Aug 03 04:32:04 PM PDT 24 Aug 03 04:32:14 PM PDT 24 837080132 ps
T198 /workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.3906344231 Aug 03 04:32:09 PM PDT 24 Aug 03 04:32:10 PM PDT 24 30822082 ps
T960 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.2859508305 Aug 03 04:32:02 PM PDT 24 Aug 03 04:32:04 PM PDT 24 17470887 ps
T961 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.2683898812 Aug 03 04:31:55 PM PDT 24 Aug 03 04:31:56 PM PDT 24 45311556 ps
T962 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.2457824462 Aug 03 04:32:15 PM PDT 24 Aug 03 04:32:16 PM PDT 24 38287553 ps
T138 /workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.3188313008 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:09 PM PDT 24 62377901 ps
T963 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.4126996922 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:29 PM PDT 24 1870919367 ps
T964 /workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.2944206869 Aug 03 04:32:12 PM PDT 24 Aug 03 04:32:13 PM PDT 24 161401505 ps
T965 /workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.32323682 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:20 PM PDT 24 1439619442 ps
T966 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.486203605 Aug 03 04:32:03 PM PDT 24 Aug 03 04:32:06 PM PDT 24 226252810 ps
T967 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.2107456464 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:14 PM PDT 24 351753806 ps
T968 /workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.292046984 Aug 03 04:32:14 PM PDT 24 Aug 03 04:32:16 PM PDT 24 365654678 ps
T969 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.3543731605 Aug 03 04:31:53 PM PDT 24 Aug 03 04:31:55 PM PDT 24 28125907 ps
T970 /workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.684140817 Aug 03 04:31:56 PM PDT 24 Aug 03 04:31:58 PM PDT 24 51882499 ps
T971 /workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.4277670163 Aug 03 04:32:01 PM PDT 24 Aug 03 04:32:02 PM PDT 24 103155648 ps
T972 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.1752332598 Aug 03 04:31:52 PM PDT 24 Aug 03 04:32:08 PM PDT 24 2939029439 ps
T973 /workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.1517917234 Aug 03 04:32:11 PM PDT 24 Aug 03 04:32:13 PM PDT 24 47333252 ps
T149 /workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.1037835390 Aug 03 04:32:09 PM PDT 24 Aug 03 04:32:13 PM PDT 24 1274994877 ps
T974 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.1613094830 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:10 PM PDT 24 20237726 ps
T147 /workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.2285738626 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:13 PM PDT 24 631800335 ps
T975 /workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.3301229999 Aug 03 04:32:00 PM PDT 24 Aug 03 04:32:01 PM PDT 24 16932655 ps
T976 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.904910177 Aug 03 04:32:03 PM PDT 24 Aug 03 04:32:06 PM PDT 24 177258292 ps
T977 /workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2902254206 Aug 03 04:32:07 PM PDT 24 Aug 03 04:32:08 PM PDT 24 419002178 ps
T978 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.1628552207 Aug 03 04:32:01 PM PDT 24 Aug 03 04:32:02 PM PDT 24 113305796 ps
T979 /workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.3018408448 Aug 03 04:31:52 PM PDT 24 Aug 03 04:31:54 PM PDT 24 40604903 ps
T980 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.3757639665 Aug 03 04:31:56 PM PDT 24 Aug 03 04:31:58 PM PDT 24 702607319 ps
T148 /workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.691697943 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:11 PM PDT 24 383402495 ps
T981 /workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.1046050488 Aug 03 04:31:59 PM PDT 24 Aug 03 04:32:01 PM PDT 24 27619695 ps
T982 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.110203768 Aug 03 04:31:56 PM PDT 24 Aug 03 04:32:01 PM PDT 24 1152827010 ps
T983 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.436934936 Aug 03 04:31:57 PM PDT 24 Aug 03 04:32:02 PM PDT 24 435966619 ps
T136 /workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.4290586212 Aug 03 04:31:54 PM PDT 24 Aug 03 04:31:58 PM PDT 24 306399376 ps
T984 /workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.4016889070 Aug 03 04:31:53 PM PDT 24 Aug 03 04:31:54 PM PDT 24 15423429 ps
T985 /workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.3849471949 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:12 PM PDT 24 80738995 ps
T986 /workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.3468876592 Aug 03 04:32:14 PM PDT 24 Aug 03 04:32:15 PM PDT 24 18185670 ps
T146 /workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.35203347 Aug 03 04:32:10 PM PDT 24 Aug 03 04:32:13 PM PDT 24 342595438 ps
T987 /workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.1179598710 Aug 03 04:32:03 PM PDT 24 Aug 03 04:32:04 PM PDT 24 42346686 ps
T988 /workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.2826848646 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:09 PM PDT 24 46114612 ps
T989 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.2587291960 Aug 03 04:31:57 PM PDT 24 Aug 03 04:32:10 PM PDT 24 3041858892 ps
T990 /workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.3567694425 Aug 03 04:32:00 PM PDT 24 Aug 03 04:32:02 PM PDT 24 337715347 ps
T991 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.382220144 Aug 03 04:31:53 PM PDT 24 Aug 03 04:31:55 PM PDT 24 137319554 ps
T992 /workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.3332711950 Aug 03 04:32:09 PM PDT 24 Aug 03 04:32:12 PM PDT 24 90674630 ps
T993 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.1310630674 Aug 03 04:32:08 PM PDT 24 Aug 03 04:32:15 PM PDT 24 2947995367 ps
T994 /workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.1411974874 Aug 03 04:31:53 PM PDT 24 Aug 03 04:31:55 PM PDT 24 742608083 ps
T995 /workspace/coverage/cover_reg_top/19.lc_ctrl_csr_mem_rw_with_rand_reset.344190387 Aug 03 04:32:13 PM PDT 24 Aug 03 04:32:14 PM PDT 24 59963914 ps
T996 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.9555328 Aug 03 04:31:54 PM PDT 24 Aug 03 04:31:55 PM PDT 24 31819350 ps
T997 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.1215093104 Aug 03 04:31:55 PM PDT 24 Aug 03 04:31:57 PM PDT 24 60750593 ps
T998 /workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.4020849017 Aug 03 04:31:59 PM PDT 24 Aug 03 04:32:00 PM PDT 24 13928994 ps
T999 /workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1333278733 Aug 03 04:31:52 PM PDT 24 Aug 03 04:31:55 PM PDT 24 2198780034 ps
T1000 /workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.3883636929 Aug 03 04:31:57 PM PDT 24 Aug 03 04:32:01 PM PDT 24 110710823 ps
T1001 /workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.2830180176 Aug 03 04:32:13 PM PDT 24 Aug 03 04:32:14 PM PDT 24 20013937 ps
T1002 /workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.2665280537 Aug 03 04:31:59 PM PDT 24 Aug 03 04:32:01 PM PDT 24 17759398 ps
T1003 /workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.329459483 Aug 03 04:32:00 PM PDT 24 Aug 03 04:32:01 PM PDT 24 29247579 ps
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