Group : lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
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Group : lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
99.30 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_lc_ctrl_env_0.1/lc_ctrl_env_cov.sv



Summary for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 58 1 57 98.28
Crosses 84 0 84 100.00


Variables for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
clk_byp_error_rsp_cp 2 0 2 100.00 100 1 1 2
clk_byp_rsp_mubi_err_cp 2 0 2 100.00 100 1 1 2
count_backdoor_err_cp 2 0 2 100.00 100 1 1 2
count_err_cp 2 0 2 100.00 100 1 1 2
count_illegal_err_cp 2 0 2 100.00 100 1 1 2
err_inj_cp 2 0 2 100.00 100 1 1 0
flash_rma_error_rsp_cp 2 0 2 100.00 100 1 1 2
flash_rma_rsp_mubi_err_cp 2 0 2 100.00 100 1 1 2
jtag_csr_cp 2 0 2 100.00 100 1 1 2
kmac_fsm_backdoor_err_cp 2 0 2 100.00 100 1 1 2
lc_fsm_backdoor_err_cp 2 0 2 100.00 100 1 1 2
otp_lc_data_i_valid_err_cp 2 0 2 100.00 100 1 1 2
otp_partition_err_cp 2 0 2 100.00 100 1 1 2
otp_prog_err_cp 2 0 2 100.00 100 1 1 2
otp_rma_token_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
otp_secrets_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
otp_test_tokens_valid_mubi_err_cp 2 0 2 100.00 100 1 1 2
post_trans_err_cp 2 0 2 100.00 100 1 1 2
security_escalation_err_cp 2 0 2 100.00 100 1 1 2
state_backdoor_err_cp 2 0 2 100.00 100 1 1 2
state_err_cp 2 0 2 100.00 100 1 1 2
state_illegal_err_cp 2 0 2 100.00 100 1 1 2
token_invalid_err_cp 2 0 2 100.00 100 1 1 2
token_mismatch_err_cp 2 0 2 100.00 100 1 1 2
token_mux_ctrl_redun_err_cp 2 0 2 100.00 100 1 1 2
token_mux_digest_err_cp 2 1 1 50.00 100 1 1 2
token_response_err_cp 2 0 2 100.00 100 1 1 2
transition_count_err_cp 2 0 2 100.00 100 1 1 2
transition_err_cp 2 0 2 100.00 100 1 1 2


Crosses for Group lc_ctrl_env_pkg::lc_ctrl_env_cov::err_inj_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
post_trans_err_inj_xp 4 0 4 100.00 100 1 1 0
post_trans_state_err_xp 4 0 4 100.00 100 1 1 0
post_trans_lc_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
post_trans_state_illegal_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_illegal_err_xp 4 0 4 100.00 100 1 1 0
post_trans_count_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_clk_byp_error_rsp_xp 4 0 4 100.00 100 1 1 0
jtag_flash_rma_error_rsp_xp 4 0 4 100.00 100 1 1 0
jtag_otp_prog_err_xp 4 0 4 100.00 100 1 1 0
jtag_otp_partition_err_xp 4 0 4 100.00 100 1 1 0
jtag_token_mismatch_err_xp 4 0 4 100.00 100 1 1 0
jtag_state_err_xp 4 0 4 100.00 100 1 1 0
jtag_state_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_lc_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_kmac_fsm_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_count_err_xp 4 0 4 100.00 100 1 1 0
jtag_count_backdoor_err_xp 4 0 4 100.00 100 1 1 0
jtag_transition_err_xp 4 0 4 100.00 100 1 1 0
jtag_transition_count_err_xp 4 0 4 100.00 100 1 1 0
jtag_post_trans_err_xp 4 0 4 100.00 100 1 1 0


Summary for Variable clk_byp_error_rsp_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for clk_byp_error_rsp_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53357 1 T1 18 T2 88 T3 66
auto[1] 1845 1 T3 9 T4 4 T13 10



Summary for Variable clk_byp_rsp_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for clk_byp_rsp_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54443 1 T1 18 T2 88 T3 75
auto[1] 759 1 T9 15 T28 12 T44 11



Summary for Variable count_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53321 1 T1 18 T2 82 T3 75
auto[1] 1881 1 T2 6 T12 9 T14 7



Summary for Variable count_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53318 1 T1 18 T2 76 T3 75
auto[1] 1884 1 T2 12 T4 1 T12 7



Summary for Variable count_illegal_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for count_illegal_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53333 1 T1 18 T2 79 T3 75
auto[1] 1869 1 T2 9 T4 1 T12 12



Summary for Variable err_inj_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for err_inj_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
err_inj 49903 1 T2 88 T3 75 T4 60
no_err_inj 5299 1 T1 18 T8 12 T4 13



Summary for Variable flash_rma_error_rsp_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for flash_rma_error_rsp_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53194 1 T1 18 T2 88 T3 68
auto[1] 2008 1 T3 7 T4 9 T13 10



Summary for Variable flash_rma_rsp_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for flash_rma_rsp_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54479 1 T1 18 T2 88 T3 75
auto[1] 723 1 T9 11 T28 12 T44 14



Summary for Variable jtag_csr_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for jtag_csr_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 39389 1 T2 88 T8 12 T4 13
auto[1] 15813 1 T1 18 T3 75 T4 60



Summary for Variable kmac_fsm_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for kmac_fsm_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53322 1 T1 18 T2 79 T3 75
auto[1] 1880 1 T2 9 T4 2 T12 10



Summary for Variable lc_fsm_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for lc_fsm_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53298 1 T1 18 T2 75 T3 75
auto[1] 1904 1 T2 13 T4 1 T12 14



Summary for Variable otp_lc_data_i_valid_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_lc_data_i_valid_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53334 1 T1 18 T2 77 T3 75
auto[1] 1868 1 T2 11 T4 2 T12 12



Summary for Variable otp_partition_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_partition_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53207 1 T1 18 T2 88 T3 64
auto[1] 1995 1 T3 11 T4 11 T13 12



Summary for Variable otp_prog_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_prog_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 52830 1 T1 18 T2 88 T3 75
auto[1] 2372 1 T14 4 T29 12 T18 56



Summary for Variable otp_rma_token_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_rma_token_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54490 1 T1 18 T2 88 T3 75
auto[1] 712 1 T9 18 T28 20 T44 12



Summary for Variable otp_secrets_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_secrets_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54454 1 T1 18 T2 88 T3 75
auto[1] 748 1 T9 18 T28 23 T44 12



Summary for Variable otp_test_tokens_valid_mubi_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for otp_test_tokens_valid_mubi_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 54473 1 T1 18 T2 88 T3 75
auto[1] 729 1 T9 16 T28 7 T44 15



Summary for Variable post_trans_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for post_trans_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 52495 1 T1 18 T2 88 T3 75
auto[1] 2707 1 T4 13 T31 14 T18 13



Summary for Variable security_escalation_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for security_escalation_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 51430 1 T1 18 T2 88 T3 75
auto[1] 3772 1 T36 67 T51 69 T54 92



Summary for Variable state_backdoor_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_backdoor_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53299 1 T1 18 T2 79 T3 75
auto[1] 1903 1 T2 9 T4 1 T12 16



Summary for Variable state_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53359 1 T1 18 T2 77 T3 75
auto[1] 1843 1 T2 11 T12 11 T14 5



Summary for Variable state_illegal_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for state_illegal_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53337 1 T1 18 T2 80 T3 75
auto[1] 1865 1 T2 8 T4 1 T12 8



Summary for Variable token_invalid_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_invalid_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53201 1 T1 18 T2 88 T3 65
auto[1] 2001 1 T3 10 T4 4 T13 11



Summary for Variable token_mismatch_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_mismatch_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 49484 1 T1 18 T2 88 T3 65
auto[1] 5718 1 T3 10 T4 5 T13 17



Summary for Variable token_mux_ctrl_redun_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_mux_ctrl_redun_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 51521 1 T1 18 T2 88 T3 75
auto[1] 3681 1 T50 95 T61 100 T62 63



Summary for Variable token_mux_digest_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 1 1 50.00


Automatically Generated Bins for token_mux_digest_err_cp

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[1]] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 55202 1 T1 18 T2 88 T3 75



Summary for Variable token_response_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for token_response_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53211 1 T1 18 T2 88 T3 62
auto[1] 1991 1 T3 13 T4 3 T13 8



Summary for Variable transition_count_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for transition_count_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53208 1 T1 18 T2 88 T3 65
auto[1] 1994 1 T3 10 T4 5 T13 14



Summary for Variable transition_err_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for transition_err_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 53244 1 T1 18 T2 88 T3 70
auto[1] 1958 1 T3 5 T4 10 T13 8



Summary for Cross post_trans_err_inj_xp

Samples crossed: post_trans_err_cp err_inj_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_err_inj_xp

Bins
post_trans_err_cperr_inj_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] err_inj 48546 1 T2 88 T3 75 T4 51
auto[0] no_err_inj 3949 1 T1 18 T8 12 T4 9
auto[1] err_inj 1357 1 T4 9 T31 7 T18 5
auto[1] no_err_inj 1350 1 T4 4 T31 7 T18 8



Summary for Cross post_trans_state_err_xp

Samples crossed: post_trans_err_cp state_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_state_err_xp

Bins
post_trans_err_cpstate_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 50791 1 T1 18 T2 77 T3 75
auto[0] auto[1] 1704 1 T2 11 T12 11 T14 5
auto[1] auto[0] 2568 1 T4 13 T31 14 T18 12
auto[1] auto[1] 139 1 T18 1 T35 3 T86 1



Summary for Cross post_trans_lc_fsm_backdoor_err_xp

Samples crossed: post_trans_err_cp lc_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_lc_fsm_backdoor_err_xp

Bins
post_trans_err_cplc_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 50759 1 T1 18 T2 75 T3 75
auto[0] auto[1] 1736 1 T2 13 T12 14 T14 4
auto[1] auto[0] 2539 1 T4 12 T31 12 T18 13
auto[1] auto[1] 168 1 T4 1 T31 2 T86 1



Summary for Cross post_trans_state_illegal_err_xp

Samples crossed: post_trans_err_cp state_illegal_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_state_illegal_err_xp

Bins
post_trans_err_cpstate_illegal_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 50754 1 T1 18 T2 80 T3 75
auto[0] auto[1] 1741 1 T2 8 T12 8 T14 6
auto[1] auto[0] 2583 1 T4 12 T31 14 T18 13
auto[1] auto[1] 124 1 T4 1 T35 1 T86 2



Summary for Cross post_trans_count_err_xp

Samples crossed: post_trans_err_cp count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_err_xp

Bins
post_trans_err_cpcount_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 50762 1 T1 18 T2 76 T3 75
auto[0] auto[1] 1733 1 T2 12 T12 7 T14 7
auto[1] auto[0] 2556 1 T4 12 T31 14 T18 13
auto[1] auto[1] 151 1 T4 1 T86 1 T149 1



Summary for Cross post_trans_count_illegal_err_xp

Samples crossed: post_trans_err_cp count_illegal_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_illegal_err_xp

Bins
post_trans_err_cpcount_illegal_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 50792 1 T1 18 T2 79 T3 75
auto[0] auto[1] 1703 1 T2 9 T12 12 T14 11
auto[1] auto[0] 2541 1 T4 12 T31 14 T18 13
auto[1] auto[1] 166 1 T4 1 T35 1 T86 2



Summary for Cross post_trans_count_backdoor_err_xp

Samples crossed: post_trans_err_cp count_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for post_trans_count_backdoor_err_xp

Bins
post_trans_err_cpcount_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 50776 1 T1 18 T2 82 T3 75
auto[0] auto[1] 1719 1 T2 6 T12 9 T14 7
auto[1] auto[0] 2545 1 T4 13 T31 14 T18 13
auto[1] auto[1] 162 1 T35 2 T86 4 T151 3



Summary for Cross jtag_clk_byp_error_rsp_xp

Samples crossed: jtag_csr_cp clk_byp_error_rsp_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_clk_byp_error_rsp_xp

Bins
jtag_csr_cpclk_byp_error_rsp_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38205 1 T2 88 T8 12 T4 13
auto[0] auto[1] 1184 1 T14 9 T27 5 T37 6
auto[1] auto[0] 15152 1 T1 18 T3 66 T4 56
auto[1] auto[1] 661 1 T3 9 T4 4 T13 10



Summary for Cross jtag_flash_rma_error_rsp_xp

Samples crossed: jtag_csr_cp flash_rma_error_rsp_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_flash_rma_error_rsp_xp

Bins
jtag_csr_cpflash_rma_error_rsp_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38136 1 T2 88 T8 12 T4 13
auto[0] auto[1] 1253 1 T14 6 T27 5 T37 7
auto[1] auto[0] 15058 1 T1 18 T3 68 T4 51
auto[1] auto[1] 755 1 T3 7 T4 9 T13 10



Summary for Cross jtag_otp_prog_err_xp

Samples crossed: jtag_csr_cp otp_prog_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_otp_prog_err_xp

Bins
jtag_csr_cpotp_prog_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38034 1 T2 88 T8 12 T4 13
auto[0] auto[1] 1355 1 T29 12 T18 36 T208 17
auto[1] auto[0] 14796 1 T1 18 T3 75 T4 60
auto[1] auto[1] 1017 1 T14 4 T18 20 T37 12



Summary for Cross jtag_otp_partition_err_xp

Samples crossed: jtag_csr_cp otp_partition_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_otp_partition_err_xp

Bins
jtag_csr_cpotp_partition_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38122 1 T2 88 T8 12 T4 13
auto[0] auto[1] 1267 1 T14 4 T27 7 T37 6
auto[1] auto[0] 15085 1 T1 18 T3 64 T4 49
auto[1] auto[1] 728 1 T3 11 T4 11 T13 12



Summary for Cross jtag_token_mismatch_err_xp

Samples crossed: jtag_csr_cp token_mismatch_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_token_mismatch_err_xp

Bins
jtag_csr_cptoken_mismatch_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 34362 1 T2 88 T8 12 T4 13
auto[0] auto[1] 5027 1 T14 8 T27 10 T30 59
auto[1] auto[0] 15122 1 T1 18 T3 65 T4 55
auto[1] auto[1] 691 1 T3 10 T4 5 T13 17



Summary for Cross jtag_state_err_xp

Samples crossed: jtag_csr_cp state_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_state_err_xp

Bins
jtag_csr_cpstate_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38316 1 T2 77 T8 12 T4 13
auto[0] auto[1] 1073 1 T2 11 T12 11 T14 5
auto[1] auto[0] 15043 1 T1 18 T3 75 T4 60
auto[1] auto[1] 770 1 T15 6 T17 13 T18 1



Summary for Cross jtag_state_backdoor_err_xp

Samples crossed: jtag_csr_cp state_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_state_backdoor_err_xp

Bins
jtag_csr_cpstate_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38253 1 T2 79 T8 12 T4 12
auto[0] auto[1] 1136 1 T2 9 T4 1 T12 16
auto[1] auto[0] 15046 1 T1 18 T3 75 T4 60
auto[1] auto[1] 767 1 T15 7 T17 6 T18 1



Summary for Cross jtag_lc_fsm_backdoor_err_xp

Samples crossed: jtag_csr_cp lc_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_lc_fsm_backdoor_err_xp

Bins
jtag_csr_cplc_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38239 1 T2 75 T8 12 T4 12
auto[0] auto[1] 1150 1 T2 13 T4 1 T12 14
auto[1] auto[0] 15059 1 T1 18 T3 75 T4 60
auto[1] auto[1] 754 1 T15 7 T17 8 T37 12



Summary for Cross jtag_kmac_fsm_backdoor_err_xp

Samples crossed: jtag_csr_cp kmac_fsm_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_kmac_fsm_backdoor_err_xp

Bins
jtag_csr_cpkmac_fsm_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38282 1 T2 79 T8 12 T4 11
auto[0] auto[1] 1107 1 T2 9 T4 2 T12 10
auto[1] auto[0] 15040 1 T1 18 T3 75 T4 60
auto[1] auto[1] 773 1 T15 9 T17 6 T18 1



Summary for Cross jtag_count_err_xp

Samples crossed: jtag_csr_cp count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_count_err_xp

Bins
jtag_csr_cpcount_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38264 1 T2 76 T8 12 T4 12
auto[0] auto[1] 1125 1 T2 12 T4 1 T12 7
auto[1] auto[0] 15054 1 T1 18 T3 75 T4 60
auto[1] auto[1] 759 1 T15 7 T17 6 T37 8



Summary for Cross jtag_count_backdoor_err_xp

Samples crossed: jtag_csr_cp count_backdoor_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_count_backdoor_err_xp

Bins
jtag_csr_cpcount_backdoor_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38267 1 T2 82 T8 12 T4 13
auto[0] auto[1] 1122 1 T2 6 T12 9 T14 7
auto[1] auto[0] 15054 1 T1 18 T3 75 T4 60
auto[1] auto[1] 759 1 T15 4 T17 4 T37 9



Summary for Cross jtag_transition_err_xp

Samples crossed: jtag_csr_cp transition_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_transition_err_xp

Bins
jtag_csr_cptransition_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38123 1 T2 88 T8 12 T4 13
auto[0] auto[1] 1266 1 T14 14 T27 8 T37 10
auto[1] auto[0] 15121 1 T1 18 T3 70 T4 50
auto[1] auto[1] 692 1 T3 5 T4 10 T13 8



Summary for Cross jtag_transition_count_err_xp

Samples crossed: jtag_csr_cp transition_count_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_transition_count_err_xp

Bins
jtag_csr_cptransition_count_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 38137 1 T2 88 T8 12 T4 13
auto[0] auto[1] 1252 1 T14 4 T27 6 T37 9
auto[1] auto[0] 15071 1 T1 18 T3 65 T4 55
auto[1] auto[1] 742 1 T3 10 T4 5 T13 14



Summary for Cross jtag_post_trans_err_xp

Samples crossed: jtag_csr_cp post_trans_err_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 4 0 4 100.00


Automatically Generated Cross Bins for jtag_post_trans_err_xp

Bins
jtag_csr_cppost_trans_err_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] 37780 1 T2 88 T8 12 T9 78
auto[0] auto[1] 1609 1 T4 13 T31 14 T35 14
auto[1] auto[0] 14715 1 T1 18 T3 75 T4 60
auto[1] auto[1] 1098 1 T18 13 T35 13 T86 12

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