| T190 |
/workspace/coverage/default/2.lc_ctrl_claim_transition_if.3064943910 |
|
|
Aug 05 04:55:54 PM PDT 24 |
Aug 05 04:55:55 PM PDT 24 |
11614427 ps |
| T811 |
/workspace/coverage/default/0.lc_ctrl_stress_all.484092693 |
|
|
Aug 05 04:55:48 PM PDT 24 |
Aug 05 04:56:31 PM PDT 24 |
9754857900 ps |
| T812 |
/workspace/coverage/default/25.lc_ctrl_sec_token_digest.3267846823 |
|
|
Aug 05 04:56:59 PM PDT 24 |
Aug 05 04:57:12 PM PDT 24 |
528033817 ps |
| T813 |
/workspace/coverage/default/11.lc_ctrl_jtag_access.1925965225 |
|
|
Aug 05 04:56:19 PM PDT 24 |
Aug 05 04:56:28 PM PDT 24 |
1549128103 ps |
| T814 |
/workspace/coverage/default/29.lc_ctrl_security_escalation.1663381853 |
|
|
Aug 05 04:57:22 PM PDT 24 |
Aug 05 04:57:31 PM PDT 24 |
190831240 ps |
| T815 |
/workspace/coverage/default/16.lc_ctrl_security_escalation.1157174469 |
|
|
Aug 05 04:56:31 PM PDT 24 |
Aug 05 04:56:38 PM PDT 24 |
337802358 ps |
| T816 |
/workspace/coverage/default/5.lc_ctrl_jtag_state_post_trans.3802352210 |
|
|
Aug 05 04:56:04 PM PDT 24 |
Aug 05 04:56:14 PM PDT 24 |
490452062 ps |
| T817 |
/workspace/coverage/default/19.lc_ctrl_sec_token_mux.2468323031 |
|
|
Aug 05 04:56:44 PM PDT 24 |
Aug 05 04:56:58 PM PDT 24 |
568348458 ps |
| T818 |
/workspace/coverage/default/8.lc_ctrl_stress_all.3799085553 |
|
|
Aug 05 04:56:18 PM PDT 24 |
Aug 05 05:01:11 PM PDT 24 |
34089081226 ps |
| T819 |
/workspace/coverage/default/10.lc_ctrl_alert_test.3548330182 |
|
|
Aug 05 04:56:19 PM PDT 24 |
Aug 05 04:56:20 PM PDT 24 |
60247803 ps |
| T820 |
/workspace/coverage/default/19.lc_ctrl_smoke.812291792 |
|
|
Aug 05 04:56:43 PM PDT 24 |
Aug 05 04:56:47 PM PDT 24 |
442775528 ps |
| T821 |
/workspace/coverage/default/45.lc_ctrl_errors.4147153785 |
|
|
Aug 05 04:57:40 PM PDT 24 |
Aug 05 04:57:50 PM PDT 24 |
352643041 ps |
| T822 |
/workspace/coverage/default/8.lc_ctrl_prog_failure.3005380713 |
|
|
Aug 05 04:56:14 PM PDT 24 |
Aug 05 04:56:16 PM PDT 24 |
342273258 ps |
| T823 |
/workspace/coverage/default/15.lc_ctrl_jtag_access.2513348253 |
|
|
Aug 05 04:57:04 PM PDT 24 |
Aug 05 04:57:15 PM PDT 24 |
1952190786 ps |
| T824 |
/workspace/coverage/default/22.lc_ctrl_stress_all.1012321165 |
|
|
Aug 05 04:56:46 PM PDT 24 |
Aug 05 04:59:43 PM PDT 24 |
4795401725 ps |
| T825 |
/workspace/coverage/default/9.lc_ctrl_state_failure.2750973583 |
|
|
Aug 05 04:56:20 PM PDT 24 |
Aug 05 04:56:47 PM PDT 24 |
307101195 ps |
| T826 |
/workspace/coverage/default/26.lc_ctrl_smoke.494065176 |
|
|
Aug 05 04:56:58 PM PDT 24 |
Aug 05 04:57:00 PM PDT 24 |
119086738 ps |
| T827 |
/workspace/coverage/default/31.lc_ctrl_state_post_trans.868319952 |
|
|
Aug 05 04:57:05 PM PDT 24 |
Aug 05 04:57:14 PM PDT 24 |
86912080 ps |
| T828 |
/workspace/coverage/default/11.lc_ctrl_jtag_errors.2732292036 |
|
|
Aug 05 04:56:19 PM PDT 24 |
Aug 05 04:57:43 PM PDT 24 |
2928410784 ps |
| T829 |
/workspace/coverage/default/34.lc_ctrl_state_failure.1822039167 |
|
|
Aug 05 04:57:13 PM PDT 24 |
Aug 05 04:57:35 PM PDT 24 |
466857769 ps |
| T830 |
/workspace/coverage/default/49.lc_ctrl_state_failure.2473797578 |
|
|
Aug 05 04:57:59 PM PDT 24 |
Aug 05 04:58:26 PM PDT 24 |
767294315 ps |
| T831 |
/workspace/coverage/default/29.lc_ctrl_errors.97053120 |
|
|
Aug 05 04:57:04 PM PDT 24 |
Aug 05 04:57:18 PM PDT 24 |
448201457 ps |
| T832 |
/workspace/coverage/default/13.lc_ctrl_prog_failure.3579929645 |
|
|
Aug 05 04:56:25 PM PDT 24 |
Aug 05 04:56:27 PM PDT 24 |
47362182 ps |
| T833 |
/workspace/coverage/default/34.lc_ctrl_volatile_unlock_smoke.3018994292 |
|
|
Aug 05 04:57:06 PM PDT 24 |
Aug 05 04:57:07 PM PDT 24 |
14166148 ps |
| T834 |
/workspace/coverage/default/45.lc_ctrl_prog_failure.1109862157 |
|
|
Aug 05 04:57:34 PM PDT 24 |
Aug 05 04:57:36 PM PDT 24 |
73712889 ps |
| T835 |
/workspace/coverage/default/8.lc_ctrl_jtag_state_failure.3448356208 |
|
|
Aug 05 04:56:20 PM PDT 24 |
Aug 05 04:57:52 PM PDT 24 |
2804215049 ps |
| T836 |
/workspace/coverage/default/34.lc_ctrl_sec_mubi.1252775454 |
|
|
Aug 05 04:57:35 PM PDT 24 |
Aug 05 04:57:47 PM PDT 24 |
342939582 ps |
| T837 |
/workspace/coverage/default/34.lc_ctrl_jtag_access.1885553604 |
|
|
Aug 05 04:57:12 PM PDT 24 |
Aug 05 04:57:15 PM PDT 24 |
167727912 ps |
| T838 |
/workspace/coverage/default/2.lc_ctrl_state_failure.3627655331 |
|
|
Aug 05 04:56:00 PM PDT 24 |
Aug 05 04:56:32 PM PDT 24 |
1453383536 ps |
| T839 |
/workspace/coverage/default/12.lc_ctrl_volatile_unlock_smoke.1539774697 |
|
|
Aug 05 04:56:20 PM PDT 24 |
Aug 05 04:56:21 PM PDT 24 |
19826284 ps |
| T840 |
/workspace/coverage/default/5.lc_ctrl_sec_token_mux.3842369595 |
|
|
Aug 05 04:56:14 PM PDT 24 |
Aug 05 04:56:25 PM PDT 24 |
663287232 ps |
| T841 |
/workspace/coverage/default/49.lc_ctrl_sec_token_digest.3064466487 |
|
|
Aug 05 04:58:37 PM PDT 24 |
Aug 05 04:58:47 PM PDT 24 |
484281951 ps |
| T842 |
/workspace/coverage/default/17.lc_ctrl_jtag_state_failure.51789573 |
|
|
Aug 05 04:56:47 PM PDT 24 |
Aug 05 04:57:35 PM PDT 24 |
926956908 ps |
| T843 |
/workspace/coverage/default/15.lc_ctrl_prog_failure.2979401383 |
|
|
Aug 05 04:56:21 PM PDT 24 |
Aug 05 04:56:24 PM PDT 24 |
194601141 ps |
| T844 |
/workspace/coverage/default/47.lc_ctrl_errors.2222771027 |
|
|
Aug 05 04:57:33 PM PDT 24 |
Aug 05 04:57:43 PM PDT 24 |
1095956447 ps |
| T845 |
/workspace/coverage/default/47.lc_ctrl_volatile_unlock_smoke.2487293023 |
|
|
Aug 05 04:57:35 PM PDT 24 |
Aug 05 04:57:36 PM PDT 24 |
28879779 ps |
| T846 |
/workspace/coverage/default/2.lc_ctrl_prog_failure.1154918802 |
|
|
Aug 05 04:55:43 PM PDT 24 |
Aug 05 04:55:47 PM PDT 24 |
170497278 ps |
| T847 |
/workspace/coverage/default/28.lc_ctrl_volatile_unlock_smoke.3743553769 |
|
|
Aug 05 04:57:18 PM PDT 24 |
Aug 05 04:57:20 PM PDT 24 |
20403561 ps |
| T848 |
/workspace/coverage/default/32.lc_ctrl_sec_token_digest.2114299019 |
|
|
Aug 05 04:57:07 PM PDT 24 |
Aug 05 04:57:18 PM PDT 24 |
358688482 ps |
| T849 |
/workspace/coverage/default/42.lc_ctrl_state_failure.508694401 |
|
|
Aug 05 04:57:30 PM PDT 24 |
Aug 05 04:57:50 PM PDT 24 |
616976391 ps |
| T850 |
/workspace/coverage/default/19.lc_ctrl_jtag_access.2393544121 |
|
|
Aug 05 04:56:46 PM PDT 24 |
Aug 05 04:56:58 PM PDT 24 |
427496389 ps |
| T851 |
/workspace/coverage/default/28.lc_ctrl_prog_failure.1637255769 |
|
|
Aug 05 04:57:05 PM PDT 24 |
Aug 05 04:57:09 PM PDT 24 |
312156229 ps |
| T852 |
/workspace/coverage/default/7.lc_ctrl_jtag_state_failure.808340035 |
|
|
Aug 05 04:56:27 PM PDT 24 |
Aug 05 04:57:03 PM PDT 24 |
1081895432 ps |
| T853 |
/workspace/coverage/default/39.lc_ctrl_sec_token_mux.3965989848 |
|
|
Aug 05 04:57:32 PM PDT 24 |
Aug 05 04:57:38 PM PDT 24 |
2584280540 ps |
| T854 |
/workspace/coverage/default/34.lc_ctrl_smoke.2442085223 |
|
|
Aug 05 04:57:16 PM PDT 24 |
Aug 05 04:57:20 PM PDT 24 |
162966323 ps |
| T855 |
/workspace/coverage/default/26.lc_ctrl_errors.2686012472 |
|
|
Aug 05 04:57:00 PM PDT 24 |
Aug 05 04:57:13 PM PDT 24 |
403977319 ps |
| T856 |
/workspace/coverage/default/21.lc_ctrl_sec_token_mux.3900932449 |
|
|
Aug 05 04:56:51 PM PDT 24 |
Aug 05 04:57:01 PM PDT 24 |
1025287318 ps |
| T857 |
/workspace/coverage/default/11.lc_ctrl_sec_mubi.4188532135 |
|
|
Aug 05 04:56:29 PM PDT 24 |
Aug 05 04:56:41 PM PDT 24 |
223383772 ps |
| T858 |
/workspace/coverage/default/21.lc_ctrl_volatile_unlock_smoke.1216792097 |
|
|
Aug 05 04:57:12 PM PDT 24 |
Aug 05 04:57:13 PM PDT 24 |
10171625 ps |
| T859 |
/workspace/coverage/default/33.lc_ctrl_volatile_unlock_smoke.2229602808 |
|
|
Aug 05 04:57:20 PM PDT 24 |
Aug 05 04:57:21 PM PDT 24 |
60689260 ps |
| T860 |
/workspace/coverage/default/17.lc_ctrl_security_escalation.3843782520 |
|
|
Aug 05 04:56:37 PM PDT 24 |
Aug 05 04:56:50 PM PDT 24 |
728790323 ps |
| T861 |
/workspace/coverage/default/46.lc_ctrl_alert_test.2629370153 |
|
|
Aug 05 04:58:00 PM PDT 24 |
Aug 05 04:58:01 PM PDT 24 |
74950198 ps |
| T862 |
/workspace/coverage/default/24.lc_ctrl_security_escalation.3565998818 |
|
|
Aug 05 04:56:47 PM PDT 24 |
Aug 05 04:56:56 PM PDT 24 |
387520505 ps |
| T863 |
/workspace/coverage/default/32.lc_ctrl_jtag_access.683145450 |
|
|
Aug 05 04:57:06 PM PDT 24 |
Aug 05 04:57:16 PM PDT 24 |
359655874 ps |
| T864 |
/workspace/coverage/default/42.lc_ctrl_prog_failure.3401820358 |
|
|
Aug 05 04:57:26 PM PDT 24 |
Aug 05 04:57:28 PM PDT 24 |
136122308 ps |
| T865 |
/workspace/coverage/default/9.lc_ctrl_alert_test.106631779 |
|
|
Aug 05 04:56:12 PM PDT 24 |
Aug 05 04:56:13 PM PDT 24 |
71216068 ps |
| T866 |
/workspace/coverage/default/32.lc_ctrl_errors.1758032170 |
|
|
Aug 05 04:57:28 PM PDT 24 |
Aug 05 04:57:45 PM PDT 24 |
2181822317 ps |
| T867 |
/workspace/coverage/default/19.lc_ctrl_sec_token_digest.3808617382 |
|
|
Aug 05 04:56:53 PM PDT 24 |
Aug 05 04:57:02 PM PDT 24 |
1704946029 ps |
| T868 |
/workspace/coverage/default/37.lc_ctrl_sec_token_mux.2172083592 |
|
|
Aug 05 04:57:33 PM PDT 24 |
Aug 05 04:57:43 PM PDT 24 |
326706265 ps |
| T869 |
/workspace/coverage/default/21.lc_ctrl_errors.746505832 |
|
|
Aug 05 04:56:43 PM PDT 24 |
Aug 05 04:56:52 PM PDT 24 |
354143603 ps |
| T870 |
/workspace/coverage/default/6.lc_ctrl_jtag_state_failure.4257355751 |
|
|
Aug 05 04:56:10 PM PDT 24 |
Aug 05 04:57:10 PM PDT 24 |
21964383174 ps |
| T871 |
/workspace/coverage/default/30.lc_ctrl_state_failure.3030161673 |
|
|
Aug 05 04:57:01 PM PDT 24 |
Aug 05 04:57:39 PM PDT 24 |
2545630797 ps |
| T872 |
/workspace/coverage/default/30.lc_ctrl_state_post_trans.1265086718 |
|
|
Aug 05 04:57:25 PM PDT 24 |
Aug 05 04:57:36 PM PDT 24 |
98529620 ps |
| T873 |
/workspace/coverage/default/39.lc_ctrl_prog_failure.2566248496 |
|
|
Aug 05 04:57:34 PM PDT 24 |
Aug 05 04:57:37 PM PDT 24 |
162363264 ps |
| T874 |
/workspace/coverage/default/20.lc_ctrl_stress_all.3011909684 |
|
|
Aug 05 04:56:44 PM PDT 24 |
Aug 05 04:57:15 PM PDT 24 |
2065042799 ps |
| T875 |
/workspace/coverage/default/40.lc_ctrl_prog_failure.3861972875 |
|
|
Aug 05 04:57:40 PM PDT 24 |
Aug 05 04:57:43 PM PDT 24 |
446900575 ps |
| T876 |
/workspace/coverage/default/42.lc_ctrl_alert_test.3860716315 |
|
|
Aug 05 04:57:50 PM PDT 24 |
Aug 05 04:57:51 PM PDT 24 |
61476077 ps |
| T877 |
/workspace/coverage/default/28.lc_ctrl_state_post_trans.2781209127 |
|
|
Aug 05 04:56:49 PM PDT 24 |
Aug 05 04:56:58 PM PDT 24 |
375157253 ps |
| T878 |
/workspace/coverage/default/20.lc_ctrl_sec_mubi.2519408096 |
|
|
Aug 05 04:56:55 PM PDT 24 |
Aug 05 04:57:17 PM PDT 24 |
2429060196 ps |
| T879 |
/workspace/coverage/default/32.lc_ctrl_alert_test.265239239 |
|
|
Aug 05 04:57:21 PM PDT 24 |
Aug 05 04:57:22 PM PDT 24 |
84565261 ps |
| T880 |
/workspace/coverage/default/6.lc_ctrl_jtag_state_post_trans.3790514807 |
|
|
Aug 05 04:56:19 PM PDT 24 |
Aug 05 04:56:35 PM PDT 24 |
1361436091 ps |
| T881 |
/workspace/coverage/default/47.lc_ctrl_jtag_access.1261008673 |
|
|
Aug 05 04:57:44 PM PDT 24 |
Aug 05 04:57:53 PM PDT 24 |
1206478238 ps |
| T882 |
/workspace/coverage/default/30.lc_ctrl_smoke.2072793513 |
|
|
Aug 05 04:57:11 PM PDT 24 |
Aug 05 04:57:15 PM PDT 24 |
1098690015 ps |
| T103 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_rw.1378724845 |
|
|
Aug 05 04:55:14 PM PDT 24 |
Aug 05 04:55:15 PM PDT 24 |
12369775 ps |
| T109 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_rw.1271542822 |
|
|
Aug 05 04:54:50 PM PDT 24 |
Aug 05 04:54:52 PM PDT 24 |
75688899 ps |
| T99 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_mem_rw_with_rand_reset.3281756405 |
|
|
Aug 05 04:54:56 PM PDT 24 |
Aug 05 04:54:57 PM PDT 24 |
58507011 ps |
| T104 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_aliasing.3180801906 |
|
|
Aug 05 04:55:05 PM PDT 24 |
Aug 05 04:55:23 PM PDT 24 |
869627393 ps |
| T95 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_intg_err.4095644290 |
|
|
Aug 05 04:54:59 PM PDT 24 |
Aug 05 04:55:08 PM PDT 24 |
439692840 ps |
| T96 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_errors.3666556651 |
|
|
Aug 05 04:54:57 PM PDT 24 |
Aug 05 04:54:59 PM PDT 24 |
238492451 ps |
| T130 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_same_csr_outstanding.2457273684 |
|
|
Aug 05 04:55:15 PM PDT 24 |
Aug 05 04:55:17 PM PDT 24 |
41596878 ps |
| T132 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_rw.38131724 |
|
|
Aug 05 04:55:00 PM PDT 24 |
Aug 05 04:55:03 PM PDT 24 |
67040555 ps |
| T141 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_rw.3993710497 |
|
|
Aug 05 04:55:14 PM PDT 24 |
Aug 05 04:55:15 PM PDT 24 |
20135072 ps |
| T142 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_aliasing.1080198340 |
|
|
Aug 05 04:55:00 PM PDT 24 |
Aug 05 04:55:01 PM PDT 24 |
305386161 ps |
| T143 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_hw_reset.2768531878 |
|
|
Aug 05 04:55:04 PM PDT 24 |
Aug 05 04:55:06 PM PDT 24 |
67517573 ps |
| T144 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_same_csr_outstanding.3595193186 |
|
|
Aug 05 04:55:05 PM PDT 24 |
Aug 05 04:55:06 PM PDT 24 |
106445638 ps |
| T97 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_mem_rw_with_rand_reset.490716158 |
|
|
Aug 05 04:55:25 PM PDT 24 |
Aug 05 04:55:27 PM PDT 24 |
56170203 ps |
| T180 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_same_csr_outstanding.507880995 |
|
|
Aug 05 04:54:58 PM PDT 24 |
Aug 05 04:55:00 PM PDT 24 |
38606383 ps |
| T181 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_same_csr_outstanding.2901734897 |
|
|
Aug 05 04:54:59 PM PDT 24 |
Aug 05 04:55:00 PM PDT 24 |
15192002 ps |
| T883 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_bit_bash.2396638004 |
|
|
Aug 05 04:55:04 PM PDT 24 |
Aug 05 04:55:05 PM PDT 24 |
105508581 ps |
| T156 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_mem_rw_with_rand_reset.10142848 |
|
|
Aug 05 04:55:23 PM PDT 24 |
Aug 05 04:55:25 PM PDT 24 |
16039187 ps |
| T182 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_same_csr_outstanding.3240257705 |
|
|
Aug 05 04:55:19 PM PDT 24 |
Aug 05 04:55:20 PM PDT 24 |
33364550 ps |
| T183 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_rw.2147234745 |
|
|
Aug 05 04:55:23 PM PDT 24 |
Aug 05 04:55:24 PM PDT 24 |
15944775 ps |
| T115 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1883362460 |
|
|
Aug 05 04:54:49 PM PDT 24 |
Aug 05 04:54:54 PM PDT 24 |
178385031 ps |
| T884 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_rw.2744237993 |
|
|
Aug 05 04:54:50 PM PDT 24 |
Aug 05 04:54:52 PM PDT 24 |
65012600 ps |
| T101 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_intg_err.663524620 |
|
|
Aug 05 04:54:54 PM PDT 24 |
Aug 05 04:54:56 PM PDT 24 |
168844909 ps |
| T187 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_bit_bash.379946153 |
|
|
Aug 05 04:55:04 PM PDT 24 |
Aug 05 04:55:18 PM PDT 24 |
1655705589 ps |
| T885 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_mem_rw_with_rand_reset.3146552964 |
|
|
Aug 05 04:55:17 PM PDT 24 |
Aug 05 04:55:19 PM PDT 24 |
88014149 ps |
| T886 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_aliasing.723299358 |
|
|
Aug 05 04:54:56 PM PDT 24 |
Aug 05 04:54:57 PM PDT 24 |
28432836 ps |
| T887 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_hw_reset.4110041904 |
|
|
Aug 05 04:54:44 PM PDT 24 |
Aug 05 04:54:48 PM PDT 24 |
183232197 ps |
| T100 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_intg_err.2260956884 |
|
|
Aug 05 04:55:19 PM PDT 24 |
Aug 05 04:55:23 PM PDT 24 |
318350018 ps |
| T888 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_bit_bash.177948152 |
|
|
Aug 05 04:55:06 PM PDT 24 |
Aug 05 04:55:14 PM PDT 24 |
3172126656 ps |
| T889 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_hw_reset.2626941567 |
|
|
Aug 05 04:54:46 PM PDT 24 |
Aug 05 04:54:47 PM PDT 24 |
27798702 ps |
| T890 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2033533184 |
|
|
Aug 05 04:54:58 PM PDT 24 |
Aug 05 04:55:00 PM PDT 24 |
186655754 ps |
| T891 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_hw_reset.1136230311 |
|
|
Aug 05 04:55:08 PM PDT 24 |
Aug 05 04:55:11 PM PDT 24 |
126455892 ps |
| T184 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_same_csr_outstanding.48159393 |
|
|
Aug 05 04:55:12 PM PDT 24 |
Aug 05 04:55:13 PM PDT 24 |
15728413 ps |
| T892 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_alert_test.2857415675 |
|
|
Aug 05 04:55:04 PM PDT 24 |
Aug 05 04:55:06 PM PDT 24 |
81649447 ps |
| T106 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_intg_err.1342196845 |
|
|
Aug 05 04:55:25 PM PDT 24 |
Aug 05 04:55:29 PM PDT 24 |
300679792 ps |
| T893 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_hw_reset.2348619830 |
|
|
Aug 05 04:54:57 PM PDT 24 |
Aug 05 04:55:03 PM PDT 24 |
1161896182 ps |
| T894 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_alert_test.4274481060 |
|
|
Aug 05 04:55:19 PM PDT 24 |
Aug 05 04:55:22 PM PDT 24 |
293029761 ps |
| T895 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_aliasing.1291391278 |
|
|
Aug 05 04:54:48 PM PDT 24 |
Aug 05 04:54:52 PM PDT 24 |
334860654 ps |
| T896 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_csr_rw.4143936991 |
|
|
Aug 05 04:55:22 PM PDT 24 |
Aug 05 04:55:23 PM PDT 24 |
13500186 ps |
| T131 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_aliasing.161496215 |
|
|
Aug 05 04:55:04 PM PDT 24 |
Aug 05 04:55:09 PM PDT 24 |
1109492677 ps |
| T897 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_mem_rw_with_rand_reset.551423098 |
|
|
Aug 05 04:55:13 PM PDT 24 |
Aug 05 04:55:15 PM PDT 24 |
24702229 ps |
| T128 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_tl_intg_err.864198894 |
|
|
Aug 05 04:55:15 PM PDT 24 |
Aug 05 04:55:18 PM PDT 24 |
233527568 ps |
| T185 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_same_csr_outstanding.2076543080 |
|
|
Aug 05 04:54:48 PM PDT 24 |
Aug 05 04:54:50 PM PDT 24 |
22330561 ps |
| T898 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_aliasing.2163228995 |
|
|
Aug 05 04:54:57 PM PDT 24 |
Aug 05 04:54:59 PM PDT 24 |
24495818 ps |
| T899 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_bit_bash.2975276539 |
|
|
Aug 05 04:55:04 PM PDT 24 |
Aug 05 04:55:20 PM PDT 24 |
2411240756 ps |
| T107 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_intg_err.2778498416 |
|
|
Aug 05 04:55:28 PM PDT 24 |
Aug 05 04:55:30 PM PDT 24 |
43368753 ps |
| T102 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_errors.1636897795 |
|
|
Aug 05 04:55:00 PM PDT 24 |
Aug 05 04:55:02 PM PDT 24 |
115038326 ps |
| T900 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_aliasing.3501877583 |
|
|
Aug 05 04:55:16 PM PDT 24 |
Aug 05 04:55:24 PM PDT 24 |
336213547 ps |
| T186 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_same_csr_outstanding.2908391950 |
|
|
Aug 05 04:55:04 PM PDT 24 |
Aug 05 04:55:06 PM PDT 24 |
64163944 ps |
| T901 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_rw.3797442655 |
|
|
Aug 05 04:54:44 PM PDT 24 |
Aug 05 04:54:46 PM PDT 24 |
22855859 ps |
| T120 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_intg_err.2923680022 |
|
|
Aug 05 04:54:57 PM PDT 24 |
Aug 05 04:55:00 PM PDT 24 |
84594596 ps |
| T902 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_csr_rw.3494776283 |
|
|
Aug 05 04:55:05 PM PDT 24 |
Aug 05 04:55:06 PM PDT 24 |
47958549 ps |
| T110 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_tl_errors.350530743 |
|
|
Aug 05 04:55:06 PM PDT 24 |
Aug 05 04:55:09 PM PDT 24 |
67090191 ps |
| T903 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_rw.842883780 |
|
|
Aug 05 04:54:51 PM PDT 24 |
Aug 05 04:54:52 PM PDT 24 |
27390368 ps |
| T904 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_alert_test.151090301 |
|
|
Aug 05 04:54:58 PM PDT 24 |
Aug 05 04:55:00 PM PDT 24 |
466519178 ps |
| T170 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_rw.793244626 |
|
|
Aug 05 04:55:21 PM PDT 24 |
Aug 05 04:55:22 PM PDT 24 |
39362583 ps |
| T114 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_errors.904574226 |
|
|
Aug 05 04:55:36 PM PDT 24 |
Aug 05 04:55:38 PM PDT 24 |
64511892 ps |
| T905 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_rw.2968078551 |
|
|
Aug 05 04:54:57 PM PDT 24 |
Aug 05 04:54:58 PM PDT 24 |
12763145 ps |
| T112 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_intg_err.921828498 |
|
|
Aug 05 04:54:47 PM PDT 24 |
Aug 05 04:54:49 PM PDT 24 |
78372524 ps |
| T122 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1000383938 |
|
|
Aug 05 04:55:06 PM PDT 24 |
Aug 05 04:55:09 PM PDT 24 |
689908240 ps |
| T906 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_bit_bash.1737394938 |
|
|
Aug 05 04:55:16 PM PDT 24 |
Aug 05 04:55:23 PM PDT 24 |
3805556892 ps |
| T907 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_same_csr_outstanding.2102451220 |
|
|
Aug 05 04:55:17 PM PDT 24 |
Aug 05 04:55:19 PM PDT 24 |
82241235 ps |
| T129 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_intg_err.955113936 |
|
|
Aug 05 04:54:59 PM PDT 24 |
Aug 05 04:55:03 PM PDT 24 |
224018670 ps |
| T908 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_mem_rw_with_rand_reset.160468030 |
|
|
Aug 05 04:55:08 PM PDT 24 |
Aug 05 04:55:09 PM PDT 24 |
18115809 ps |
| T909 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_bit_bash.3596200015 |
|
|
Aug 05 04:54:58 PM PDT 24 |
Aug 05 04:55:00 PM PDT 24 |
38763832 ps |
| T910 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_same_csr_outstanding.828004095 |
|
|
Aug 05 04:55:19 PM PDT 24 |
Aug 05 04:55:21 PM PDT 24 |
53985641 ps |
| T123 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_tl_intg_err.4020277575 |
|
|
Aug 05 04:54:56 PM PDT 24 |
Aug 05 04:54:59 PM PDT 24 |
433880388 ps |
| T911 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_mem_rw_with_rand_reset.4294410511 |
|
|
Aug 05 04:55:03 PM PDT 24 |
Aug 05 04:55:04 PM PDT 24 |
18492582 ps |
| T116 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_tl_errors.3721788240 |
|
|
Aug 05 04:55:02 PM PDT 24 |
Aug 05 04:55:04 PM PDT 24 |
114390078 ps |
| T171 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_rw.852367585 |
|
|
Aug 05 04:54:56 PM PDT 24 |
Aug 05 04:54:57 PM PDT 24 |
13543523 ps |
| T172 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_csr_rw.1379867178 |
|
|
Aug 05 04:55:10 PM PDT 24 |
Aug 05 04:55:11 PM PDT 24 |
52431810 ps |
| T111 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_errors.4092443044 |
|
|
Aug 05 04:55:21 PM PDT 24 |
Aug 05 04:55:23 PM PDT 24 |
64654740 ps |
| T912 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_same_csr_outstanding.496408030 |
|
|
Aug 05 04:55:07 PM PDT 24 |
Aug 05 04:55:09 PM PDT 24 |
164758350 ps |
| T118 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_intg_err.162685191 |
|
|
Aug 05 04:54:59 PM PDT 24 |
Aug 05 04:55:02 PM PDT 24 |
247288852 ps |
| T913 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_bit_bash.816690178 |
|
|
Aug 05 04:54:44 PM PDT 24 |
Aug 05 04:54:47 PM PDT 24 |
346933003 ps |
| T914 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_tl_errors.2982621360 |
|
|
Aug 05 04:54:55 PM PDT 24 |
Aug 05 04:54:58 PM PDT 24 |
232737157 ps |
| T173 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_hw_reset.1199143959 |
|
|
Aug 05 04:54:56 PM PDT 24 |
Aug 05 04:54:57 PM PDT 24 |
14859263 ps |
| T915 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_aliasing.957546642 |
|
|
Aug 05 04:54:55 PM PDT 24 |
Aug 05 04:55:01 PM PDT 24 |
191978943 ps |
| T916 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_hw_reset.3605690139 |
|
|
Aug 05 04:55:02 PM PDT 24 |
Aug 05 04:55:03 PM PDT 24 |
13475677 ps |
| T917 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_same_csr_outstanding.3395280817 |
|
|
Aug 05 04:54:57 PM PDT 24 |
Aug 05 04:54:59 PM PDT 24 |
124728636 ps |
| T113 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_tl_intg_err.1418924098 |
|
|
Aug 05 04:55:25 PM PDT 24 |
Aug 05 04:55:28 PM PDT 24 |
140599002 ps |
| T918 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.3393311447 |
|
|
Aug 05 04:55:01 PM PDT 24 |
Aug 05 04:55:03 PM PDT 24 |
134291053 ps |
| T919 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_bit_bash.3592407852 |
|
|
Aug 05 04:54:58 PM PDT 24 |
Aug 05 04:55:07 PM PDT 24 |
695361801 ps |
| T920 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_same_csr_outstanding.2745211602 |
|
|
Aug 05 04:55:03 PM PDT 24 |
Aug 05 04:55:05 PM PDT 24 |
342748855 ps |
| T921 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_csr_mem_rw_with_rand_reset.1137298470 |
|
|
Aug 05 04:54:48 PM PDT 24 |
Aug 05 04:54:49 PM PDT 24 |
217277809 ps |
| T121 |
/workspace/coverage/cover_reg_top/12.lc_ctrl_tl_intg_err.1383472195 |
|
|
Aug 05 04:55:19 PM PDT 24 |
Aug 05 04:55:23 PM PDT 24 |
208857401 ps |
| T922 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_mem_rw_with_rand_reset.692858146 |
|
|
Aug 05 04:55:19 PM PDT 24 |
Aug 05 04:55:21 PM PDT 24 |
29532166 ps |
| T923 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_same_csr_outstanding.2029918942 |
|
|
Aug 05 04:54:59 PM PDT 24 |
Aug 05 04:55:01 PM PDT 24 |
140386795 ps |
| T924 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_same_csr_outstanding.3950704640 |
|
|
Aug 05 04:55:21 PM PDT 24 |
Aug 05 04:55:22 PM PDT 24 |
51010369 ps |
| T925 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.1726611660 |
|
|
Aug 05 04:54:56 PM PDT 24 |
Aug 05 04:55:00 PM PDT 24 |
425986617 ps |
| T926 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_bit_bash.1310179526 |
|
|
Aug 05 04:54:59 PM PDT 24 |
Aug 05 04:55:06 PM PDT 24 |
557605979 ps |
| T927 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_alert_test.4225921070 |
|
|
Aug 05 04:54:56 PM PDT 24 |
Aug 05 04:54:57 PM PDT 24 |
468302556 ps |
| T174 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_aliasing.4155065309 |
|
|
Aug 05 04:54:55 PM PDT 24 |
Aug 05 04:54:56 PM PDT 24 |
23437570 ps |
| T928 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_same_csr_outstanding.1361262891 |
|
|
Aug 05 04:55:08 PM PDT 24 |
Aug 05 04:55:10 PM PDT 24 |
75565915 ps |
| T929 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_same_csr_outstanding.2765247847 |
|
|
Aug 05 04:55:07 PM PDT 24 |
Aug 05 04:55:08 PM PDT 24 |
76794934 ps |
| T930 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_mem_rw_with_rand_reset.4004175348 |
|
|
Aug 05 04:55:04 PM PDT 24 |
Aug 05 04:55:05 PM PDT 24 |
196765683 ps |
| T931 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_hw_reset.1942326014 |
|
|
Aug 05 04:55:03 PM PDT 24 |
Aug 05 04:55:05 PM PDT 24 |
768009214 ps |
| T932 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.703979624 |
|
|
Aug 05 04:55:13 PM PDT 24 |
Aug 05 04:55:15 PM PDT 24 |
189268272 ps |
| T933 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_same_csr_outstanding.2834504477 |
|
|
Aug 05 04:54:51 PM PDT 24 |
Aug 05 04:54:53 PM PDT 24 |
108066601 ps |
| T175 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_csr_rw.1013202342 |
|
|
Aug 05 04:55:23 PM PDT 24 |
Aug 05 04:55:24 PM PDT 24 |
47481726 ps |
| T934 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_errors.3153328964 |
|
|
Aug 05 04:55:08 PM PDT 24 |
Aug 05 04:55:10 PM PDT 24 |
80769783 ps |
| T108 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_errors.2140448907 |
|
|
Aug 05 04:55:17 PM PDT 24 |
Aug 05 04:55:19 PM PDT 24 |
149188185 ps |
| T935 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_same_csr_outstanding.693140676 |
|
|
Aug 05 04:55:01 PM PDT 24 |
Aug 05 04:55:02 PM PDT 24 |
140256383 ps |
| T125 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_intg_err.4093337143 |
|
|
Aug 05 04:55:10 PM PDT 24 |
Aug 05 04:55:13 PM PDT 24 |
444287690 ps |
| T936 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.4091436499 |
|
|
Aug 05 04:55:00 PM PDT 24 |
Aug 05 04:55:02 PM PDT 24 |
1152034999 ps |
| T176 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_csr_rw.2534432469 |
|
|
Aug 05 04:55:13 PM PDT 24 |
Aug 05 04:55:14 PM PDT 24 |
13520434 ps |
| T937 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_rw.4096454677 |
|
|
Aug 05 04:55:07 PM PDT 24 |
Aug 05 04:55:09 PM PDT 24 |
274847724 ps |
| T124 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_tl_intg_err.1805343764 |
|
|
Aug 05 04:55:18 PM PDT 24 |
Aug 05 04:55:20 PM PDT 24 |
67457655 ps |
| T938 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_alert_test.4081654413 |
|
|
Aug 05 04:55:19 PM PDT 24 |
Aug 05 04:55:21 PM PDT 24 |
54009311 ps |
| T939 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_hw_reset.3132212280 |
|
|
Aug 05 04:55:18 PM PDT 24 |
Aug 05 04:55:21 PM PDT 24 |
112525743 ps |
| T940 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_errors.1869209861 |
|
|
Aug 05 04:55:24 PM PDT 24 |
Aug 05 04:55:27 PM PDT 24 |
77151694 ps |
| T126 |
/workspace/coverage/cover_reg_top/16.lc_ctrl_tl_intg_err.2679381051 |
|
|
Aug 05 04:55:31 PM PDT 24 |
Aug 05 04:55:33 PM PDT 24 |
86483075 ps |
| T941 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_rw.1866387944 |
|
|
Aug 05 04:54:59 PM PDT 24 |
Aug 05 04:55:00 PM PDT 24 |
18036415 ps |
| T942 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_jtag_csr_hw_reset.2966023193 |
|
|
Aug 05 04:55:21 PM PDT 24 |
Aug 05 04:55:24 PM PDT 24 |
462650866 ps |
| T943 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_csr_mem_rw_with_rand_reset.3026421846 |
|
|
Aug 05 04:55:17 PM PDT 24 |
Aug 05 04:55:18 PM PDT 24 |
33589778 ps |
| T944 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_hw_reset.101875452 |
|
|
Aug 05 04:55:09 PM PDT 24 |
Aug 05 04:55:11 PM PDT 24 |
471366825 ps |
| T945 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_rw.1205495200 |
|
|
Aug 05 04:55:08 PM PDT 24 |
Aug 05 04:55:11 PM PDT 24 |
455078928 ps |
| T946 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2619509127 |
|
|
Aug 05 04:54:55 PM PDT 24 |
Aug 05 04:54:57 PM PDT 24 |
104996091 ps |
| T947 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_jtag_csr_aliasing.2441188243 |
|
|
Aug 05 04:55:00 PM PDT 24 |
Aug 05 04:55:04 PM PDT 24 |
1973447978 ps |
| T948 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_hw_reset.3381108459 |
|
|
Aug 05 04:55:02 PM PDT 24 |
Aug 05 04:55:04 PM PDT 24 |
170705510 ps |
| T949 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_csr_mem_rw_with_rand_reset.3076167905 |
|
|
Aug 05 04:54:58 PM PDT 24 |
Aug 05 04:55:00 PM PDT 24 |
56279108 ps |
| T950 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_aliasing.296553434 |
|
|
Aug 05 04:54:48 PM PDT 24 |
Aug 05 04:54:55 PM PDT 24 |
3733107942 ps |
| T951 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_same_csr_outstanding.2117095340 |
|
|
Aug 05 04:55:06 PM PDT 24 |
Aug 05 04:55:07 PM PDT 24 |
83531746 ps |
| T179 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_rw.4041819085 |
|
|
Aug 05 04:54:56 PM PDT 24 |
Aug 05 04:54:57 PM PDT 24 |
50710809 ps |
| T952 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_bit_bash.4094426034 |
|
|
Aug 05 04:54:48 PM PDT 24 |
Aug 05 04:54:50 PM PDT 24 |
18512742 ps |
| T953 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_alert_test.3033193508 |
|
|
Aug 05 04:55:06 PM PDT 24 |
Aug 05 04:55:08 PM PDT 24 |
77673661 ps |
| T954 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_rw.3443274071 |
|
|
Aug 05 04:55:02 PM PDT 24 |
Aug 05 04:55:04 PM PDT 24 |
65174638 ps |
| T955 |
/workspace/coverage/cover_reg_top/15.lc_ctrl_csr_mem_rw_with_rand_reset.914435472 |
|
|
Aug 05 04:55:17 PM PDT 24 |
Aug 05 04:55:19 PM PDT 24 |
149997529 ps |
| T956 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_csr_bit_bash.2062168337 |
|
|
Aug 05 04:54:58 PM PDT 24 |
Aug 05 04:55:08 PM PDT 24 |
7608590508 ps |
| T957 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_rw.3731030928 |
|
|
Aug 05 04:55:07 PM PDT 24 |
Aug 05 04:55:08 PM PDT 24 |
68632243 ps |
| T958 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_jtag_csr_aliasing.1343035774 |
|
|
Aug 05 04:54:58 PM PDT 24 |
Aug 05 04:55:02 PM PDT 24 |
1503018882 ps |
| T959 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_csr_mem_rw_with_rand_reset.566661871 |
|
|
Aug 05 04:55:02 PM PDT 24 |
Aug 05 04:55:03 PM PDT 24 |
94255352 ps |
| T960 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_same_csr_outstanding.2024567639 |
|
|
Aug 05 04:55:14 PM PDT 24 |
Aug 05 04:55:15 PM PDT 24 |
54722396 ps |
| T961 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_hw_reset.3765912463 |
|
|
Aug 05 04:54:58 PM PDT 24 |
Aug 05 04:54:59 PM PDT 24 |
202469445 ps |
| T962 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_csr_rw.1699479114 |
|
|
Aug 05 04:55:21 PM PDT 24 |
Aug 05 04:55:22 PM PDT 24 |
18308448 ps |
| T963 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_bit_bash.2505170883 |
|
|
Aug 05 04:54:46 PM PDT 24 |
Aug 05 04:55:08 PM PDT 24 |
3326451626 ps |
| T964 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.2216171397 |
|
|
Aug 05 04:54:49 PM PDT 24 |
Aug 05 04:54:53 PM PDT 24 |
532334612 ps |
| T965 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_csr_rw.915320680 |
|
|
Aug 05 04:54:59 PM PDT 24 |
Aug 05 04:55:05 PM PDT 24 |
34270776 ps |
| T966 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_same_csr_outstanding.4210559457 |
|
|
Aug 05 04:55:18 PM PDT 24 |
Aug 05 04:55:19 PM PDT 24 |
81804552 ps |
| T967 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_jtag_alert_test.1841231186 |
|
|
Aug 05 04:54:55 PM PDT 24 |
Aug 05 04:54:56 PM PDT 24 |
104987839 ps |
| T968 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_csr_mem_rw_with_rand_reset.549613206 |
|
|
Aug 05 04:55:14 PM PDT 24 |
Aug 05 04:55:16 PM PDT 24 |
72772072 ps |
| T969 |
/workspace/coverage/cover_reg_top/14.lc_ctrl_same_csr_outstanding.401990378 |
|
|
Aug 05 04:55:23 PM PDT 24 |
Aug 05 04:55:24 PM PDT 24 |
147261204 ps |
| T970 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_csr_rw.1608186432 |
|
|
Aug 05 04:55:10 PM PDT 24 |
Aug 05 04:55:11 PM PDT 24 |
59827802 ps |
| T971 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_rw.4159388026 |
|
|
Aug 05 04:55:08 PM PDT 24 |
Aug 05 04:55:10 PM PDT 24 |
117255210 ps |
| T972 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_csr_mem_rw_with_rand_reset.3714912855 |
|
|
Aug 05 04:55:02 PM PDT 24 |
Aug 05 04:55:03 PM PDT 24 |
45138035 ps |
| T973 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_same_csr_outstanding.4121294489 |
|
|
Aug 05 04:55:06 PM PDT 24 |
Aug 05 04:55:07 PM PDT 24 |
54429868 ps |
| T117 |
/workspace/coverage/cover_reg_top/5.lc_ctrl_tl_intg_err.4294786718 |
|
|
Aug 05 04:54:57 PM PDT 24 |
Aug 05 04:55:00 PM PDT 24 |
57621100 ps |
| T974 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_same_csr_outstanding.793959985 |
|
|
Aug 05 04:54:56 PM PDT 24 |
Aug 05 04:54:57 PM PDT 24 |
73644158 ps |
| T975 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_tl_errors.4264211238 |
|
|
Aug 05 04:55:03 PM PDT 24 |
Aug 05 04:55:05 PM PDT 24 |
28356514 ps |
| T976 |
/workspace/coverage/cover_reg_top/10.lc_ctrl_tl_errors.1599595933 |
|
|
Aug 05 04:55:10 PM PDT 24 |
Aug 05 04:55:12 PM PDT 24 |
53618601 ps |
| T977 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_same_csr_outstanding.3153003889 |
|
|
Aug 05 04:54:55 PM PDT 24 |
Aug 05 04:54:57 PM PDT 24 |
47992460 ps |
| T978 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_bit_bash.2897614136 |
|
|
Aug 05 04:54:57 PM PDT 24 |
Aug 05 04:55:07 PM PDT 24 |
422577353 ps |
| T979 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_tl_intg_err.434324169 |
|
|
Aug 05 04:55:17 PM PDT 24 |
Aug 05 04:55:20 PM PDT 24 |
122326983 ps |
| T980 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_mem_rw_with_rand_reset.4092933448 |
|
|
Aug 05 04:55:08 PM PDT 24 |
Aug 05 04:55:09 PM PDT 24 |
18128963 ps |
| T981 |
/workspace/coverage/cover_reg_top/11.lc_ctrl_tl_errors.3706381378 |
|
|
Aug 05 04:55:21 PM PDT 24 |
Aug 05 04:55:23 PM PDT 24 |
136222751 ps |
| T982 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_csr_mem_rw_with_rand_reset.3157033236 |
|
|
Aug 05 04:55:08 PM PDT 24 |
Aug 05 04:55:09 PM PDT 24 |
71038748 ps |
| T983 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_tl_errors.828755826 |
|
|
Aug 05 04:54:47 PM PDT 24 |
Aug 05 04:54:49 PM PDT 24 |
1112520977 ps |
| T177 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_csr_aliasing.1254744102 |
|
|
Aug 05 04:55:03 PM PDT 24 |
Aug 05 04:55:04 PM PDT 24 |
334858356 ps |
| T984 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_jtag_csr_aliasing.476087231 |
|
|
Aug 05 04:54:56 PM PDT 24 |
Aug 05 04:55:07 PM PDT 24 |
1538849122 ps |
| T985 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_csr_rw.3444211790 |
|
|
Aug 05 04:55:28 PM PDT 24 |
Aug 05 04:55:29 PM PDT 24 |
36925169 ps |
| T986 |
/workspace/coverage/cover_reg_top/1.lc_ctrl_jtag_alert_test.2479096303 |
|
|
Aug 05 04:54:56 PM PDT 24 |
Aug 05 04:54:58 PM PDT 24 |
65912333 ps |
| T987 |
/workspace/coverage/cover_reg_top/13.lc_ctrl_tl_errors.1920959032 |
|
|
Aug 05 04:55:17 PM PDT 24 |
Aug 05 04:55:20 PM PDT 24 |
361250551 ps |
| T988 |
/workspace/coverage/cover_reg_top/6.lc_ctrl_jtag_csr_mem_rw_with_rand_reset.679350342 |
|
|
Aug 05 04:54:55 PM PDT 24 |
Aug 05 04:54:58 PM PDT 24 |
87876105 ps |
| T989 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_same_csr_outstanding.3772744951 |
|
|
Aug 05 04:55:19 PM PDT 24 |
Aug 05 04:55:21 PM PDT 24 |
185568358 ps |
| T990 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_alert_test.1932755542 |
|
|
Aug 05 04:54:48 PM PDT 24 |
Aug 05 04:54:49 PM PDT 24 |
35892404 ps |
| T991 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_tl_errors.3776597062 |
|
|
Aug 05 04:55:23 PM PDT 24 |
Aug 05 04:55:28 PM PDT 24 |
538030360 ps |
| T992 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_tl_errors.832274380 |
|
|
Aug 05 04:55:17 PM PDT 24 |
Aug 05 04:55:19 PM PDT 24 |
78301555 ps |
| T993 |
/workspace/coverage/cover_reg_top/17.lc_ctrl_same_csr_outstanding.3214133194 |
|
|
Aug 05 04:55:13 PM PDT 24 |
Aug 05 04:55:14 PM PDT 24 |
262171471 ps |
| T127 |
/workspace/coverage/cover_reg_top/8.lc_ctrl_tl_intg_err.2038578760 |
|
|
Aug 05 04:55:13 PM PDT 24 |
Aug 05 04:55:15 PM PDT 24 |
241364689 ps |
| T994 |
/workspace/coverage/cover_reg_top/18.lc_ctrl_same_csr_outstanding.3609140940 |
|
|
Aug 05 04:55:25 PM PDT 24 |
Aug 05 04:55:26 PM PDT 24 |
22707020 ps |
| T995 |
/workspace/coverage/cover_reg_top/19.lc_ctrl_tl_errors.2095469212 |
|
|
Aug 05 04:55:19 PM PDT 24 |
Aug 05 04:55:24 PM PDT 24 |
237208201 ps |
| T996 |
/workspace/coverage/cover_reg_top/7.lc_ctrl_jtag_csr_aliasing.3184004753 |
|
|
Aug 05 04:55:04 PM PDT 24 |
Aug 05 04:55:13 PM PDT 24 |
1396470852 ps |
| T997 |
/workspace/coverage/cover_reg_top/2.lc_ctrl_jtag_csr_rw.2236928719 |
|
|
Aug 05 04:55:02 PM PDT 24 |
Aug 05 04:55:04 PM PDT 24 |
330680981 ps |
| T998 |
/workspace/coverage/cover_reg_top/0.lc_ctrl_jtag_csr_hw_reset.1356252154 |
|
|
Aug 05 04:54:48 PM PDT 24 |
Aug 05 04:54:50 PM PDT 24 |
112304794 ps |
| T999 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_mem_rw_with_rand_reset.2956011540 |
|
|
Aug 05 04:55:22 PM PDT 24 |
Aug 05 04:55:23 PM PDT 24 |
124062399 ps |
| T1000 |
/workspace/coverage/cover_reg_top/9.lc_ctrl_csr_rw.182861096 |
|
|
Aug 05 04:55:05 PM PDT 24 |
Aug 05 04:55:06 PM PDT 24 |
43322004 ps |
| T178 |
/workspace/coverage/cover_reg_top/4.lc_ctrl_csr_hw_reset.3253021223 |
|
|
Aug 05 04:55:06 PM PDT 24 |
Aug 05 04:55:07 PM PDT 24 |
14094012 ps |
| T1001 |
/workspace/coverage/cover_reg_top/3.lc_ctrl_csr_bit_bash.1274346472 |
|
|
Aug 05 04:55:05 PM PDT 24 |
Aug 05 04:55:07 PM PDT 24 |
85668698 ps |