877a77116| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | smoke | otbn_smoke | 7.000s | 75.343us | 1 | 1 | 100.00 |
| V1 | single_binary | otbn_single | 1.533m | 398.730us | 96 | 100 | 96.00 |
| V1 | csr_hw_reset | otbn_csr_hw_reset | 5.000s | 14.979us | 5 | 5 | 100.00 |
| V1 | csr_rw | otbn_csr_rw | 6.000s | 18.366us | 20 | 20 | 100.00 |
| V1 | csr_bit_bash | otbn_csr_bit_bash | 10.000s | 253.527us | 5 | 5 | 100.00 |
| V1 | csr_aliasing | otbn_csr_aliasing | 5.000s | 12.593us | 5 | 5 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | otbn_csr_mem_rw_with_rand_reset | 8.000s | 24.958us | 20 | 20 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | otbn_csr_rw | 6.000s | 18.366us | 20 | 20 | 100.00 |
| otbn_csr_aliasing | 5.000s | 12.593us | 5 | 5 | 100.00 | ||
| V1 | mem_walk | otbn_mem_walk | 38.000s | 1.142ms | 5 | 5 | 100.00 |
| V1 | mem_partial_access | otbn_mem_partial_access | 15.000s | 253.017us | 5 | 5 | 100.00 |
| V1 | TOTAL | 162 | 166 | 97.59 | |||
| V2 | reset_recovery | otbn_reset | 1.267m | 670.819us | 10 | 10 | 100.00 |
| V2 | multi_error | otbn_multi_err | 1.033m | 232.334us | 1 | 1 | 100.00 |
| V2 | back_to_back | otbn_multi | 2.967m | 817.366us | 9 | 10 | 90.00 |
| V2 | stress_all | otbn_stress_all | 54.000s | 713.180us | 9 | 10 | 90.00 |
| V2 | lc_escalation | otbn_escalate | 24.000s | 75.815us | 46 | 60 | 76.67 |
| V2 | zero_state_err_urnd | otbn_zero_state_err_urnd | 8.000s | 18.567us | 3 | 5 | 60.00 |
| V2 | sw_errs_fatal_chk | otbn_sw_errs_fatal_chk | 11.000s | 48.512us | 9 | 10 | 90.00 |
| V2 | alert_test | otbn_alert_test | 8.000s | 37.372us | 50 | 50 | 100.00 |
| V2 | intr_test | otbn_intr_test | 7.000s | 21.946us | 50 | 50 | 100.00 |
| V2 | tl_d_oob_addr_access | otbn_tl_errors | 10.000s | 119.684us | 20 | 20 | 100.00 |
| V2 | tl_d_illegal_access | otbn_tl_errors | 10.000s | 119.684us | 20 | 20 | 100.00 |
| V2 | tl_d_outstanding_access | otbn_csr_hw_reset | 5.000s | 14.979us | 5 | 5 | 100.00 |
| otbn_csr_rw | 6.000s | 18.366us | 20 | 20 | 100.00 | ||
| otbn_csr_aliasing | 5.000s | 12.593us | 5 | 5 | 100.00 | ||
| otbn_same_csr_outstanding | 7.000s | 27.223us | 20 | 20 | 100.00 | ||
| V2 | tl_d_partial_access | otbn_csr_hw_reset | 5.000s | 14.979us | 5 | 5 | 100.00 |
| otbn_csr_rw | 6.000s | 18.366us | 20 | 20 | 100.00 | ||
| otbn_csr_aliasing | 5.000s | 12.593us | 5 | 5 | 100.00 | ||
| otbn_same_csr_outstanding | 7.000s | 27.223us | 20 | 20 | 100.00 | ||
| V2 | TOTAL | 227 | 246 | 92.28 | |||
| V2S | mem_integrity | otbn_imem_err | 10.000s | 20.977us | 7 | 10 | 70.00 |
| otbn_dmem_err | 11.000s | 117.486us | 12 | 15 | 80.00 | ||
| V2S | internal_integrity | otbn_alu_bignum_mod_err | 13.000s | 38.540us | 5 | 5 | 100.00 |
| otbn_controller_ispr_rdata_err | 9.000s | 17.561us | 5 | 5 | 100.00 | ||
| otbn_mac_bignum_acc_err | 16.000s | 58.204us | 5 | 5 | 100.00 | ||
| otbn_urnd_err | 6.000s | 12.730us | 2 | 2 | 100.00 | ||
| V2S | illegal_bus_access | otbn_illegal_mem_acc | 7.000s | 65.775us | 4 | 5 | 80.00 |
| V2S | otbn_mem_gnt_acc_err | otbn_mem_gnt_acc_err | 8.000s | 46.235us | 2 | 2 | 100.00 |
| V2S | tl_intg_err | otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 |
| otbn_tl_intg_err | 34.000s | 309.591us | 20 | 20 | 100.00 | ||
| V2S | passthru_mem_tl_intg_err | otbn_passthru_mem_tl_intg_err | 34.000s | 204.012us | 20 | 20 | 100.00 |
| V2S | prim_fsm_check | otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 |
| V2S | prim_count_check | otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 |
| V2S | sec_cm_mem_scramble | otbn_smoke | 7.000s | 75.343us | 1 | 1 | 100.00 |
| V2S | sec_cm_data_mem_integrity | otbn_dmem_err | 11.000s | 117.486us | 12 | 15 | 80.00 |
| V2S | sec_cm_instruction_mem_integrity | otbn_imem_err | 10.000s | 20.977us | 7 | 10 | 70.00 |
| V2S | sec_cm_bus_integrity | otbn_tl_intg_err | 34.000s | 309.591us | 20 | 20 | 100.00 |
| V2S | sec_cm_controller_fsm_global_esc | otbn_escalate | 24.000s | 75.815us | 46 | 60 | 76.67 |
| V2S | sec_cm_controller_fsm_local_esc | otbn_imem_err | 10.000s | 20.977us | 7 | 10 | 70.00 |
| otbn_dmem_err | 11.000s | 117.486us | 12 | 15 | 80.00 | ||
| otbn_zero_state_err_urnd | 8.000s | 18.567us | 3 | 5 | 60.00 | ||
| otbn_illegal_mem_acc | 7.000s | 65.775us | 4 | 5 | 80.00 | ||
| otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 | ||
| V2S | sec_cm_controller_fsm_sparse | otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 |
| V2S | sec_cm_scramble_key_sideload | otbn_single | 1.533m | 398.730us | 96 | 100 | 96.00 |
| V2S | sec_cm_scramble_ctrl_fsm_local_esc | otbn_imem_err | 10.000s | 20.977us | 7 | 10 | 70.00 |
| otbn_dmem_err | 11.000s | 117.486us | 12 | 15 | 80.00 | ||
| otbn_zero_state_err_urnd | 8.000s | 18.567us | 3 | 5 | 60.00 | ||
| otbn_illegal_mem_acc | 7.000s | 65.775us | 4 | 5 | 80.00 | ||
| otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 | ||
| V2S | sec_cm_scramble_ctrl_fsm_sparse | otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 |
| V2S | sec_cm_start_stop_ctrl_fsm_global_esc | otbn_escalate | 24.000s | 75.815us | 46 | 60 | 76.67 |
| V2S | sec_cm_start_stop_ctrl_fsm_local_esc | otbn_imem_err | 10.000s | 20.977us | 7 | 10 | 70.00 |
| otbn_dmem_err | 11.000s | 117.486us | 12 | 15 | 80.00 | ||
| otbn_zero_state_err_urnd | 8.000s | 18.567us | 3 | 5 | 60.00 | ||
| otbn_illegal_mem_acc | 7.000s | 65.775us | 4 | 5 | 80.00 | ||
| otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 | ||
| V2S | sec_cm_start_stop_ctrl_fsm_sparse | otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 |
| V2S | sec_cm_data_reg_sw_sca | otbn_single | 1.533m | 398.730us | 96 | 100 | 96.00 |
| V2S | sec_cm_ctrl_redun | otbn_ctrl_redun | 8.000s | 38.132us | 11 | 12 | 91.67 |
| V2S | sec_cm_pc_ctrl_flow_redun | otbn_pc_ctrl_flow_redun | 9.000s | 22.644us | 5 | 5 | 100.00 |
| V2S | sec_cm_rnd_bus_consistency | otbn_rnd_sec_cm | 36.000s | 494.839us | 5 | 5 | 100.00 |
| V2S | sec_cm_rnd_rng_digest | otbn_rnd_sec_cm | 36.000s | 494.839us | 5 | 5 | 100.00 |
| V2S | sec_cm_rf_base_data_reg_sw_integrity | otbn_rf_base_intg_err | 10.000s | 192.869us | 8 | 10 | 80.00 |
| V2S | sec_cm_rf_base_data_reg_sw_glitch_detect | otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 |
| V2S | sec_cm_stack_wr_ptr_ctr_redun | otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 |
| V2S | sec_cm_rf_bignum_data_reg_sw_integrity | otbn_rf_bignum_intg_err | 10.000s | 37.638us | 9 | 10 | 90.00 |
| V2S | sec_cm_rf_bignum_data_reg_sw_glitch_detect | otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 |
| V2S | sec_cm_loop_stack_ctr_redun | otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 |
| V2S | sec_cm_loop_stack_addr_integrity | otbn_stack_addr_integ_chk | 10.000s | 31.070us | 5 | 5 | 100.00 |
| V2S | sec_cm_call_stack_addr_integrity | otbn_stack_addr_integ_chk | 10.000s | 31.070us | 5 | 5 | 100.00 |
| V2S | sec_cm_start_stop_ctrl_state_consistency | otbn_sec_wipe_err | 15.000s | 50.913us | 7 | 7 | 100.00 |
| V2S | sec_cm_data_mem_sec_wipe | otbn_single | 1.533m | 398.730us | 96 | 100 | 96.00 |
| V2S | sec_cm_instruction_mem_sec_wipe | otbn_single | 1.533m | 398.730us | 96 | 100 | 96.00 |
| V2S | sec_cm_data_reg_sw_sec_wipe | otbn_single | 1.533m | 398.730us | 96 | 100 | 96.00 |
| V2S | sec_cm_write_mem_integrity | otbn_multi | 2.967m | 817.366us | 9 | 10 | 90.00 |
| V2S | sec_cm_ctrl_flow_count | otbn_single | 1.533m | 398.730us | 96 | 100 | 96.00 |
| V2S | sec_cm_ctrl_flow_sca | otbn_single | 1.533m | 398.730us | 96 | 100 | 96.00 |
| V2S | sec_cm_data_mem_sw_noaccess | otbn_sw_no_acc | 22.000s | 67.693us | 4 | 5 | 80.00 |
| V2S | sec_cm_key_sideload | otbn_single | 1.533m | 398.730us | 96 | 100 | 96.00 |
| V2S | sec_cm_tlul_fifo_ctr_redun | otbn_sec_cm | 5.267m | 3.695ms | 4 | 5 | 80.00 |
| V2S | TOTAL | 140 | 153 | 91.50 | |||
| V3 | stress_all_with_rand_reset | otbn_stress_all_with_rand_reset | 14.083m | 39.408ms | 6 | 10 | 60.00 |
| V3 | TOTAL | 6 | 10 | 60.00 | |||
| TOTAL | 535 | 575 | 93.04 |
| Items | Total | Written | Passing | Progress |
|---|---|---|---|---|
| V1 | 9 | 9 | 8 | 88.89 |
| V2 | 11 | 11 | 6 | 54.55 |
| V2S | 19 | 19 | 11 | 57.89 |
| V3 | 1 | 1 | 0 | 0.00 |
| Score | Block | Branch | Statement | Expression | Toggle | Fsm | Assertion | CoverGroup |
|---|---|---|---|---|---|---|---|---|
| 98.71 | 99.48 | 93.76 | 99.60 | 90.97 | 93.24 | 94.87 | 90.46 | 99.16 |
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_*/tb.sv,270): Assertion MatchingStatus_A has failed has 5 failures:
17.otbn_escalate.3583316590
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/17.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 16503146 PS) Assertion tb.MatchingStatus_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 16503146 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 16503146 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 16503146 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
26.otbn_escalate.1506210530
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/26.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 4351580 PS) Assertion tb.MatchingStatus_A has failed
UVM_ERROR @ 4351580 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
UVM_INFO @ 4351580 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 3 more failures.
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_*/otbn_insn_cnt_if.sv,21): Assertion InsnCntMatches_A has failed has 4 failures:
Test otbn_zero_state_err_urnd has 1 failures.
0.otbn_zero_state_err_urnd.1330970786
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_zero_state_err_urnd/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 41044300 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 41044300 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 41044300 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_escalate has 2 failures.
2.otbn_escalate.3831061693
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 12944727 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 12944727 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 12944727 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
5.otbn_escalate.2531549134
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/5.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 62122834 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
UVM_ERROR @ 62122834 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 62122834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_ctrl_redun has 1 failures.
5.otbn_ctrl_redun.3937847753
Line 247, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/5.otbn_ctrl_redun/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 57713928 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 57713928 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 57713928 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
UVM_INFO @ 57713928 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_*/otbn_model_if.sv,137): Assertion NoModelErrs has failed has 4 failures:
9.otbn_escalate.3905207712
Line 261, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/9.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 11423295 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 11423295 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 11423295 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
31.otbn_escalate.791822284
Line 260, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/31.otbn_escalate/latest/run.log
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 1247905 PS) Assertion tb.model_if.NoModelErrs has failed
UVM_ERROR @ 1247905 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
UVM_INFO @ 1247905 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 2 more failures.
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 3 failures:
0.otbn_dmem_err.1666885798
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_dmem_err/latest/run.log
UVM_FATAL @ 16125328 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 16125328 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
10.otbn_dmem_err.4154881050
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/10.otbn_dmem_err/latest/run.log
UVM_FATAL @ 9548175 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 9548175 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_imem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 3 failures:
Test otbn_imem_err has 2 failures.
4.otbn_imem_err.2945763022
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_imem_err/latest/run.log
UVM_FATAL @ 13749753 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 13749753 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
9.otbn_imem_err.3601352573
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/9.otbn_imem_err/latest/run.log
UVM_FATAL @ 17228483 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 17228483 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test otbn_stress_all_with_rand_reset has 1 failures.
8.otbn_stress_all_with_rand_reset.580715924
Line 285, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 250850432 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 250850432 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 3 failures:
22.otbn_single.1364053875
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/22.otbn_single/latest/run.log
UVM_FATAL @ 11185002 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 11185002 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
66.otbn_single.4105669284
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/66.otbn_single/latest/run.log
UVM_FATAL @ 9921338 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 9921338 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
... and 1 more failures.
UVM_FATAL (otbn_scoreboard.sv:495) scoreboard [scoreboard] A fatal alert arrived * cycles ago and we still don't think it should have done. has 1 failures:
0.otbn_sec_cm.2781734030
Line 224, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_sec_cm/latest/run.log
UVM_FATAL @ 9499239 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
UVM_INFO @ 9499239 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
2.otbn_imem_err.2390456849
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_imem_err/latest/run.log
UVM_FATAL @ 15504407 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 15504407 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_rf_base_intg_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
3.otbn_rf_base_intg_err.49874174
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_rf_base_intg_err/latest/run.log
UVM_FATAL @ 18365860 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_rf_base_intg_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 18365860 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_illegal_mem_acc_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
3.otbn_illegal_mem_acc.2097794670
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_illegal_mem_acc/latest/run.log
UVM_FATAL @ 16198129 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_illegal_mem_acc_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 16198129 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_rf_base_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
4.otbn_rf_base_intg_err.3779962227
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_rf_base_intg_err/latest/run.log
UVM_FATAL @ 11256850 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_rf_base_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 11256850 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_zero_state_err_urnd_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
4.otbn_zero_state_err_urnd.3069805068
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_zero_state_err_urnd/latest/run.log
UVM_FATAL @ 26929386 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_zero_state_err_urnd_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 26929386 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_sw_no_acc_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
4.otbn_sw_no_acc.3389911512
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/4.otbn_sw_no_acc/latest/run.log
UVM_FATAL @ 67693226 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_sw_no_acc_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 67693226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_rf_bignum_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
5.otbn_rf_bignum_intg_err.785339795
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/5.otbn_rf_bignum_intg_err/latest/run.log
UVM_FATAL @ 11994012 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_rf_bignum_intg_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
UVM_INFO @ 11994012 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
5.otbn_stress_all.864104964
Line 278, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/5.otbn_stress_all/latest/run.log
UVM_FATAL @ 29626255 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 29626255 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
5.otbn_stress_all_with_rand_reset.3289997184
Line 365, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/5.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 13231400854 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 13231400854 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
6.otbn_stress_all_with_rand_reset.215198119
Line 320, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/6.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 407963658 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 407963658 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
8.otbn_multi.2225490120
Line 277, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_multi/latest/run.log
UVM_FATAL @ 40179374 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_multi_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 40179374 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_sw_errs_fatal_chk_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
8.otbn_sw_errs_fatal_chk.476787291
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_sw_errs_fatal_chk/latest/run.log
UVM_FATAL @ 10154569 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_sw_errs_fatal_chk_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 10154569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
9.otbn_stress_all_with_rand_reset.3443671030
Line 304, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/9.otbn_stress_all_with_rand_reset/latest/run.log
UVM_FATAL @ 151510769 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 151510769 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
UVM_FATAL (otbn_base_vseq.sv:582) [otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
24.otbn_escalate.3314917733
Line 243, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/24.otbn_escalate/latest/run.log
UVM_FATAL @ 13201959 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 13201959 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
27.otbn_single.507863356
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/27.otbn_single/latest/run.log
UVM_FATAL @ 8683275 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o)
UVM_INFO @ 8683275 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_model_if.sv:77) [otbn_model_if] Check failed (u_model.otbn_model_step_crc(handle, item, crc_state) == *) Failed to update CRC has 1 failures:
36.otbn_escalate.2014937942
Line 261, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/36.otbn_escalate/latest/run.log
UVM_FATAL @ 1680576 ps: (otbn_model_if.sv:77) [otbn_model_if] Check failed (u_model.otbn_model_step_crc(handle, item, crc_state) == 0) Failed to update CRC
UVM_INFO @ 1680576 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Exit reason: Error: User command failed UVM_FATAL (otbn_scoreboard.sv:538) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a fatal alert but it still hasn't arrived. has 1 failures:
38.otbn_escalate.1904368822
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/38.otbn_escalate/latest/run.log
UVM_FATAL @ 6767538 ps: (otbn_scoreboard.sv:538) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a fatal alert but it still hasn't arrived.
UVM_INFO @ 6767538 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---