26b0ee226
Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
---|---|---|---|---|---|---|---|
V1 | wake_up | otp_ctrl_wake_up | 1.790s | 63.843us | 1 | 1 | 100.00 |
V1 | smoke | otp_ctrl_smoke | 21.740s | 2.460ms | 50 | 50 | 100.00 |
V1 | csr_hw_reset | otp_ctrl_csr_hw_reset | 2.200s | 100.275us | 5 | 5 | 100.00 |
V1 | csr_rw | otp_ctrl_csr_rw | 2.060s | 578.916us | 20 | 20 | 100.00 |
V1 | csr_bit_bash | otp_ctrl_csr_bit_bash | 9.340s | 421.070us | 5 | 5 | 100.00 |
V1 | csr_aliasing | otp_ctrl_csr_aliasing | 4.250s | 256.584us | 5 | 5 | 100.00 |
V1 | csr_mem_rw_with_rand_reset | otp_ctrl_csr_mem_rw_with_rand_reset | 4.070s | 376.424us | 20 | 20 | 100.00 |
V1 | regwen_csr_and_corresponding_lockable_csr | otp_ctrl_csr_rw | 2.060s | 578.916us | 20 | 20 | 100.00 |
otp_ctrl_csr_aliasing | 4.250s | 256.584us | 5 | 5 | 100.00 | ||
V1 | mem_walk | otp_ctrl_mem_walk | 1.470s | 133.175us | 5 | 5 | 100.00 |
V1 | mem_partial_access | otp_ctrl_mem_partial_access | 1.570s | 538.144us | 5 | 5 | 100.00 |
V1 | TOTAL | 116 | 116 | 100.00 | |||
V2 | dai_access_partition_walk | otp_ctrl_partition_walk | 30.930s | 12.875ms | 1 | 1 | 100.00 |
V2 | init_fail | otp_ctrl_init_fail | 7.800s | 2.861ms | 300 | 300 | 100.00 |
V2 | partition_check | otp_ctrl_background_chks | 20.500s | 8.976ms | 10 | 10 | 100.00 |
otp_ctrl_check_fail | 23.830s | 3.586ms | 50 | 50 | 100.00 | ||
V2 | regwen_during_otp_init | otp_ctrl_regwen | 11.150s | 3.718ms | 50 | 50 | 100.00 |
V2 | partition_lock | otp_ctrl_dai_lock | 28.000s | 8.582ms | 50 | 50 | 100.00 |
V2 | interface_key_check | otp_ctrl_parallel_key_req | 33.420s | 11.716ms | 50 | 50 | 100.00 |
V2 | lc_interactions | otp_ctrl_parallel_lc_req | 31.030s | 13.429ms | 50 | 50 | 100.00 |
otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 | ||
V2 | otp_dai_errors | otp_ctrl_dai_errs | 16.900s | 2.092ms | 50 | 50 | 100.00 |
V2 | otp_macro_errors | otp_ctrl_macro_errs | 45.320s | 7.634ms | 50 | 50 | 100.00 |
V2 | test_access | otp_ctrl_test_access | 36.720s | 3.571ms | 50 | 50 | 100.00 |
V2 | stress_all | otp_ctrl_stress_all | 3.935m | 57.631ms | 50 | 50 | 100.00 |
V2 | intr_test | otp_ctrl_intr_test | 2.180s | 545.090us | 50 | 50 | 100.00 |
V2 | alert_test | otp_ctrl_alert_test | 2.890s | 368.663us | 50 | 50 | 100.00 |
V2 | tl_d_oob_addr_access | otp_ctrl_tl_errors | 6.710s | 354.311us | 20 | 20 | 100.00 |
V2 | tl_d_illegal_access | otp_ctrl_tl_errors | 6.710s | 354.311us | 20 | 20 | 100.00 |
V2 | tl_d_outstanding_access | otp_ctrl_csr_hw_reset | 2.200s | 100.275us | 5 | 5 | 100.00 |
otp_ctrl_csr_rw | 2.060s | 578.916us | 20 | 20 | 100.00 | ||
otp_ctrl_csr_aliasing | 4.250s | 256.584us | 5 | 5 | 100.00 | ||
otp_ctrl_same_csr_outstanding | 4.310s | 1.563ms | 20 | 20 | 100.00 | ||
V2 | tl_d_partial_access | otp_ctrl_csr_hw_reset | 2.200s | 100.275us | 5 | 5 | 100.00 |
otp_ctrl_csr_rw | 2.060s | 578.916us | 20 | 20 | 100.00 | ||
otp_ctrl_csr_aliasing | 4.250s | 256.584us | 5 | 5 | 100.00 | ||
otp_ctrl_same_csr_outstanding | 4.310s | 1.563ms | 20 | 20 | 100.00 | ||
V2 | TOTAL | 1101 | 1101 | 100.00 | |||
V2S | sec_cm_additional_check | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | tl_intg_err | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
otp_ctrl_tl_intg_err | 37.310s | 18.710ms | 20 | 20 | 100.00 | ||
V2S | prim_count_check | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | prim_fsm_check | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_bus_integrity | otp_ctrl_tl_intg_err | 37.310s | 18.710ms | 20 | 20 | 100.00 |
V2S | sec_cm_secret_mem_scramble | otp_ctrl_smoke | 21.740s | 2.460ms | 50 | 50 | 100.00 |
V2S | sec_cm_part_mem_digest | otp_ctrl_smoke | 21.740s | 2.460ms | 50 | 50 | 100.00 |
V2S | sec_cm_dai_fsm_sparse | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_kdi_fsm_sparse | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_lci_fsm_sparse | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_part_fsm_sparse | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_scrmbl_fsm_sparse | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_timer_fsm_sparse | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_dai_ctr_redun | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_kdi_seed_ctr_redun | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_kdi_entropy_ctr_redun | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_lci_ctr_redun | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_part_ctr_redun | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_scrmbl_ctr_redun | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_timer_integ_ctr_redun | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_timer_cnsty_ctr_redun | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_timer_lfsr_redun | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_dai_fsm_local_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 | ||
V2S | sec_cm_lci_fsm_local_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
V2S | sec_cm_kdi_fsm_local_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
V2S | sec_cm_part_fsm_local_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
otp_ctrl_macro_errs | 45.320s | 7.634ms | 50 | 50 | 100.00 | ||
V2S | sec_cm_scrmbl_fsm_local_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
V2S | sec_cm_timer_fsm_local_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 | ||
V2S | sec_cm_dai_fsm_global_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 | ||
V2S | sec_cm_lci_fsm_global_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
V2S | sec_cm_kdi_fsm_global_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
V2S | sec_cm_part_fsm_global_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
otp_ctrl_macro_errs | 45.320s | 7.634ms | 50 | 50 | 100.00 | ||
V2S | sec_cm_scrmbl_fsm_global_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
V2S | sec_cm_timer_fsm_global_esc | otp_ctrl_parallel_lc_esc | 15.160s | 5.820ms | 200 | 200 | 100.00 |
otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 | ||
V2S | sec_cm_part_data_reg_integrity | otp_ctrl_init_fail | 7.800s | 2.861ms | 300 | 300 | 100.00 |
V2S | sec_cm_part_data_reg_bkgn_chk | otp_ctrl_check_fail | 23.830s | 3.586ms | 50 | 50 | 100.00 |
V2S | sec_cm_part_mem_regren | otp_ctrl_dai_lock | 28.000s | 8.582ms | 50 | 50 | 100.00 |
V2S | sec_cm_part_mem_sw_unreadable | otp_ctrl_dai_lock | 28.000s | 8.582ms | 50 | 50 | 100.00 |
V2S | sec_cm_part_mem_sw_unwritable | otp_ctrl_dai_lock | 28.000s | 8.582ms | 50 | 50 | 100.00 |
V2S | sec_cm_lc_part_mem_sw_noaccess | otp_ctrl_dai_lock | 28.000s | 8.582ms | 50 | 50 | 100.00 |
V2S | sec_cm_access_ctrl_mubi | otp_ctrl_dai_lock | 28.000s | 8.582ms | 50 | 50 | 100.00 |
V2S | sec_cm_token_valid_ctrl_mubi | otp_ctrl_smoke | 21.740s | 2.460ms | 50 | 50 | 100.00 |
V2S | sec_cm_lc_ctrl_intersig_mubi | otp_ctrl_dai_lock | 28.000s | 8.582ms | 50 | 50 | 100.00 |
V2S | sec_cm_test_bus_lc_gated | otp_ctrl_smoke | 21.740s | 2.460ms | 50 | 50 | 100.00 |
V2S | sec_cm_test_tl_lc_gate_fsm_sparse | otp_ctrl_sec_cm | 2.517m | 17.054ms | 5 | 5 | 100.00 |
V2S | sec_cm_direct_access_config_regwen | otp_ctrl_regwen | 11.150s | 3.718ms | 50 | 50 | 100.00 |
V2S | sec_cm_check_trigger_config_regwen | otp_ctrl_smoke | 21.740s | 2.460ms | 50 | 50 | 100.00 |
V2S | sec_cm_check_config_regwen | otp_ctrl_smoke | 21.740s | 2.460ms | 50 | 50 | 100.00 |
V2S | sec_cm_macro_mem_integrity | otp_ctrl_macro_errs | 45.320s | 7.634ms | 50 | 50 | 100.00 |
V2S | TOTAL | 25 | 25 | 100.00 | |||
V3 | otp_ctrl_low_freq_read | otp_ctrl_low_freq_read | 16.200s | 7.599ms | 1 | 1 | 100.00 |
V3 | stress_all_with_rand_reset | otp_ctrl_stress_all_with_rand_reset | 2.907h | 2.178s | 94 | 100 | 94.00 |
V3 | TOTAL | 95 | 101 | 94.06 | |||
TOTAL | 1337 | 1343 | 99.55 |
Items | Total | Written | Passing | Progress |
---|---|---|---|---|
V1 | 9 | 9 | 9 | 100.00 |
V2 | 17 | 17 | 17 | 100.00 |
V2S | 2 | 2 | 2 | 100.00 |
V3 | 2 | 2 | 1 | 50.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
---|---|---|---|---|---|---|---|
93.38 | 92.63 | 91.14 | 92.62 | 92.11 | 93.35 | 96.53 | 95.27 |
Job otp_ctrl-sim-vcs_run_default killed due to: Exit reason: User job exceeded runlimit: User job timed out
has 6 failures:
8.otp_ctrl_stress_all_with_rand_reset.1983698647
Log /container/opentitan-public/scratch/os_regression/otp_ctrl-sim-vcs/8.otp_ctrl_stress_all_with_rand_reset/latest/run.log
Job ID: smart:ed50d3cd-e5ac-4f88-b5ce-4dcaae33f210
28.otp_ctrl_stress_all_with_rand_reset.1352055632
Log /container/opentitan-public/scratch/os_regression/otp_ctrl-sim-vcs/28.otp_ctrl_stress_all_with_rand_reset/latest/run.log
Job ID: smart:2351489f-d9e8-4d8a-8076-4a1e532abecb
... and 4 more failures.