Unified Coverage Report :: Group :: otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
66.67	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv

---

Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	1	14	93.33
Crosses	51	21	30	58.82

Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
err_code_vals	7	1	6	85.71	100	1	1	0
partition	8	0	8	100.00	100	1	1	0

Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
dai_err_code_for_all_partitions	51	21	30	58.82	100	1	1	0

Summary for Variable err_code_vals

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	1	6	85.71

User Defined Bins for err_code_vals

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
macro_err	0	1	1

Excluded/Illegal bins

NAME	COUNT	STATUS
illegal_err	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
fsm_err	10250	1			T49	49		T64	49		T65	49
access_err	66850	1			T19	53		T20	44		T21	38
write_blank_err	1000	1			T19	1		T23	8		T24	8
ecc_uncorr_err	163050	1			T19	601		T54	285		T23	982
ecc_corr_err	1550	1			T54	29		T23	1		T55	29
no_err	400600	1			T19	705		T20	84		T21	74

---

Summary for Variable partition

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	0	8	100.00

User Defined Bins for partition

Excluded/Illegal bins

NAME	COUNT	STATUS
illegal_idx	0	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
lc_or_oob	30460	1			T19	12		T20	18		T21	14
secret2	44180	1			T19	26		T20	14		T21	32
secret1	332800	1			T19	1210		T20	14		T21	8
secret0	48760	1			T19	8		T20	14		T21	8
hw_cfg	39320	1			T19	10		T20	18		T21	6
owner_sw_cfg	48020	1			T19	28		T20	20		T21	10
creator_sw_cfg	57800	1			T19	42		T20	12		T21	16
vendor_test	41960	1			T19	24		T20	18		T21	18

---

Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
TOTAL	51	21	30	58.82	21
Automatically Generated Cross Bins	51	21	30	58.82	21
User Defined Cross Bins	0	0	0

Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins

err_code_vals	partition	COUNT	AT LEAST	NUMBER	STATUS
[fsm_err]	[lc_or_oob , secret2 , secret1]	--	--	3
[fsm_err]	[hw_cfg , owner_sw_cfg , creator_sw_cfg]	--	--	3
[write_blank_err]	[secret2]	0	1	1
[write_blank_err]	[secret0 , hw_cfg]	--	--	2
[write_blank_err]	[vendor_test]	0	1	1
[ecc_uncorr_err]	[secret2]	0	1	1
[ecc_corr_err]	[secret2]	0	1	1
[ecc_corr_err]	[secret0]	0	1	1
[ecc_corr_err]	[owner_sw_cfg]	0	1	1
[macro_err]	[secret2 , secret1 , secret0 , hw_cfg , owner_sw_cfg , creator_sw_cfg , vendor_test]	--	--	7

Covered bins

err_code_vals	partition	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
fsm_err	secret0	9800	1			T49	49		T64	49		T65	49
fsm_err	vendor_test	450	1			T97	9		T98	9		T99	9
access_err	lc_or_oob	15230	1			T19	6		T20	9		T21	7
access_err	secret2	14190	1			T19	13		T20	4		T21	15
access_err	secret1	5200	1			T20	6		T21	4		T22	6
access_err	secret0	4650	1			T20	6		T21	4		T22	6
access_err	hw_cfg	2750	1			T20	8		T21	2		T22	8
access_err	owner_sw_cfg	8740	1			T19	10		T20	6		T21	1
access_err	creator_sw_cfg	8220	1			T19	16		T20	5		T21	5
access_err	vendor_test	7870	1			T19	8		T54	1		T23	53
write_blank_err	secret1	400	1			T19	1		T23	3		T24	3
write_blank_err	owner_sw_cfg	400	1			T23	4		T24	4		T25	4
write_blank_err	creator_sw_cfg	200	1			T23	1		T24	1		T25	1
ecc_uncorr_err	secret1	149900	1			T19	601		T54	22		T23	982
ecc_uncorr_err	secret0	1100	1			T54	22		T55	22		T56	22
ecc_uncorr_err	hw_cfg	2550	1			T54	51		T55	51		T56	51
ecc_uncorr_err	owner_sw_cfg	1750	1			T54	35		T55	35		T56	35
ecc_uncorr_err	creator_sw_cfg	7750	1			T54	155		T55	155		T56	155
ecc_corr_err	secret1	300	1			T54	4		T23	1		T55	4
ecc_corr_err	hw_cfg	550	1			T54	11		T55	11		T56	11
ecc_corr_err	creator_sw_cfg	200	1			T54	4		T55	4		T56	4
ecc_corr_err	vendor_test	500	1			T54	10		T55	10		T56	10
no_err	lc_or_oob	15230	1			T19	6		T20	9		T21	7
no_err	secret2	29990	1			T19	13		T20	10		T21	17
no_err	secret1	177000	1			T19	608		T20	8		T21	4
no_err	secret0	33210	1			T19	8		T20	8		T21	4
no_err	hw_cfg	33470	1			T19	10		T20	10		T21	4
no_err	owner_sw_cfg	37130	1			T19	18		T20	14		T21	9
no_err	creator_sw_cfg	41430	1			T19	26		T20	7		T21	11
no_err	vendor_test	33140	1			T19	16		T20	18		T21	18

User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins

NAME	COUNT	STATUS
vendor_test_ecc_uncorrectable_err	0	Illegal
lc_or_oob_ignore	0	Excluded