Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
89.18 91.53 89.76 89.32 72.73 91.55 96.26 93.14


Total test records in report: 1293
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html

T1054 /workspace/coverage/default/195.otp_ctrl_init_fail.2655613203 Feb 21 02:11:37 PM PST 24 Feb 21 02:11:43 PM PST 24 119239787 ps
T1055 /workspace/coverage/default/34.otp_ctrl_parallel_key_req.3059202907 Feb 21 02:06:57 PM PST 24 Feb 21 02:07:37 PM PST 24 2897942921 ps
T1056 /workspace/coverage/default/46.otp_ctrl_parallel_lc_esc.275608452 Feb 21 02:08:25 PM PST 24 Feb 21 02:08:42 PM PST 24 610073844 ps
T1057 /workspace/coverage/default/40.otp_ctrl_dai_errs.1973207984 Feb 21 02:07:48 PM PST 24 Feb 21 02:08:17 PM PST 24 3077007261 ps
T1058 /workspace/coverage/default/29.otp_ctrl_test_access.4140393438 Feb 21 02:06:10 PM PST 24 Feb 21 02:06:36 PM PST 24 1746951906 ps
T1059 /workspace/coverage/default/7.otp_ctrl_regwen.3426174670 Feb 21 02:02:47 PM PST 24 Feb 21 02:02:53 PM PST 24 541826751 ps
T1060 /workspace/coverage/default/131.otp_ctrl_init_fail.410950031 Feb 21 02:10:37 PM PST 24 Feb 21 02:10:42 PM PST 24 110551473 ps
T156 /workspace/coverage/default/95.otp_ctrl_init_fail.2067585645 Feb 21 02:09:59 PM PST 24 Feb 21 02:10:03 PM PST 24 278185696 ps
T205 /workspace/coverage/default/123.otp_ctrl_parallel_lc_esc.2900301918 Feb 21 02:10:31 PM PST 24 Feb 21 02:10:37 PM PST 24 178724831 ps
T206 /workspace/coverage/default/19.otp_ctrl_dai_lock.444727608 Feb 21 02:05:05 PM PST 24 Feb 21 02:05:28 PM PST 24 1442199017 ps
T207 /workspace/coverage/default/30.otp_ctrl_smoke.2928794606 Feb 21 02:06:24 PM PST 24 Feb 21 02:06:31 PM PST 24 1033711931 ps
T208 /workspace/coverage/default/0.otp_ctrl_parallel_key_req.768734203 Feb 21 02:00:20 PM PST 24 Feb 21 02:00:39 PM PST 24 357884200 ps
T209 /workspace/coverage/default/20.otp_ctrl_regwen.3288054561 Feb 21 02:05:05 PM PST 24 Feb 21 02:05:17 PM PST 24 1005124557 ps
T210 /workspace/coverage/default/187.otp_ctrl_parallel_lc_esc.453653206 Feb 21 02:11:26 PM PST 24 Feb 21 02:11:33 PM PST 24 138161551 ps
T42 /workspace/coverage/default/291.otp_ctrl_init_fail.753321128 Feb 21 02:12:14 PM PST 24 Feb 21 02:12:18 PM PST 24 402503492 ps
T211 /workspace/coverage/default/11.otp_ctrl_parallel_lc_esc.3492856726 Feb 21 02:03:26 PM PST 24 Feb 21 02:03:32 PM PST 24 148132972 ps
T212 /workspace/coverage/default/196.otp_ctrl_parallel_lc_esc.2221167354 Feb 21 02:11:31 PM PST 24 Feb 21 02:11:44 PM PST 24 689202792 ps
T1061 /workspace/coverage/default/41.otp_ctrl_alert_test.4039753270 Feb 21 02:08:03 PM PST 24 Feb 21 02:08:08 PM PST 24 387450534 ps
T1062 /workspace/coverage/default/62.otp_ctrl_parallel_lc_esc.2744860048 Feb 21 02:09:08 PM PST 24 Feb 21 02:09:22 PM PST 24 1034942466 ps
T267 /workspace/coverage/default/154.otp_ctrl_parallel_lc_esc.3922250651 Feb 21 02:11:04 PM PST 24 Feb 21 02:11:14 PM PST 24 668181853 ps
T1063 /workspace/coverage/default/76.otp_ctrl_init_fail.2244520094 Feb 21 02:09:30 PM PST 24 Feb 21 02:09:36 PM PST 24 122768609 ps
T1064 /workspace/coverage/default/200.otp_ctrl_init_fail.304017730 Feb 21 02:11:45 PM PST 24 Feb 21 02:11:49 PM PST 24 461300560 ps
T1065 /workspace/coverage/default/146.otp_ctrl_parallel_lc_esc.2053947339 Feb 21 02:10:52 PM PST 24 Feb 21 02:11:11 PM PST 24 3740370705 ps
T1066 /workspace/coverage/default/1.otp_ctrl_macro_errs.2590680989 Feb 21 02:00:59 PM PST 24 Feb 21 02:01:12 PM PST 24 556405829 ps
T1067 /workspace/coverage/default/6.otp_ctrl_test_access.163951985 Feb 21 02:02:22 PM PST 24 Feb 21 02:02:57 PM PST 24 11995954744 ps
T1068 /workspace/coverage/default/45.otp_ctrl_alert_test.870081844 Feb 21 02:08:30 PM PST 24 Feb 21 02:08:32 PM PST 24 206792582 ps
T1069 /workspace/coverage/default/28.otp_ctrl_stress_all.756577546 Feb 21 02:06:13 PM PST 24 Feb 21 02:11:51 PM PST 24 20034319403 ps
T1070 /workspace/coverage/default/36.otp_ctrl_stress_all.840166877 Feb 21 02:07:10 PM PST 24 Feb 21 02:09:30 PM PST 24 4295914287 ps
T1071 /workspace/coverage/default/92.otp_ctrl_parallel_lc_esc.788787008 Feb 21 02:09:59 PM PST 24 Feb 21 02:10:08 PM PST 24 163969613 ps
T1072 /workspace/coverage/default/33.otp_ctrl_stress_all.2739211505 Feb 21 02:06:58 PM PST 24 Feb 21 02:09:56 PM PST 24 21163426750 ps
T1073 /workspace/coverage/default/28.otp_ctrl_macro_errs.3170925519 Feb 21 02:06:11 PM PST 24 Feb 21 02:06:48 PM PST 24 1280821524 ps
T1074 /workspace/coverage/default/49.otp_ctrl_parallel_key_req.3756091494 Feb 21 02:08:59 PM PST 24 Feb 21 02:09:18 PM PST 24 2396378012 ps
T1075 /workspace/coverage/default/39.otp_ctrl_alert_test.4061986463 Feb 21 02:07:55 PM PST 24 Feb 21 02:07:58 PM PST 24 818733950 ps
T1076 /workspace/coverage/default/72.otp_ctrl_stress_all_with_rand_reset.4216227999 Feb 21 02:09:21 PM PST 24 Feb 21 03:07:46 PM PST 24 225577486726 ps
T1077 /workspace/coverage/default/7.otp_ctrl_stress_all.3455078046 Feb 21 02:02:49 PM PST 24 Feb 21 02:04:03 PM PST 24 2066589601 ps
T1078 /workspace/coverage/default/43.otp_ctrl_macro_errs.2899197700 Feb 21 02:08:04 PM PST 24 Feb 21 02:08:20 PM PST 24 429525177 ps
T1079 /workspace/coverage/default/0.otp_ctrl_parallel_lc_esc.672195973 Feb 21 02:00:19 PM PST 24 Feb 21 02:00:35 PM PST 24 288669549 ps
T1080 /workspace/coverage/default/191.otp_ctrl_parallel_lc_esc.899702105 Feb 21 02:11:35 PM PST 24 Feb 21 02:11:51 PM PST 24 2038232729 ps
T1081 /workspace/coverage/default/147.otp_ctrl_parallel_lc_esc.3942576084 Feb 21 02:10:59 PM PST 24 Feb 21 02:11:03 PM PST 24 121491950 ps
T1082 /workspace/coverage/default/23.otp_ctrl_dai_errs.776580895 Feb 21 02:05:25 PM PST 24 Feb 21 02:06:03 PM PST 24 1088194633 ps
T1083 /workspace/coverage/default/47.otp_ctrl_dai_errs.2398755933 Feb 21 02:08:36 PM PST 24 Feb 21 02:08:46 PM PST 24 313859999 ps
T1084 /workspace/coverage/default/30.otp_ctrl_stress_all.1145447154 Feb 21 02:06:28 PM PST 24 Feb 21 02:09:04 PM PST 24 20578921756 ps
T1085 /workspace/coverage/default/14.otp_ctrl_init_fail.355629233 Feb 21 02:03:45 PM PST 24 Feb 21 02:03:51 PM PST 24 146681691 ps
T1086 /workspace/coverage/default/17.otp_ctrl_stress_all.3119848756 Feb 21 02:04:34 PM PST 24 Feb 21 02:06:23 PM PST 24 28979588905 ps
T328 /workspace/coverage/default/55.otp_ctrl_stress_all_with_rand_reset.495287064 Feb 21 02:09:07 PM PST 24 Feb 21 04:03:37 PM PST 24 1000319812361 ps
T1087 /workspace/coverage/default/232.otp_ctrl_init_fail.4069197819 Feb 21 02:12:11 PM PST 24 Feb 21 02:12:18 PM PST 24 1576997921 ps
T97 /workspace/coverage/default/266.otp_ctrl_init_fail.670070332 Feb 21 02:12:12 PM PST 24 Feb 21 02:12:16 PM PST 24 136813019 ps
T1088 /workspace/coverage/default/32.otp_ctrl_macro_errs.3553811930 Feb 21 02:06:34 PM PST 24 Feb 21 02:06:52 PM PST 24 8060294921 ps
T252 /workspace/coverage/default/23.otp_ctrl_parallel_lc_esc.1286226558 Feb 21 02:05:22 PM PST 24 Feb 21 02:05:29 PM PST 24 491185586 ps
T1089 /workspace/coverage/default/162.otp_ctrl_init_fail.1001489187 Feb 21 02:11:09 PM PST 24 Feb 21 02:11:16 PM PST 24 2074702367 ps
T1090 /workspace/coverage/default/45.otp_ctrl_init_fail.700094414 Feb 21 02:08:19 PM PST 24 Feb 21 02:08:24 PM PST 24 1934678322 ps
T125 /workspace/coverage/default/4.otp_ctrl_check_fail.2660776236 Feb 21 02:02:01 PM PST 24 Feb 21 02:02:09 PM PST 24 572487135 ps
T1091 /workspace/coverage/default/237.otp_ctrl_init_fail.1729544904 Feb 21 02:12:09 PM PST 24 Feb 21 02:12:14 PM PST 24 143669006 ps
T1092 /workspace/coverage/default/176.otp_ctrl_init_fail.2536871345 Feb 21 02:11:27 PM PST 24 Feb 21 02:11:32 PM PST 24 273117910 ps
T1093 /workspace/coverage/default/40.otp_ctrl_test_access.3864759996 Feb 21 02:07:54 PM PST 24 Feb 21 02:08:27 PM PST 24 5284752660 ps
T1094 /workspace/coverage/default/89.otp_ctrl_init_fail.662053397 Feb 21 02:09:48 PM PST 24 Feb 21 02:09:52 PM PST 24 111122921 ps
T1095 /workspace/coverage/default/38.otp_ctrl_alert_test.1471524431 Feb 21 02:07:38 PM PST 24 Feb 21 02:07:41 PM PST 24 113450991 ps
T1096 /workspace/coverage/default/204.otp_ctrl_init_fail.2359005835 Feb 21 02:11:41 PM PST 24 Feb 21 02:11:45 PM PST 24 184892278 ps
T1097 /workspace/coverage/default/35.otp_ctrl_dai_errs.2934474269 Feb 21 02:07:17 PM PST 24 Feb 21 02:08:05 PM PST 24 4577156269 ps
T1098 /workspace/coverage/default/44.otp_ctrl_regwen.1231419350 Feb 21 02:08:19 PM PST 24 Feb 21 02:08:24 PM PST 24 2096763166 ps
T1099 /workspace/coverage/default/213.otp_ctrl_init_fail.2426467923 Feb 21 02:12:05 PM PST 24 Feb 21 02:12:09 PM PST 24 153980293 ps
T1100 /workspace/coverage/default/46.otp_ctrl_parallel_key_req.1155778300 Feb 21 02:08:25 PM PST 24 Feb 21 02:08:32 PM PST 24 368703784 ps
T1101 /workspace/coverage/default/84.otp_ctrl_init_fail.3930303254 Feb 21 02:09:54 PM PST 24 Feb 21 02:09:59 PM PST 24 207587420 ps
T253 /workspace/coverage/default/85.otp_ctrl_parallel_lc_esc.3217538597 Feb 21 02:09:50 PM PST 24 Feb 21 02:09:56 PM PST 24 296581012 ps
T1102 /workspace/coverage/default/14.otp_ctrl_parallel_lc_esc.1139477282 Feb 21 02:04:05 PM PST 24 Feb 21 02:04:13 PM PST 24 300120290 ps
T1103 /workspace/coverage/default/108.otp_ctrl_init_fail.2115300500 Feb 21 02:10:09 PM PST 24 Feb 21 02:10:14 PM PST 24 388529116 ps
T1104 /workspace/coverage/default/6.otp_ctrl_parallel_lc_req.3165358943 Feb 21 02:02:08 PM PST 24 Feb 21 02:02:28 PM PST 24 1893608158 ps
T1105 /workspace/coverage/default/257.otp_ctrl_init_fail.832327486 Feb 21 02:12:08 PM PST 24 Feb 21 02:12:14 PM PST 24 255884741 ps
T1106 /workspace/coverage/default/195.otp_ctrl_parallel_lc_esc.211017445 Feb 21 02:11:35 PM PST 24 Feb 21 02:11:43 PM PST 24 158076168 ps
T1107 /workspace/coverage/default/106.otp_ctrl_init_fail.977831772 Feb 21 02:10:05 PM PST 24 Feb 21 02:10:09 PM PST 24 160612116 ps
T1108 /workspace/coverage/default/2.otp_ctrl_background_chks.3177247181 Feb 21 02:01:04 PM PST 24 Feb 21 02:01:31 PM PST 24 2082821445 ps
T1109 /workspace/coverage/default/32.otp_ctrl_parallel_lc_req.2784509489 Feb 21 02:06:36 PM PST 24 Feb 21 02:06:50 PM PST 24 815254591 ps
T1110 /workspace/coverage/default/74.otp_ctrl_parallel_lc_esc.4080956606 Feb 21 02:09:37 PM PST 24 Feb 21 02:09:45 PM PST 24 311649281 ps
T329 /workspace/coverage/default/3.otp_ctrl_stress_all_with_rand_reset.568121006 Feb 21 02:01:53 PM PST 24 Feb 21 03:04:39 PM PST 24 158028659222 ps
T1111 /workspace/coverage/default/164.otp_ctrl_init_fail.4255997222 Feb 21 02:11:24 PM PST 24 Feb 21 02:11:30 PM PST 24 645969016 ps
T1112 /workspace/coverage/default/0.otp_ctrl_low_freq_read.1206312745 Feb 21 02:00:17 PM PST 24 Feb 21 02:00:30 PM PST 24 3011630502 ps
T1113 /workspace/coverage/default/7.otp_ctrl_dai_lock.84376087 Feb 21 02:02:39 PM PST 24 Feb 21 02:02:43 PM PST 24 104409870 ps
T1114 /workspace/coverage/default/38.otp_ctrl_init_fail.4183067849 Feb 21 02:07:21 PM PST 24 Feb 21 02:07:26 PM PST 24 372485041 ps
T1115 /workspace/coverage/default/217.otp_ctrl_init_fail.2935662446 Feb 21 02:12:03 PM PST 24 Feb 21 02:12:09 PM PST 24 138424719 ps
T1116 /workspace/coverage/default/109.otp_ctrl_init_fail.3707403570 Feb 21 02:10:06 PM PST 24 Feb 21 02:10:11 PM PST 24 268084722 ps
T1117 /workspace/coverage/default/65.otp_ctrl_init_fail.42460212 Feb 21 02:09:07 PM PST 24 Feb 21 02:09:12 PM PST 24 123163955 ps
T1118 /workspace/coverage/default/184.otp_ctrl_init_fail.1137803653 Feb 21 02:11:27 PM PST 24 Feb 21 02:11:34 PM PST 24 2613512777 ps
T1119 /workspace/coverage/default/16.otp_ctrl_test_access.789357559 Feb 21 02:04:20 PM PST 24 Feb 21 02:04:47 PM PST 24 1025664189 ps
T1120 /workspace/coverage/default/0.otp_ctrl_stress_all.587320443 Feb 21 02:00:40 PM PST 24 Feb 21 02:02:59 PM PST 24 7073391480 ps
T1121 /workspace/coverage/default/47.otp_ctrl_stress_all.2900883730 Feb 21 02:08:45 PM PST 24 Feb 21 02:09:05 PM PST 24 670323550 ps
T1122 /workspace/coverage/default/27.otp_ctrl_check_fail.3825388112 Feb 21 02:06:08 PM PST 24 Feb 21 02:06:23 PM PST 24 565523852 ps
T1123 /workspace/coverage/default/6.otp_ctrl_smoke.2646426625 Feb 21 02:02:06 PM PST 24 Feb 21 02:02:13 PM PST 24 852853073 ps
T1124 /workspace/coverage/default/297.otp_ctrl_init_fail.2459501883 Feb 21 02:12:20 PM PST 24 Feb 21 02:12:26 PM PST 24 498292136 ps
T1125 /workspace/coverage/default/34.otp_ctrl_dai_lock.3407540046 Feb 21 02:06:58 PM PST 24 Feb 21 02:07:19 PM PST 24 5572323281 ps
T1126 /workspace/coverage/default/68.otp_ctrl_stress_all_with_rand_reset.2599237479 Feb 21 02:09:28 PM PST 24 Feb 21 03:12:24 PM PST 24 357950468890 ps
T1127 /workspace/coverage/default/20.otp_ctrl_test_access.1363030057 Feb 21 02:05:05 PM PST 24 Feb 21 02:05:32 PM PST 24 2928153374 ps
T1128 /workspace/coverage/default/4.otp_ctrl_smoke.7790111 Feb 21 02:01:47 PM PST 24 Feb 21 02:01:53 PM PST 24 2241784867 ps
T1129 /workspace/coverage/default/49.otp_ctrl_regwen.1113679394 Feb 21 02:08:59 PM PST 24 Feb 21 02:09:07 PM PST 24 178685162 ps
T1130 /workspace/coverage/default/83.otp_ctrl_parallel_lc_esc.1547049251 Feb 21 02:09:46 PM PST 24 Feb 21 02:10:02 PM PST 24 1023783569 ps
T1131 /workspace/coverage/default/177.otp_ctrl_init_fail.1682611658 Feb 21 02:11:29 PM PST 24 Feb 21 02:11:35 PM PST 24 558861037 ps
T1132 /workspace/coverage/default/26.otp_ctrl_stress_all.1034955376 Feb 21 02:05:58 PM PST 24 Feb 21 02:06:18 PM PST 24 11154591472 ps
T261 /workspace/coverage/default/1.otp_ctrl_sec_cm.83857194 Feb 21 02:01:05 PM PST 24 Feb 21 02:04:37 PM PST 24 12891696812 ps
T1133 /workspace/coverage/default/31.otp_ctrl_stress_all.1915376925 Feb 21 02:06:34 PM PST 24 Feb 21 02:09:47 PM PST 24 92286590699 ps
T1134 /workspace/coverage/default/110.otp_ctrl_init_fail.3931774456 Feb 21 02:10:06 PM PST 24 Feb 21 02:10:13 PM PST 24 1582844874 ps
T1135 /workspace/coverage/default/103.otp_ctrl_parallel_lc_esc.1292726991 Feb 21 02:10:09 PM PST 24 Feb 21 02:10:19 PM PST 24 347780078 ps
T1136 /workspace/coverage/default/32.otp_ctrl_parallel_key_req.3893481315 Feb 21 02:06:33 PM PST 24 Feb 21 02:06:49 PM PST 24 1927414673 ps
T1137 /workspace/coverage/default/3.otp_ctrl_init_fail.3449686370 Feb 21 02:01:35 PM PST 24 Feb 21 02:01:40 PM PST 24 320089640 ps
T1138 /workspace/coverage/default/23.otp_ctrl_init_fail.2331760842 Feb 21 02:05:22 PM PST 24 Feb 21 02:05:27 PM PST 24 117386805 ps
T1139 /workspace/coverage/default/262.otp_ctrl_init_fail.3358193277 Feb 21 02:12:08 PM PST 24 Feb 21 02:12:13 PM PST 24 315058934 ps
T1140 /workspace/coverage/default/31.otp_ctrl_init_fail.3139424773 Feb 21 02:06:23 PM PST 24 Feb 21 02:06:28 PM PST 24 445324439 ps
T1141 /workspace/coverage/default/44.otp_ctrl_dai_lock.3911777863 Feb 21 02:08:08 PM PST 24 Feb 21 02:08:23 PM PST 24 2312167559 ps
T1142 /workspace/coverage/default/7.otp_ctrl_dai_errs.25373640 Feb 21 02:02:49 PM PST 24 Feb 21 02:03:06 PM PST 24 486595859 ps
T1143 /workspace/coverage/default/8.otp_ctrl_test_access.2307256387 Feb 21 02:02:56 PM PST 24 Feb 21 02:03:15 PM PST 24 972249339 ps
T1144 /workspace/coverage/default/216.otp_ctrl_init_fail.374935555 Feb 21 02:12:01 PM PST 24 Feb 21 02:12:05 PM PST 24 272780652 ps
T1145 /workspace/coverage/default/11.otp_ctrl_alert_test.3894657640 Feb 21 02:03:43 PM PST 24 Feb 21 02:03:46 PM PST 24 70187932 ps
T1146 /workspace/coverage/default/11.otp_ctrl_dai_lock.3033569742 Feb 21 02:03:35 PM PST 24 Feb 21 02:03:40 PM PST 24 2770342549 ps
T1147 /workspace/coverage/default/146.otp_ctrl_init_fail.646880836 Feb 21 02:10:50 PM PST 24 Feb 21 02:10:55 PM PST 24 398853539 ps
T1148 /workspace/coverage/default/46.otp_ctrl_smoke.860499017 Feb 21 02:08:25 PM PST 24 Feb 21 02:08:36 PM PST 24 1156242167 ps
T1149 /workspace/coverage/default/13.otp_ctrl_regwen.1411822505 Feb 21 02:03:46 PM PST 24 Feb 21 02:03:58 PM PST 24 499861452 ps
T1150 /workspace/coverage/default/35.otp_ctrl_stress_all_with_rand_reset.468740642 Feb 21 02:07:16 PM PST 24 Feb 21 05:04:02 PM PST 24 1616674626884 ps
T1151 /workspace/coverage/default/24.otp_ctrl_dai_lock.3513408035 Feb 21 02:05:33 PM PST 24 Feb 21 02:05:45 PM PST 24 1663144816 ps
T1152 /workspace/coverage/default/12.otp_ctrl_alert_test.169004397 Feb 21 02:03:44 PM PST 24 Feb 21 02:03:46 PM PST 24 596884922 ps
T1153 /workspace/coverage/default/55.otp_ctrl_init_fail.2937772994 Feb 21 02:09:05 PM PST 24 Feb 21 02:09:11 PM PST 24 122423857 ps
T1154 /workspace/coverage/default/274.otp_ctrl_init_fail.2768477838 Feb 21 02:12:16 PM PST 24 Feb 21 02:12:20 PM PST 24 111751041 ps
T1155 /workspace/coverage/default/119.otp_ctrl_parallel_lc_esc.266089307 Feb 21 02:10:33 PM PST 24 Feb 21 02:10:38 PM PST 24 163483121 ps
T1156 /workspace/coverage/default/49.otp_ctrl_init_fail.3990546890 Feb 21 02:08:57 PM PST 24 Feb 21 02:09:01 PM PST 24 282524254 ps
T1157 /workspace/coverage/default/107.otp_ctrl_init_fail.407460255 Feb 21 02:10:05 PM PST 24 Feb 21 02:10:10 PM PST 24 195437311 ps
T1158 /workspace/coverage/default/125.otp_ctrl_init_fail.3758503191 Feb 21 02:10:38 PM PST 24 Feb 21 02:10:43 PM PST 24 1412290512 ps
T1159 /workspace/coverage/default/14.otp_ctrl_macro_errs.2558925401 Feb 21 02:04:09 PM PST 24 Feb 21 02:04:24 PM PST 24 1631746672 ps
T1160 /workspace/coverage/default/78.otp_ctrl_parallel_lc_esc.631823149 Feb 21 02:09:41 PM PST 24 Feb 21 02:09:50 PM PST 24 124394338 ps
T1161 /workspace/coverage/default/247.otp_ctrl_init_fail.1483767573 Feb 21 02:12:08 PM PST 24 Feb 21 02:12:14 PM PST 24 251426395 ps
T1162 /workspace/coverage/default/88.otp_ctrl_init_fail.3618712579 Feb 21 02:09:53 PM PST 24 Feb 21 02:09:57 PM PST 24 302393528 ps
T1163 /workspace/coverage/default/41.otp_ctrl_dai_errs.2338007742 Feb 21 02:07:55 PM PST 24 Feb 21 02:08:12 PM PST 24 3741727030 ps
T1164 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_errors.1056154829 Feb 21 12:33:22 PM PST 24 Feb 21 12:33:29 PM PST 24 286410837 ps
T1165 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_errors.3147686306 Feb 21 12:33:22 PM PST 24 Feb 21 12:33:27 PM PST 24 378401733 ps
T377 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.218258021 Feb 21 12:33:23 PM PST 24 Feb 21 12:33:29 PM PST 24 451955529 ps
T1166 /workspace/coverage/cover_reg_top/17.otp_ctrl_tl_errors.634684443 Feb 21 12:33:34 PM PST 24 Feb 21 12:33:42 PM PST 24 2520488004 ps
T1167 /workspace/coverage/cover_reg_top/40.otp_ctrl_intr_test.111888245 Feb 21 12:33:48 PM PST 24 Feb 21 12:33:50 PM PST 24 39644864 ps
T1168 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_errors.1197726658 Feb 21 12:33:37 PM PST 24 Feb 21 12:33:41 PM PST 24 86312813 ps
T282 /workspace/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.346398998 Feb 21 12:33:52 PM PST 24 Feb 21 12:34:19 PM PST 24 19032153464 ps
T285 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_rw.3267180400 Feb 21 12:33:24 PM PST 24 Feb 21 12:33:26 PM PST 24 148486253 ps
T1169 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.3485972418 Feb 21 12:33:20 PM PST 24 Feb 21 12:33:22 PM PST 24 37499724 ps
T287 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.1555682303 Feb 21 12:33:21 PM PST 24 Feb 21 12:33:28 PM PST 24 312155130 ps
T1170 /workspace/coverage/cover_reg_top/3.otp_ctrl_intr_test.2131204552 Feb 21 12:33:22 PM PST 24 Feb 21 12:33:25 PM PST 24 157317035 ps
T283 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.2461698369 Feb 21 12:33:33 PM PST 24 Feb 21 12:33:46 PM PST 24 2303132792 ps
T284 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.2666338473 Feb 21 12:33:38 PM PST 24 Feb 21 12:33:50 PM PST 24 1277259809 ps
T1171 /workspace/coverage/cover_reg_top/0.otp_ctrl_intr_test.1970292470 Feb 21 12:34:47 PM PST 24 Feb 21 12:34:50 PM PST 24 47503427 ps
T1172 /workspace/coverage/cover_reg_top/44.otp_ctrl_intr_test.2056418841 Feb 21 12:33:59 PM PST 24 Feb 21 12:34:00 PM PST 24 74689754 ps
T1173 /workspace/coverage/cover_reg_top/47.otp_ctrl_intr_test.813742583 Feb 21 12:34:07 PM PST 24 Feb 21 12:34:10 PM PST 24 565762290 ps
T1174 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_walk.3079410667 Feb 21 12:33:18 PM PST 24 Feb 21 12:33:20 PM PST 24 70825322 ps
T288 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.1957291046 Feb 21 12:33:20 PM PST 24 Feb 21 12:33:41 PM PST 24 2783395429 ps
T358 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.660773374 Feb 21 12:33:36 PM PST 24 Feb 21 12:34:05 PM PST 24 20220575537 ps
T1175 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_errors.535390951 Feb 21 12:33:41 PM PST 24 Feb 21 12:33:44 PM PST 24 162378103 ps
T354 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.4035173923 Feb 21 12:33:24 PM PST 24 Feb 21 12:33:36 PM PST 24 979036542 ps
T1176 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.3067495667 Feb 21 12:33:21 PM PST 24 Feb 21 12:33:24 PM PST 24 63931417 ps
T305 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.4131174810 Feb 21 12:33:25 PM PST 24 Feb 21 12:33:28 PM PST 24 359907264 ps
T1177 /workspace/coverage/cover_reg_top/6.otp_ctrl_intr_test.404552418 Feb 21 12:33:34 PM PST 24 Feb 21 12:33:36 PM PST 24 86699800 ps
T355 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.1657624951 Feb 21 12:33:24 PM PST 24 Feb 21 12:33:34 PM PST 24 704242832 ps
T1178 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_errors.1392018120 Feb 21 12:33:23 PM PST 24 Feb 21 12:33:27 PM PST 24 62780115 ps
T1179 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_errors.154005894 Feb 21 12:33:19 PM PST 24 Feb 21 12:33:25 PM PST 24 1105417445 ps
T1180 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.4026465500 Feb 21 12:33:35 PM PST 24 Feb 21 12:33:36 PM PST 24 549266164 ps
T1181 /workspace/coverage/cover_reg_top/28.otp_ctrl_intr_test.1011289029 Feb 21 12:33:39 PM PST 24 Feb 21 12:33:41 PM PST 24 43112666 ps
T360 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.2260261116 Feb 21 12:33:22 PM PST 24 Feb 21 12:33:43 PM PST 24 10158607696 ps
T1182 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_walk.1594867511 Feb 21 12:35:32 PM PST 24 Feb 21 12:35:34 PM PST 24 50566743 ps
T1183 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_errors.3466010168 Feb 21 12:33:37 PM PST 24 Feb 21 12:33:40 PM PST 24 57722601 ps
T1184 /workspace/coverage/cover_reg_top/4.otp_ctrl_intr_test.791283227 Feb 21 12:33:19 PM PST 24 Feb 21 12:33:21 PM PST 24 39260946 ps
T356 /workspace/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.629029569 Feb 21 12:33:22 PM PST 24 Feb 21 12:33:44 PM PST 24 4844923551 ps
T1185 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.3417784068 Feb 21 12:33:46 PM PST 24 Feb 21 12:33:49 PM PST 24 277843852 ps
T359 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.4203924715 Feb 21 12:33:50 PM PST 24 Feb 21 12:34:10 PM PST 24 2379051840 ps
T1186 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.802876507 Feb 21 12:33:34 PM PST 24 Feb 21 12:33:56 PM PST 24 10257308966 ps
T330 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_rw.3861826420 Feb 21 12:33:43 PM PST 24 Feb 21 12:33:45 PM PST 24 670715484 ps
T331 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_rw.2875004134 Feb 21 12:33:34 PM PST 24 Feb 21 12:33:36 PM PST 24 136304792 ps
T1187 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.2540693008 Feb 21 12:33:34 PM PST 24 Feb 21 12:33:36 PM PST 24 570658619 ps
T1188 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_walk.3303406429 Feb 21 12:33:17 PM PST 24 Feb 21 12:33:19 PM PST 24 540640011 ps
T1189 /workspace/coverage/cover_reg_top/19.otp_ctrl_intr_test.2918580010 Feb 21 12:33:49 PM PST 24 Feb 21 12:33:51 PM PST 24 99138306 ps
T1190 /workspace/coverage/cover_reg_top/10.otp_ctrl_intr_test.508789939 Feb 21 12:33:23 PM PST 24 Feb 21 12:33:25 PM PST 24 40275549 ps
T1191 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_errors.121180587 Feb 21 12:33:24 PM PST 24 Feb 21 12:33:31 PM PST 24 727617426 ps
T286 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.3751372480 Feb 21 12:33:48 PM PST 24 Feb 21 12:34:08 PM PST 24 1291840067 ps
T1192 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.23975534 Feb 21 12:33:43 PM PST 24 Feb 21 12:33:46 PM PST 24 106092989 ps
T1193 /workspace/coverage/cover_reg_top/15.otp_ctrl_tl_errors.961393837 Feb 21 12:33:53 PM PST 24 Feb 21 12:33:58 PM PST 24 1072396900 ps
T1194 /workspace/coverage/cover_reg_top/8.otp_ctrl_intr_test.1067710072 Feb 21 12:33:42 PM PST 24 Feb 21 12:33:44 PM PST 24 97513473 ps
T306 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_rw.171337515 Feb 21 12:33:20 PM PST 24 Feb 21 12:33:23 PM PST 24 91163167 ps
T1195 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.4118383342 Feb 21 12:34:57 PM PST 24 Feb 21 12:35:03 PM PST 24 97431292 ps
T332 /workspace/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.563254513 Feb 21 12:35:25 PM PST 24 Feb 21 12:35:28 PM PST 24 664508092 ps
T1196 /workspace/coverage/cover_reg_top/48.otp_ctrl_intr_test.2065463885 Feb 21 12:33:47 PM PST 24 Feb 21 12:33:49 PM PST 24 139518999 ps
T1197 /workspace/coverage/cover_reg_top/21.otp_ctrl_intr_test.4229407741 Feb 21 12:33:41 PM PST 24 Feb 21 12:33:42 PM PST 24 577493251 ps
T307 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_rw.975738305 Feb 21 12:33:33 PM PST 24 Feb 21 12:33:36 PM PST 24 673748291 ps
T308 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.1796886981 Feb 21 12:33:34 PM PST 24 Feb 21 12:33:37 PM PST 24 117508623 ps
T333 /workspace/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.560885950 Feb 21 12:33:34 PM PST 24 Feb 21 12:33:37 PM PST 24 794967469 ps
T1198 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.2966979986 Feb 21 12:33:36 PM PST 24 Feb 21 12:33:40 PM PST 24 103658377 ps
T362 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.4051678636 Feb 21 12:33:24 PM PST 24 Feb 21 12:33:42 PM PST 24 1390307835 ps
T361 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.3561864838 Feb 21 12:34:13 PM PST 24 Feb 21 12:34:34 PM PST 24 4754612697 ps
T1199 /workspace/coverage/cover_reg_top/45.otp_ctrl_intr_test.2132632394 Feb 21 12:33:54 PM PST 24 Feb 21 12:33:57 PM PST 24 534938731 ps
T309 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_rw.3622822437 Feb 21 12:33:42 PM PST 24 Feb 21 12:33:44 PM PST 24 76469798 ps
T1200 /workspace/coverage/cover_reg_top/32.otp_ctrl_intr_test.1419284636 Feb 21 12:33:34 PM PST 24 Feb 21 12:33:35 PM PST 24 72679059 ps
T1201 /workspace/coverage/cover_reg_top/25.otp_ctrl_intr_test.1180228134 Feb 21 12:33:37 PM PST 24 Feb 21 12:33:39 PM PST 24 136170321 ps
T1202 /workspace/coverage/cover_reg_top/16.otp_ctrl_intr_test.1785134502 Feb 21 12:33:52 PM PST 24 Feb 21 12:33:54 PM PST 24 55834000 ps
T1203 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_walk.2635997987 Feb 21 12:34:47 PM PST 24 Feb 21 12:34:51 PM PST 24 36465892 ps
T1204 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.888835542 Feb 21 12:33:18 PM PST 24 Feb 21 12:33:20 PM PST 24 551480128 ps
T310 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_rw.41893240 Feb 21 12:33:22 PM PST 24 Feb 21 12:33:24 PM PST 24 591438538 ps
T311 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.466373545 Feb 21 12:33:37 PM PST 24 Feb 21 12:33:39 PM PST 24 72045736 ps
T1205 /workspace/coverage/cover_reg_top/12.otp_ctrl_intr_test.1470229750 Feb 21 12:33:21 PM PST 24 Feb 21 12:33:23 PM PST 24 92943624 ps
T334 /workspace/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.2347803979 Feb 21 12:33:35 PM PST 24 Feb 21 12:33:39 PM PST 24 1240501215 ps
T1206 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_errors.4272060794 Feb 21 12:33:21 PM PST 24 Feb 21 12:33:27 PM PST 24 517302146 ps
T1207 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.2305543450 Feb 21 12:34:47 PM PST 24 Feb 21 12:34:56 PM PST 24 195185398 ps
T1208 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_rw.330736419 Feb 21 12:33:51 PM PST 24 Feb 21 12:33:53 PM PST 24 46169343 ps
T1209 /workspace/coverage/cover_reg_top/15.otp_ctrl_intr_test.169162377 Feb 21 12:33:51 PM PST 24 Feb 21 12:33:53 PM PST 24 82112559 ps
T1210 /workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.1040957584 Feb 21 12:33:55 PM PST 24 Feb 21 12:33:58 PM PST 24 42431230 ps
T357 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.3337948314 Feb 21 12:33:36 PM PST 24 Feb 21 12:33:54 PM PST 24 10195961889 ps
T312 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.1936234080 Feb 21 12:35:26 PM PST 24 Feb 21 12:35:32 PM PST 24 1216892650 ps
T1211 /workspace/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.966059044 Feb 21 12:33:26 PM PST 24 Feb 21 12:33:29 PM PST 24 131013539 ps
T1212 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.1056268767 Feb 21 12:33:34 PM PST 24 Feb 21 12:33:56 PM PST 24 2710781856 ps
T1213 /workspace/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.3697088986 Feb 21 12:33:17 PM PST 24 Feb 21 12:33:20 PM PST 24 334746993 ps
T1214 /workspace/coverage/cover_reg_top/43.otp_ctrl_intr_test.1081321884 Feb 21 12:33:52 PM PST 24 Feb 21 12:33:54 PM PST 24 74377630 ps
T313 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_rw.3365244198 Feb 21 12:33:22 PM PST 24 Feb 21 12:33:25 PM PST 24 56185340 ps
T1215 /workspace/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.2498033466 Feb 21 12:33:35 PM PST 24 Feb 21 12:33:37 PM PST 24 51300126 ps
T1216 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.1486073010 Feb 21 12:33:24 PM PST 24 Feb 21 12:33:32 PM PST 24 1967206470 ps
T1217 /workspace/coverage/cover_reg_top/23.otp_ctrl_intr_test.2451235782 Feb 21 12:33:35 PM PST 24 Feb 21 12:33:37 PM PST 24 81160012 ps
T1218 /workspace/coverage/cover_reg_top/13.otp_ctrl_intr_test.3581771782 Feb 21 12:33:41 PM PST 24 Feb 21 12:33:44 PM PST 24 38520872 ps
T1219 /workspace/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.2406822926 Feb 21 12:33:35 PM PST 24 Feb 21 12:33:37 PM PST 24 247312355 ps
T1220 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.2367665443 Feb 21 12:33:42 PM PST 24 Feb 21 12:33:52 PM PST 24 1632539313 ps
T1221 /workspace/coverage/cover_reg_top/49.otp_ctrl_intr_test.1691025907 Feb 21 12:33:50 PM PST 24 Feb 21 12:33:52 PM PST 24 101698937 ps
T1222 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.2904610413 Feb 21 12:34:47 PM PST 24 Feb 21 12:34:50 PM PST 24 140290946 ps
T1223 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_errors.3176609576 Feb 21 12:33:47 PM PST 24 Feb 21 12:33:53 PM PST 24 161416758 ps
T1224 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_errors.920531287 Feb 21 12:34:57 PM PST 24 Feb 21 12:35:05 PM PST 24 152123258 ps
T1225 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_errors.2076083302 Feb 21 12:33:33 PM PST 24 Feb 21 12:33:37 PM PST 24 74884483 ps
T1226 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_errors.788155155 Feb 21 12:33:19 PM PST 24 Feb 21 12:33:24 PM PST 24 216100459 ps
T1227 /workspace/coverage/cover_reg_top/11.otp_ctrl_intr_test.4092623397 Feb 21 12:33:34 PM PST 24 Feb 21 12:33:36 PM PST 24 136932021 ps
T1228 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.1545470843 Feb 21 12:34:48 PM PST 24 Feb 21 12:35:05 PM PST 24 409964940 ps
T1229 /workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.1968033779 Feb 21 12:33:58 PM PST 24 Feb 21 12:34:02 PM PST 24 120610190 ps
T1230 /workspace/coverage/cover_reg_top/18.otp_ctrl_intr_test.3979612887 Feb 21 12:33:55 PM PST 24 Feb 21 12:33:57 PM PST 24 36838016 ps
T314 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_rw.924207379 Feb 21 12:33:41 PM PST 24 Feb 21 12:33:44 PM PST 24 83708790 ps
T1231 /workspace/coverage/cover_reg_top/5.otp_ctrl_intr_test.2393736800 Feb 21 12:33:14 PM PST 24 Feb 21 12:33:15 PM PST 24 551232569 ps
T1232 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.3871073701 Feb 21 12:33:11 PM PST 24 Feb 21 12:33:13 PM PST 24 132452237 ps
T1233 /workspace/coverage/cover_reg_top/9.otp_ctrl_intr_test.1311461021 Feb 21 12:33:37 PM PST 24 Feb 21 12:33:39 PM PST 24 575757719 ps
T1234 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_rw.924972646 Feb 21 12:35:26 PM PST 24 Feb 21 12:35:28 PM PST 24 66795189 ps
T1235 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.921486574 Feb 21 12:33:44 PM PST 24 Feb 21 12:33:47 PM PST 24 72677593 ps
T1236 /workspace/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.871220277 Feb 21 12:33:26 PM PST 24 Feb 21 12:33:29 PM PST 24 87689693 ps
T1237 /workspace/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.3634272781 Feb 21 12:33:25 PM PST 24 Feb 21 12:33:27 PM PST 24 59277402 ps
T1238 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.3893589925 Feb 21 12:33:40 PM PST 24 Feb 21 12:33:43 PM PST 24 193062000 ps
T1239 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_errors.3410866859 Feb 21 12:33:22 PM PST 24 Feb 21 12:33:27 PM PST 24 95388871 ps
T1240 /workspace/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.3213748571 Feb 21 12:33:15 PM PST 24 Feb 21 12:33:18 PM PST 24 252211217 ps
T1241 /workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.3557667886 Feb 21 12:34:05 PM PST 24 Feb 21 12:34:07 PM PST 24 77179118 ps
T363 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.297487281 Feb 21 12:33:18 PM PST 24 Feb 21 12:33:29 PM PST 24 741661416 ps
T1242 /workspace/coverage/cover_reg_top/2.otp_ctrl_intr_test.2760334249 Feb 21 12:35:26 PM PST 24 Feb 21 12:35:28 PM PST 24 527320267 ps
T1243 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_rw.1346480907 Feb 21 12:33:55 PM PST 24 Feb 21 12:33:58 PM PST 24 74497514 ps
T1244 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_walk.2109029053 Feb 21 12:35:27 PM PST 24 Feb 21 12:35:28 PM PST 24 138257007 ps
T1245 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_errors.2564298587 Feb 21 12:33:35 PM PST 24 Feb 21 12:33:40 PM PST 24 1704629191 ps
T1246 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_errors.3750965077 Feb 21 12:33:32 PM PST 24 Feb 21 12:33:38 PM PST 24 324603788 ps
T1247 /workspace/coverage/cover_reg_top/30.otp_ctrl_intr_test.2979528513 Feb 21 12:33:51 PM PST 24 Feb 21 12:33:53 PM PST 24 40900505 ps
T1248 /workspace/coverage/cover_reg_top/24.otp_ctrl_intr_test.3138854972 Feb 21 12:33:38 PM PST 24 Feb 21 12:33:40 PM PST 24 571539137 ps
T1249 /workspace/coverage/cover_reg_top/36.otp_ctrl_intr_test.2763087637 Feb 21 12:33:55 PM PST 24 Feb 21 12:33:58 PM PST 24 73232061 ps
T1250 /workspace/coverage/cover_reg_top/34.otp_ctrl_intr_test.3321391158 Feb 21 12:33:46 PM PST 24 Feb 21 12:33:48 PM PST 24 41385693 ps
T1251 /workspace/coverage/cover_reg_top/7.otp_ctrl_intr_test.4008478598 Feb 21 12:33:38 PM PST 24 Feb 21 12:33:40 PM PST 24 144061930 ps
T1252 /workspace/coverage/cover_reg_top/31.otp_ctrl_intr_test.134622342 Feb 21 12:33:38 PM PST 24 Feb 21 12:33:39 PM PST 24 85218494 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%