Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
84.44 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv



Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 18 1 17 94.44
Crosses 72 13 59 81.94


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 7 1 6 85.71 100 1 1 0
partition 11 0 11 100.00 100 1 1 0


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
dai_err_code_for_all_partitions 72 13 59 81.94 100 1 1 0


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 1 6 85.71


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 47689 1 T9 394 T13 69 T66 387
access_err 58996 1 T1 152 T3 7 T9 3
write_blank_err 326 1 T6 1 T8 1 T16 5
ecc_uncorr_err 56241 1 T6 180 T8 680 T16 535
ecc_corr_err 1193 1 T23 24 T65 42 T89 1
no_err 84973 1 T1 176 T2 52 T3 51



Summary for Variable partition

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 11 0 11 100.00


User Defined Bins for partition

Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_idx 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
life_cycle 599 1 T6 4 T8 2 T16 6
secret2 22590 1 T1 37 T2 10 T3 5
secret1 26542 1 T1 26 T2 9 T3 11
secret0 28744 1 T1 33 T2 2 T3 5
hw_cfg1 32002 1 T1 35 T2 1 T3 3
hw_cfg0 24500 1 T1 41 T2 10 T3 3
rot_creator_auth_state 22872 1 T1 16 T2 2 T3 6
rot_creator_auth_codesign 20393 1 T1 42 T2 5 T3 7
owner_sw_cfg 21359 1 T1 26 T2 4 T3 4
creator_sw_cfg 20813 1 T1 26 T2 1 T3 4
vendor_test 29004 1 T1 46 T2 8 T3 10



Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
TOTAL 72 13 59 81.94 13
Automatically Generated Cross Bins 72 13 59 81.94 13
User Defined Cross Bins 0 0 0


Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins
err_code_valspartitionCOUNTAT LEASTNUMBERSTATUS
[fsm_err] [life_cycle] 0 1 1
[ecc_corr_err] [vendor_test] 0 1 1
[macro_err] [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] -- -- 10
[no_err] [life_cycle] 0 1 1


Covered bins
err_code_valspartitionCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err secret2 2813 1 T325 481 T326 269 T327 100
fsm_err secret1 4809 1 T6 89 T184 165 T261 547
fsm_err secret0 2469 1 T9 394 T144 201 T139 32
fsm_err hw_cfg1 2618 1 T328 81 T329 36 T330 59
fsm_err hw_cfg0 6185 1 T114 141 T143 377 T223 161
fsm_err rot_creator_auth_state 4199 1 T176 182 T257 244 T138 47
fsm_err rot_creator_auth_codesign 2628 1 T7 163 T215 80 T188 53
fsm_err owner_sw_cfg 4663 1 T141 1 T331 91 T332 42
fsm_err creator_sw_cfg 4314 1 T98 65 T333 22 T253 227
fsm_err vendor_test 12991 1 T13 69 T66 387 T23 342
access_err life_cycle 599 1 T6 4 T8 2 T16 6
access_err secret2 10626 1 T1 28 T9 3 T4 15
access_err secret1 5503 1 T1 19 T5 5 T22 1
access_err secret0 4561 1 T1 8 T4 11 T5 8
access_err hw_cfg1 1265 1 T1 6 T4 1 T5 2
access_err hw_cfg0 2005 1 T1 11 T4 8 T22 2
access_err rot_creator_auth_state 5760 1 T1 3 T3 1 T4 12
access_err rot_creator_auth_codesign 7474 1 T1 19 T3 4 T4 12
access_err owner_sw_cfg 6747 1 T1 14 T3 2 T4 20
access_err creator_sw_cfg 7664 1 T1 16 T4 10 T5 4
access_err vendor_test 6792 1 T1 28 T4 11 T5 14
write_blank_err secret2 13 1 T213 1 T121 1 T334 1
write_blank_err secret1 15 1 T203 1 T211 1 T116 1
write_blank_err secret0 32 1 T16 1 T236 1 T239 1
write_blank_err hw_cfg1 66 1 T6 1 T8 1 T98 1
write_blank_err hw_cfg0 12 1 T128 2 T240 1 T213 2
write_blank_err rot_creator_auth_state 90 1 T16 1 T128 2 T130 2
write_blank_err rot_creator_auth_codesign 37 1 T16 1 T15 5 T282 2
write_blank_err owner_sw_cfg 22 1 T16 2 T15 1 T282 3
write_blank_err creator_sw_cfg 15 1 T335 1 T336 1 T337 3
write_blank_err vendor_test 24 1 T128 1 T236 1 T130 1
ecc_uncorr_err secret2 4239 1 T235 49 T139 31 T213 441
ecc_uncorr_err secret1 7608 1 T203 630 T211 428 T139 30
ecc_uncorr_err secret0 13771 1 T16 535 T236 254 T239 496
ecc_uncorr_err hw_cfg1 17644 1 T6 180 T8 680 T98 483
ecc_uncorr_err hw_cfg0 4380 1 T128 1169 T240 424 T139 42
ecc_uncorr_err rot_creator_auth_state 4951 1 T237 18 T240 537 T139 30
ecc_uncorr_err rot_creator_auth_codesign 1620 1 T338 180 T140 12 T188 110
ecc_uncorr_err owner_sw_cfg 1170 1 T139 31 T339 23 T188 56
ecc_uncorr_err creator_sw_cfg 858 1 T138 32 T140 6 T192 34
ecc_corr_err secret2 70 1 T23 5 T65 8 T71 10
ecc_corr_err secret1 123 1 T23 8 T65 2 T100 3
ecc_corr_err secret0 92 1 T23 2 T65 3 T235 1
ecc_corr_err hw_cfg1 230 1 T23 2 T65 5 T100 1
ecc_corr_err hw_cfg0 231 1 T23 6 T65 3 T235 1
ecc_corr_err rot_creator_auth_state 110 1 T65 8 T100 6 T138 2
ecc_corr_err rot_creator_auth_codesign 101 1 T65 5 T100 6 T71 5
ecc_corr_err owner_sw_cfg 100 1 T23 1 T65 1 T89 1
ecc_corr_err creator_sw_cfg 136 1 T65 7 T100 1 T71 2
no_err secret2 4829 1 T1 9 T2 10 T3 5
no_err secret1 8484 1 T1 7 T2 9 T3 11
no_err secret0 7819 1 T1 25 T2 2 T3 5
no_err hw_cfg1 10179 1 T1 29 T2 1 T3 3
no_err hw_cfg0 11687 1 T1 30 T2 10 T3 3
no_err rot_creator_auth_state 7762 1 T1 13 T2 2 T3 5
no_err rot_creator_auth_codesign 8533 1 T1 23 T2 5 T3 3
no_err owner_sw_cfg 8657 1 T1 12 T2 4 T3 2
no_err creator_sw_cfg 7826 1 T1 10 T2 1 T3 4
no_err vendor_test 9197 1 T1 18 T2 8 T3 10


User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins
NAMECOUNTSTATUS
vendor_test_ecc_uncorrectable_err 0 Illegal
life_cycle_ignore 0 Excluded

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