| T1049 |
/workspace/coverage/default/16.otp_ctrl_stress_all.2449610090 |
|
|
Mar 05 02:47:53 PM PST 24 |
Mar 05 02:51:28 PM PST 24 |
82442260936 ps |
| T1050 |
/workspace/coverage/default/274.otp_ctrl_init_fail.3374626438 |
|
|
Mar 05 02:51:14 PM PST 24 |
Mar 05 02:51:18 PM PST 24 |
1373115306 ps |
| T1051 |
/workspace/coverage/default/4.otp_ctrl_alert_test.1823286852 |
|
|
Mar 05 02:46:47 PM PST 24 |
Mar 05 02:46:49 PM PST 24 |
87367993 ps |
| T1052 |
/workspace/coverage/default/96.otp_ctrl_init_fail.3914380170 |
|
|
Mar 05 02:50:07 PM PST 24 |
Mar 05 02:50:12 PM PST 24 |
214309270 ps |
| T1053 |
/workspace/coverage/default/21.otp_ctrl_test_access.3012875267 |
|
|
Mar 05 02:48:01 PM PST 24 |
Mar 05 02:48:11 PM PST 24 |
941946273 ps |
| T133 |
/workspace/coverage/default/164.otp_ctrl_parallel_lc_esc.632104548 |
|
|
Mar 05 02:50:45 PM PST 24 |
Mar 05 02:50:51 PM PST 24 |
207995694 ps |
| T1054 |
/workspace/coverage/default/172.otp_ctrl_parallel_lc_esc.3560539176 |
|
|
Mar 05 02:50:48 PM PST 24 |
Mar 05 02:50:55 PM PST 24 |
672103007 ps |
| T1055 |
/workspace/coverage/default/140.otp_ctrl_init_fail.2863624822 |
|
|
Mar 05 02:50:31 PM PST 24 |
Mar 05 02:50:36 PM PST 24 |
163007485 ps |
| T1056 |
/workspace/coverage/default/12.otp_ctrl_init_fail.23897805 |
|
|
Mar 05 02:47:27 PM PST 24 |
Mar 05 02:47:31 PM PST 24 |
287133571 ps |
| T1057 |
/workspace/coverage/default/74.otp_ctrl_stress_all_with_rand_reset.976818261 |
|
|
Mar 05 02:49:59 PM PST 24 |
Mar 05 03:40:31 PM PST 24 |
220873422019 ps |
| T1058 |
/workspace/coverage/default/4.otp_ctrl_parallel_lc_esc.3767329847 |
|
|
Mar 05 02:46:45 PM PST 24 |
Mar 05 02:47:05 PM PST 24 |
685363011 ps |
| T1059 |
/workspace/coverage/default/49.otp_ctrl_dai_errs.1208550934 |
|
|
Mar 05 02:49:37 PM PST 24 |
Mar 05 02:50:07 PM PST 24 |
2732177177 ps |
| T1060 |
/workspace/coverage/default/186.otp_ctrl_init_fail.2066978779 |
|
|
Mar 05 02:50:52 PM PST 24 |
Mar 05 02:50:57 PM PST 24 |
140110776 ps |
| T1061 |
/workspace/coverage/default/70.otp_ctrl_parallel_lc_esc.418049279 |
|
|
Mar 05 02:49:52 PM PST 24 |
Mar 05 02:49:56 PM PST 24 |
151096338 ps |
| T1062 |
/workspace/coverage/default/22.otp_ctrl_stress_all.909300465 |
|
|
Mar 05 02:48:07 PM PST 24 |
Mar 05 02:48:24 PM PST 24 |
6014409859 ps |
| T1063 |
/workspace/coverage/default/53.otp_ctrl_parallel_lc_esc.2051622442 |
|
|
Mar 05 02:49:50 PM PST 24 |
Mar 05 02:50:21 PM PST 24 |
11285494434 ps |
| T1064 |
/workspace/coverage/default/37.otp_ctrl_macro_errs.2980905368 |
|
|
Mar 05 02:48:57 PM PST 24 |
Mar 05 02:49:40 PM PST 24 |
11659600515 ps |
| T1065 |
/workspace/coverage/default/167.otp_ctrl_parallel_lc_esc.2998059877 |
|
|
Mar 05 02:50:47 PM PST 24 |
Mar 05 02:50:56 PM PST 24 |
296049994 ps |
| T1066 |
/workspace/coverage/default/16.otp_ctrl_parallel_key_req.1895632844 |
|
|
Mar 05 02:47:47 PM PST 24 |
Mar 05 02:48:11 PM PST 24 |
2547209393 ps |
| T1067 |
/workspace/coverage/default/9.otp_ctrl_check_fail.379662854 |
|
|
Mar 05 02:47:14 PM PST 24 |
Mar 05 02:47:29 PM PST 24 |
1772192514 ps |
| T1068 |
/workspace/coverage/default/26.otp_ctrl_macro_errs.1141893163 |
|
|
Mar 05 02:48:23 PM PST 24 |
Mar 05 02:48:45 PM PST 24 |
1654899919 ps |
| T1069 |
/workspace/coverage/default/31.otp_ctrl_parallel_key_req.752329717 |
|
|
Mar 05 02:48:42 PM PST 24 |
Mar 05 02:48:58 PM PST 24 |
2575275087 ps |
| T1070 |
/workspace/coverage/default/5.otp_ctrl_alert_test.583991567 |
|
|
Mar 05 02:46:53 PM PST 24 |
Mar 05 02:46:56 PM PST 24 |
107007517 ps |
| T1071 |
/workspace/coverage/default/247.otp_ctrl_init_fail.2011002981 |
|
|
Mar 05 02:51:09 PM PST 24 |
Mar 05 02:51:12 PM PST 24 |
137845607 ps |
| T1072 |
/workspace/coverage/default/7.otp_ctrl_smoke.1390113080 |
|
|
Mar 05 02:46:59 PM PST 24 |
Mar 05 02:47:09 PM PST 24 |
545343163 ps |
| T1073 |
/workspace/coverage/default/5.otp_ctrl_macro_errs.1339095102 |
|
|
Mar 05 02:46:53 PM PST 24 |
Mar 05 02:47:17 PM PST 24 |
1203519366 ps |
| T1074 |
/workspace/coverage/default/269.otp_ctrl_init_fail.2795849628 |
|
|
Mar 05 02:51:13 PM PST 24 |
Mar 05 02:51:17 PM PST 24 |
130826429 ps |
| T109 |
/workspace/coverage/default/65.otp_ctrl_stress_all_with_rand_reset.2142025521 |
|
|
Mar 05 02:49:50 PM PST 24 |
Mar 05 04:58:54 PM PST 24 |
457675325285 ps |
| T1075 |
/workspace/coverage/default/14.otp_ctrl_alert_test.2196582519 |
|
|
Mar 05 02:47:37 PM PST 24 |
Mar 05 02:47:40 PM PST 24 |
858222578 ps |
| T1076 |
/workspace/coverage/default/33.otp_ctrl_smoke.244553547 |
|
|
Mar 05 02:48:44 PM PST 24 |
Mar 05 02:48:48 PM PST 24 |
135345721 ps |
| T38 |
/workspace/coverage/default/56.otp_ctrl_init_fail.736007698 |
|
|
Mar 05 02:49:49 PM PST 24 |
Mar 05 02:49:53 PM PST 24 |
259770325 ps |
| T1077 |
/workspace/coverage/default/102.otp_ctrl_parallel_lc_esc.3968935367 |
|
|
Mar 05 02:50:18 PM PST 24 |
Mar 05 02:50:30 PM PST 24 |
4659018317 ps |
| T1078 |
/workspace/coverage/default/233.otp_ctrl_init_fail.374737696 |
|
|
Mar 05 02:51:05 PM PST 24 |
Mar 05 02:51:11 PM PST 24 |
1884322085 ps |
| T78 |
/workspace/coverage/default/198.otp_ctrl_init_fail.1412599628 |
|
|
Mar 05 02:51:00 PM PST 24 |
Mar 05 02:51:04 PM PST 24 |
104488211 ps |
| T63 |
/workspace/coverage/default/150.otp_ctrl_init_fail.599414003 |
|
|
Mar 05 02:50:37 PM PST 24 |
Mar 05 02:50:42 PM PST 24 |
2078449986 ps |
| T1079 |
/workspace/coverage/default/211.otp_ctrl_init_fail.4286304811 |
|
|
Mar 05 02:51:01 PM PST 24 |
Mar 05 02:51:05 PM PST 24 |
1298058046 ps |
| T1080 |
/workspace/coverage/default/40.otp_ctrl_regwen.2742231260 |
|
|
Mar 05 02:49:09 PM PST 24 |
Mar 05 02:49:14 PM PST 24 |
398470311 ps |
| T1081 |
/workspace/coverage/default/13.otp_ctrl_parallel_key_req.1323515978 |
|
|
Mar 05 02:47:37 PM PST 24 |
Mar 05 02:48:06 PM PST 24 |
792997287 ps |
| T1082 |
/workspace/coverage/default/3.otp_ctrl_dai_errs.516812031 |
|
|
Mar 05 02:46:39 PM PST 24 |
Mar 05 02:46:54 PM PST 24 |
570736290 ps |
| T1083 |
/workspace/coverage/default/118.otp_ctrl_parallel_lc_esc.2824464692 |
|
|
Mar 05 02:50:22 PM PST 24 |
Mar 05 02:50:28 PM PST 24 |
1585188287 ps |
| T1084 |
/workspace/coverage/default/43.otp_ctrl_regwen.3862411879 |
|
|
Mar 05 02:49:18 PM PST 24 |
Mar 05 02:49:31 PM PST 24 |
1138910129 ps |
| T1085 |
/workspace/coverage/default/45.otp_ctrl_test_access.1139850979 |
|
|
Mar 05 02:49:24 PM PST 24 |
Mar 05 02:49:28 PM PST 24 |
124531360 ps |
| T1086 |
/workspace/coverage/default/18.otp_ctrl_alert_test.202614829 |
|
|
Mar 05 02:47:53 PM PST 24 |
Mar 05 02:47:55 PM PST 24 |
75481171 ps |
| T148 |
/workspace/coverage/default/121.otp_ctrl_parallel_lc_esc.1869123101 |
|
|
Mar 05 02:50:21 PM PST 24 |
Mar 05 02:50:33 PM PST 24 |
207619037 ps |
| T1087 |
/workspace/coverage/default/40.otp_ctrl_init_fail.3032343033 |
|
|
Mar 05 02:49:03 PM PST 24 |
Mar 05 02:49:07 PM PST 24 |
244469187 ps |
| T1088 |
/workspace/coverage/default/114.otp_ctrl_init_fail.3031795979 |
|
|
Mar 05 02:50:24 PM PST 24 |
Mar 05 02:50:28 PM PST 24 |
243567149 ps |
| T1089 |
/workspace/coverage/default/25.otp_ctrl_alert_test.3522252059 |
|
|
Mar 05 02:48:23 PM PST 24 |
Mar 05 02:48:25 PM PST 24 |
50180698 ps |
| T1090 |
/workspace/coverage/default/37.otp_ctrl_stress_all_with_rand_reset.1295819675 |
|
|
Mar 05 02:48:57 PM PST 24 |
Mar 05 05:23:28 PM PST 24 |
1505731265290 ps |
| T1091 |
/workspace/coverage/default/17.otp_ctrl_alert_test.2692259624 |
|
|
Mar 05 02:47:53 PM PST 24 |
Mar 05 02:47:56 PM PST 24 |
88291033 ps |
| T1092 |
/workspace/coverage/default/3.otp_ctrl_test_access.2096590585 |
|
|
Mar 05 02:46:39 PM PST 24 |
Mar 05 02:47:04 PM PST 24 |
1200645181 ps |
| T1093 |
/workspace/coverage/default/39.otp_ctrl_init_fail.2859423836 |
|
|
Mar 05 02:49:09 PM PST 24 |
Mar 05 02:49:13 PM PST 24 |
1385796326 ps |
| T1094 |
/workspace/coverage/default/45.otp_ctrl_regwen.967406548 |
|
|
Mar 05 02:49:24 PM PST 24 |
Mar 05 02:49:35 PM PST 24 |
596462622 ps |
| T1095 |
/workspace/coverage/default/27.otp_ctrl_dai_lock.3639562183 |
|
|
Mar 05 02:48:21 PM PST 24 |
Mar 05 02:48:42 PM PST 24 |
587959652 ps |
| T1096 |
/workspace/coverage/default/19.otp_ctrl_dai_errs.2863052221 |
|
|
Mar 05 02:47:54 PM PST 24 |
Mar 05 02:48:14 PM PST 24 |
630197396 ps |
| T1097 |
/workspace/coverage/default/78.otp_ctrl_init_fail.790881300 |
|
|
Mar 05 02:50:01 PM PST 24 |
Mar 05 02:50:07 PM PST 24 |
139002333 ps |
| T1098 |
/workspace/coverage/default/188.otp_ctrl_init_fail.702975395 |
|
|
Mar 05 02:51:01 PM PST 24 |
Mar 05 02:51:06 PM PST 24 |
286385564 ps |
| T1099 |
/workspace/coverage/default/10.otp_ctrl_dai_lock.672554795 |
|
|
Mar 05 02:47:19 PM PST 24 |
Mar 05 02:48:17 PM PST 24 |
7727334882 ps |
| T1100 |
/workspace/coverage/default/38.otp_ctrl_parallel_lc_esc.300933648 |
|
|
Mar 05 02:48:57 PM PST 24 |
Mar 05 02:49:04 PM PST 24 |
140052422 ps |
| T1101 |
/workspace/coverage/default/94.otp_ctrl_init_fail.2635049594 |
|
|
Mar 05 02:50:10 PM PST 24 |
Mar 05 02:50:15 PM PST 24 |
1930103751 ps |
| T1102 |
/workspace/coverage/default/61.otp_ctrl_parallel_lc_esc.895702349 |
|
|
Mar 05 02:49:49 PM PST 24 |
Mar 05 02:50:02 PM PST 24 |
534365336 ps |
| T1103 |
/workspace/coverage/default/11.otp_ctrl_parallel_lc_esc.2211256120 |
|
|
Mar 05 02:47:21 PM PST 24 |
Mar 05 02:47:37 PM PST 24 |
2202112736 ps |
| T1104 |
/workspace/coverage/default/17.otp_ctrl_parallel_key_req.2179933548 |
|
|
Mar 05 02:47:49 PM PST 24 |
Mar 05 02:48:11 PM PST 24 |
1816737994 ps |
| T1105 |
/workspace/coverage/default/45.otp_ctrl_check_fail.502674262 |
|
|
Mar 05 02:49:26 PM PST 24 |
Mar 05 02:49:55 PM PST 24 |
10368005749 ps |
| T1106 |
/workspace/coverage/default/12.otp_ctrl_macro_errs.3100135382 |
|
|
Mar 05 02:47:27 PM PST 24 |
Mar 05 02:47:53 PM PST 24 |
15487832508 ps |
| T1107 |
/workspace/coverage/default/3.otp_ctrl_init_fail.3835275096 |
|
|
Mar 05 02:46:40 PM PST 24 |
Mar 05 02:46:44 PM PST 24 |
485346669 ps |
| T1108 |
/workspace/coverage/default/0.otp_ctrl_low_freq_read.576641315 |
|
|
Mar 05 02:46:17 PM PST 24 |
Mar 05 02:46:32 PM PST 24 |
5968713419 ps |
| T1109 |
/workspace/coverage/default/32.otp_ctrl_parallel_lc_esc.3312906790 |
|
|
Mar 05 02:48:42 PM PST 24 |
Mar 05 02:48:56 PM PST 24 |
3708575708 ps |
| T1110 |
/workspace/coverage/default/27.otp_ctrl_alert_test.1540405996 |
|
|
Mar 05 02:48:28 PM PST 24 |
Mar 05 02:48:30 PM PST 24 |
161919031 ps |
| T1111 |
/workspace/coverage/default/16.otp_ctrl_smoke.741606410 |
|
|
Mar 05 02:47:51 PM PST 24 |
Mar 05 02:48:01 PM PST 24 |
787745890 ps |
| T1112 |
/workspace/coverage/default/6.otp_ctrl_background_chks.4118949142 |
|
|
Mar 05 02:46:55 PM PST 24 |
Mar 05 02:47:00 PM PST 24 |
795228053 ps |
| T1113 |
/workspace/coverage/default/92.otp_ctrl_parallel_lc_esc.555784612 |
|
|
Mar 05 02:50:09 PM PST 24 |
Mar 05 02:50:16 PM PST 24 |
359595748 ps |
| T1114 |
/workspace/coverage/default/153.otp_ctrl_parallel_lc_esc.2969117224 |
|
|
Mar 05 02:50:37 PM PST 24 |
Mar 05 02:50:47 PM PST 24 |
2090720116 ps |
| T1115 |
/workspace/coverage/default/47.otp_ctrl_dai_lock.1167357467 |
|
|
Mar 05 02:49:34 PM PST 24 |
Mar 05 02:50:02 PM PST 24 |
13364764203 ps |
| T231 |
/workspace/coverage/default/21.otp_ctrl_parallel_lc_esc.794199846 |
|
|
Mar 05 02:48:03 PM PST 24 |
Mar 05 02:48:22 PM PST 24 |
416595961 ps |
| T1116 |
/workspace/coverage/default/50.otp_ctrl_init_fail.4247692150 |
|
|
Mar 05 02:49:38 PM PST 24 |
Mar 05 02:49:42 PM PST 24 |
133386769 ps |
| T1117 |
/workspace/coverage/default/143.otp_ctrl_parallel_lc_esc.1758503030 |
|
|
Mar 05 02:50:32 PM PST 24 |
Mar 05 02:50:45 PM PST 24 |
1729560920 ps |
| T1118 |
/workspace/coverage/default/46.otp_ctrl_test_access.497732298 |
|
|
Mar 05 02:49:33 PM PST 24 |
Mar 05 02:49:53 PM PST 24 |
6919203769 ps |
| T1119 |
/workspace/coverage/default/12.otp_ctrl_parallel_key_req.2046338280 |
|
|
Mar 05 02:47:29 PM PST 24 |
Mar 05 02:47:51 PM PST 24 |
1922245021 ps |
| T1120 |
/workspace/coverage/default/1.otp_ctrl_dai_lock.223055825 |
|
|
Mar 05 02:46:34 PM PST 24 |
Mar 05 02:47:24 PM PST 24 |
9847382223 ps |
| T96 |
/workspace/coverage/default/11.otp_ctrl_check_fail.2993299297 |
|
|
Mar 05 02:47:27 PM PST 24 |
Mar 05 02:47:53 PM PST 24 |
1501917835 ps |
| T1121 |
/workspace/coverage/default/23.otp_ctrl_dai_lock.330410372 |
|
|
Mar 05 02:48:08 PM PST 24 |
Mar 05 02:48:18 PM PST 24 |
417992859 ps |
| T1122 |
/workspace/coverage/default/47.otp_ctrl_stress_all_with_rand_reset.1494690263 |
|
|
Mar 05 02:49:36 PM PST 24 |
Mar 05 04:33:34 PM PST 24 |
5566075148699 ps |
| T1123 |
/workspace/coverage/default/0.otp_ctrl_partition_walk.3157518346 |
|
|
Mar 05 02:46:15 PM PST 24 |
Mar 05 02:46:35 PM PST 24 |
1607503580 ps |
| T1124 |
/workspace/coverage/default/232.otp_ctrl_init_fail.34211542 |
|
|
Mar 05 02:51:05 PM PST 24 |
Mar 05 02:51:10 PM PST 24 |
312410080 ps |
| T1125 |
/workspace/coverage/default/34.otp_ctrl_init_fail.4123314979 |
|
|
Mar 05 02:48:49 PM PST 24 |
Mar 05 02:48:54 PM PST 24 |
195154695 ps |
| T1126 |
/workspace/coverage/default/41.otp_ctrl_stress_all_with_rand_reset.3930988506 |
|
|
Mar 05 02:49:20 PM PST 24 |
Mar 05 03:54:36 PM PST 24 |
865851668247 ps |
| T127 |
/workspace/coverage/default/40.otp_ctrl_stress_all.793102361 |
|
|
Mar 05 02:49:14 PM PST 24 |
Mar 05 02:52:29 PM PST 24 |
12588865110 ps |
| T1127 |
/workspace/coverage/default/126.otp_ctrl_parallel_lc_esc.2244160456 |
|
|
Mar 05 02:50:24 PM PST 24 |
Mar 05 02:50:30 PM PST 24 |
185993509 ps |
| T145 |
/workspace/coverage/default/123.otp_ctrl_parallel_lc_esc.628668619 |
|
|
Mar 05 02:50:22 PM PST 24 |
Mar 05 02:50:27 PM PST 24 |
116953450 ps |
| T1128 |
/workspace/coverage/default/26.otp_ctrl_dai_lock.3614134874 |
|
|
Mar 05 02:48:22 PM PST 24 |
Mar 05 02:48:43 PM PST 24 |
634074988 ps |
| T1129 |
/workspace/coverage/default/44.otp_ctrl_dai_lock.268744002 |
|
|
Mar 05 02:49:19 PM PST 24 |
Mar 05 02:49:35 PM PST 24 |
7270852844 ps |
| T1130 |
/workspace/coverage/default/90.otp_ctrl_stress_all_with_rand_reset.3917119194 |
|
|
Mar 05 02:50:09 PM PST 24 |
Mar 05 03:56:27 PM PST 24 |
426851088357 ps |
| T1131 |
/workspace/coverage/default/255.otp_ctrl_init_fail.2473708781 |
|
|
Mar 05 02:51:07 PM PST 24 |
Mar 05 02:51:11 PM PST 24 |
87426599 ps |
| T1132 |
/workspace/coverage/default/228.otp_ctrl_init_fail.3033563400 |
|
|
Mar 05 02:51:04 PM PST 24 |
Mar 05 02:51:09 PM PST 24 |
1844161360 ps |
| T1133 |
/workspace/coverage/default/3.otp_ctrl_alert_test.1324058636 |
|
|
Mar 05 02:46:47 PM PST 24 |
Mar 05 02:46:49 PM PST 24 |
632243447 ps |
| T1134 |
/workspace/coverage/default/270.otp_ctrl_init_fail.191990634 |
|
|
Mar 05 02:51:14 PM PST 24 |
Mar 05 02:51:18 PM PST 24 |
133073954 ps |
| T1135 |
/workspace/coverage/default/57.otp_ctrl_parallel_lc_esc.1218050826 |
|
|
Mar 05 02:49:46 PM PST 24 |
Mar 05 02:49:52 PM PST 24 |
452368217 ps |
| T1136 |
/workspace/coverage/default/18.otp_ctrl_dai_errs.2858103425 |
|
|
Mar 05 02:47:52 PM PST 24 |
Mar 05 02:48:18 PM PST 24 |
1093261525 ps |
| T1137 |
/workspace/coverage/default/42.otp_ctrl_test_access.20792729 |
|
|
Mar 05 02:49:20 PM PST 24 |
Mar 05 02:49:32 PM PST 24 |
3262440078 ps |
| T1138 |
/workspace/coverage/default/130.otp_ctrl_parallel_lc_esc.2685918605 |
|
|
Mar 05 02:50:31 PM PST 24 |
Mar 05 02:50:35 PM PST 24 |
173997442 ps |
| T1139 |
/workspace/coverage/default/85.otp_ctrl_parallel_lc_esc.2054005166 |
|
|
Mar 05 02:49:59 PM PST 24 |
Mar 05 02:50:13 PM PST 24 |
354877084 ps |
| T1140 |
/workspace/coverage/default/156.otp_ctrl_init_fail.2429416116 |
|
|
Mar 05 02:50:38 PM PST 24 |
Mar 05 02:50:43 PM PST 24 |
541711042 ps |
| T1141 |
/workspace/coverage/default/32.otp_ctrl_regwen.2917904959 |
|
|
Mar 05 02:48:40 PM PST 24 |
Mar 05 02:48:49 PM PST 24 |
606366003 ps |
| T1142 |
/workspace/coverage/default/22.otp_ctrl_parallel_key_req.1828939632 |
|
|
Mar 05 02:48:02 PM PST 24 |
Mar 05 02:48:24 PM PST 24 |
6769386311 ps |
| T1143 |
/workspace/coverage/default/280.otp_ctrl_init_fail.2950535467 |
|
|
Mar 05 02:51:11 PM PST 24 |
Mar 05 02:51:15 PM PST 24 |
101185925 ps |
| T1144 |
/workspace/coverage/default/25.otp_ctrl_stress_all.2256786129 |
|
|
Mar 05 02:48:22 PM PST 24 |
Mar 05 02:50:20 PM PST 24 |
3281072203 ps |
| T1145 |
/workspace/coverage/default/27.otp_ctrl_dai_errs.2531462948 |
|
|
Mar 05 02:48:24 PM PST 24 |
Mar 05 02:49:04 PM PST 24 |
1401428457 ps |
| T1146 |
/workspace/coverage/default/36.otp_ctrl_macro_errs.1309842492 |
|
|
Mar 05 02:48:56 PM PST 24 |
Mar 05 02:49:32 PM PST 24 |
2508519446 ps |
| T1147 |
/workspace/coverage/default/9.otp_ctrl_stress_all.2787340559 |
|
|
Mar 05 02:47:18 PM PST 24 |
Mar 05 02:51:55 PM PST 24 |
16147309781 ps |
| T1148 |
/workspace/coverage/default/18.otp_ctrl_check_fail.1884593578 |
|
|
Mar 05 02:47:48 PM PST 24 |
Mar 05 02:48:16 PM PST 24 |
9178812017 ps |
| T1149 |
/workspace/coverage/default/34.otp_ctrl_macro_errs.1435584636 |
|
|
Mar 05 02:48:49 PM PST 24 |
Mar 05 02:49:06 PM PST 24 |
1031813951 ps |
| T1150 |
/workspace/coverage/default/18.otp_ctrl_macro_errs.1015382456 |
|
|
Mar 05 02:47:51 PM PST 24 |
Mar 05 02:48:11 PM PST 24 |
12405080063 ps |
| T1151 |
/workspace/coverage/default/207.otp_ctrl_init_fail.155949836 |
|
|
Mar 05 02:50:58 PM PST 24 |
Mar 05 02:51:03 PM PST 24 |
2086629752 ps |
| T1152 |
/workspace/coverage/default/9.otp_ctrl_parallel_lc_esc.1807888801 |
|
|
Mar 05 02:47:13 PM PST 24 |
Mar 05 02:47:22 PM PST 24 |
356824163 ps |
| T1153 |
/workspace/coverage/default/5.otp_ctrl_stress_all.1279377450 |
|
|
Mar 05 02:46:54 PM PST 24 |
Mar 05 02:47:52 PM PST 24 |
28501932536 ps |
| T1154 |
/workspace/coverage/default/16.otp_ctrl_test_access.2886583829 |
|
|
Mar 05 02:47:49 PM PST 24 |
Mar 05 02:48:12 PM PST 24 |
1090891194 ps |
| T1155 |
/workspace/coverage/default/15.otp_ctrl_dai_errs.3711402756 |
|
|
Mar 05 02:47:41 PM PST 24 |
Mar 05 02:47:59 PM PST 24 |
1314744656 ps |
| T1156 |
/workspace/coverage/default/42.otp_ctrl_parallel_lc_esc.599874892 |
|
|
Mar 05 02:49:11 PM PST 24 |
Mar 05 02:49:16 PM PST 24 |
159055446 ps |
| T1157 |
/workspace/coverage/cover_reg_top/0.otp_ctrl_tl_errors.2956184565 |
|
|
Mar 05 01:16:56 PM PST 24 |
Mar 05 01:17:00 PM PST 24 |
203558375 ps |
| T250 |
/workspace/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.4022564330 |
|
|
Mar 05 01:17:07 PM PST 24 |
Mar 05 01:17:11 PM PST 24 |
1929107561 ps |
| T1158 |
/workspace/coverage/cover_reg_top/48.otp_ctrl_intr_test.3632705209 |
|
|
Mar 05 01:17:20 PM PST 24 |
Mar 05 01:17:21 PM PST 24 |
54221568 ps |
| T249 |
/workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.2766060884 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:17:00 PM PST 24 |
1283074069 ps |
| T1159 |
/workspace/coverage/cover_reg_top/9.otp_ctrl_intr_test.2964772286 |
|
|
Mar 05 01:17:03 PM PST 24 |
Mar 05 01:17:05 PM PST 24 |
142400147 ps |
| T1160 |
/workspace/coverage/cover_reg_top/35.otp_ctrl_intr_test.800428893 |
|
|
Mar 05 01:17:16 PM PST 24 |
Mar 05 01:17:17 PM PST 24 |
38853713 ps |
| T247 |
/workspace/coverage/cover_reg_top/8.otp_ctrl_csr_rw.2733566514 |
|
|
Mar 05 01:17:04 PM PST 24 |
Mar 05 01:17:06 PM PST 24 |
544311660 ps |
| T248 |
/workspace/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.3314181695 |
|
|
Mar 05 01:16:55 PM PST 24 |
Mar 05 01:17:02 PM PST 24 |
210662805 ps |
| T1161 |
/workspace/coverage/cover_reg_top/14.otp_ctrl_tl_errors.2391430525 |
|
|
Mar 05 01:17:10 PM PST 24 |
Mar 05 01:17:13 PM PST 24 |
59618716 ps |
| T244 |
/workspace/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.3130194267 |
|
|
Mar 05 01:17:08 PM PST 24 |
Mar 05 01:17:18 PM PST 24 |
628138286 ps |
| T274 |
/workspace/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.25481931 |
|
|
Mar 05 01:16:55 PM PST 24 |
Mar 05 01:17:06 PM PST 24 |
510586671 ps |
| T1162 |
/workspace/coverage/cover_reg_top/41.otp_ctrl_intr_test.3193786664 |
|
|
Mar 05 01:17:17 PM PST 24 |
Mar 05 01:17:19 PM PST 24 |
43693859 ps |
| T1163 |
/workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.2549927643 |
|
|
Mar 05 01:17:20 PM PST 24 |
Mar 05 01:17:21 PM PST 24 |
45018440 ps |
| T245 |
/workspace/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.1961845786 |
|
|
Mar 05 01:17:09 PM PST 24 |
Mar 05 01:17:22 PM PST 24 |
9812224561 ps |
| T1164 |
/workspace/coverage/cover_reg_top/8.otp_ctrl_intr_test.361691144 |
|
|
Mar 05 01:17:05 PM PST 24 |
Mar 05 01:17:07 PM PST 24 |
141344620 ps |
| T246 |
/workspace/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.2813352517 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:17:09 PM PST 24 |
1300595119 ps |
| T296 |
/workspace/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.237626941 |
|
|
Mar 05 01:17:07 PM PST 24 |
Mar 05 01:17:11 PM PST 24 |
135759451 ps |
| T1165 |
/workspace/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.3594788613 |
|
|
Mar 05 01:17:13 PM PST 24 |
Mar 05 01:17:17 PM PST 24 |
1572243967 ps |
| T275 |
/workspace/coverage/cover_reg_top/11.otp_ctrl_csr_rw.2959787630 |
|
|
Mar 05 01:17:05 PM PST 24 |
Mar 05 01:17:07 PM PST 24 |
58047543 ps |
| T1166 |
/workspace/coverage/cover_reg_top/10.otp_ctrl_tl_errors.3980677693 |
|
|
Mar 05 01:17:12 PM PST 24 |
Mar 05 01:17:17 PM PST 24 |
1429011346 ps |
| T276 |
/workspace/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.1967196890 |
|
|
Mar 05 01:16:55 PM PST 24 |
Mar 05 01:16:57 PM PST 24 |
65290120 ps |
| T1167 |
/workspace/coverage/cover_reg_top/19.otp_ctrl_tl_errors.4238573161 |
|
|
Mar 05 01:17:13 PM PST 24 |
Mar 05 01:17:19 PM PST 24 |
298468516 ps |
| T277 |
/workspace/coverage/cover_reg_top/13.otp_ctrl_csr_rw.1907285775 |
|
|
Mar 05 01:17:08 PM PST 24 |
Mar 05 01:17:10 PM PST 24 |
62743101 ps |
| T1168 |
/workspace/coverage/cover_reg_top/32.otp_ctrl_intr_test.4236809843 |
|
|
Mar 05 01:17:16 PM PST 24 |
Mar 05 01:17:17 PM PST 24 |
41142967 ps |
| T1169 |
/workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.1250437562 |
|
|
Mar 05 01:17:20 PM PST 24 |
Mar 05 01:17:22 PM PST 24 |
64944124 ps |
| T1170 |
/workspace/coverage/cover_reg_top/17.otp_ctrl_tl_errors.331238370 |
|
|
Mar 05 01:17:06 PM PST 24 |
Mar 05 01:17:10 PM PST 24 |
256318524 ps |
| T1171 |
/workspace/coverage/cover_reg_top/8.otp_ctrl_tl_errors.1049185235 |
|
|
Mar 05 01:17:12 PM PST 24 |
Mar 05 01:17:17 PM PST 24 |
295427563 ps |
| T1172 |
/workspace/coverage/cover_reg_top/11.otp_ctrl_intr_test.3165320260 |
|
|
Mar 05 01:17:07 PM PST 24 |
Mar 05 01:17:09 PM PST 24 |
154296869 ps |
| T278 |
/workspace/coverage/cover_reg_top/12.otp_ctrl_csr_rw.1844873051 |
|
|
Mar 05 01:17:05 PM PST 24 |
Mar 05 01:17:07 PM PST 24 |
47828004 ps |
| T297 |
/workspace/coverage/cover_reg_top/19.otp_ctrl_csr_rw.2955924904 |
|
|
Mar 05 01:17:13 PM PST 24 |
Mar 05 01:17:14 PM PST 24 |
144213344 ps |
| T1173 |
/workspace/coverage/cover_reg_top/4.otp_ctrl_mem_walk.876246261 |
|
|
Mar 05 01:16:59 PM PST 24 |
Mar 05 01:17:01 PM PST 24 |
82278607 ps |
| T331 |
/workspace/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.1946994981 |
|
|
Mar 05 01:17:11 PM PST 24 |
Mar 05 01:17:24 PM PST 24 |
1292394518 ps |
| T279 |
/workspace/coverage/cover_reg_top/9.otp_ctrl_csr_rw.3141045592 |
|
|
Mar 05 01:17:05 PM PST 24 |
Mar 05 01:17:07 PM PST 24 |
116312961 ps |
| T1174 |
/workspace/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.3689541418 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:17:03 PM PST 24 |
305063140 ps |
| T1175 |
/workspace/coverage/cover_reg_top/16.otp_ctrl_tl_errors.3034559340 |
|
|
Mar 05 01:17:11 PM PST 24 |
Mar 05 01:17:19 PM PST 24 |
181987258 ps |
| T298 |
/workspace/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.4150353520 |
|
|
Mar 05 01:17:03 PM PST 24 |
Mar 05 01:17:09 PM PST 24 |
2181242662 ps |
| T1176 |
/workspace/coverage/cover_reg_top/29.otp_ctrl_intr_test.2679534002 |
|
|
Mar 05 01:17:14 PM PST 24 |
Mar 05 01:17:16 PM PST 24 |
125899527 ps |
| T1177 |
/workspace/coverage/cover_reg_top/2.otp_ctrl_mem_walk.2280994492 |
|
|
Mar 05 01:16:54 PM PST 24 |
Mar 05 01:16:56 PM PST 24 |
543099426 ps |
| T299 |
/workspace/coverage/cover_reg_top/1.otp_ctrl_csr_rw.1514813805 |
|
|
Mar 05 01:17:02 PM PST 24 |
Mar 05 01:17:04 PM PST 24 |
148659474 ps |
| T1178 |
/workspace/coverage/cover_reg_top/23.otp_ctrl_intr_test.822776490 |
|
|
Mar 05 01:17:11 PM PST 24 |
Mar 05 01:17:13 PM PST 24 |
42062763 ps |
| T1179 |
/workspace/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.3556400120 |
|
|
Mar 05 01:17:04 PM PST 24 |
Mar 05 01:17:07 PM PST 24 |
197754694 ps |
| T1180 |
/workspace/coverage/cover_reg_top/47.otp_ctrl_intr_test.3602826663 |
|
|
Mar 05 01:17:17 PM PST 24 |
Mar 05 01:17:18 PM PST 24 |
67265621 ps |
| T1181 |
/workspace/coverage/cover_reg_top/45.otp_ctrl_intr_test.1551518156 |
|
|
Mar 05 01:17:17 PM PST 24 |
Mar 05 01:17:19 PM PST 24 |
41160170 ps |
| T1182 |
/workspace/coverage/cover_reg_top/40.otp_ctrl_intr_test.689866066 |
|
|
Mar 05 01:17:27 PM PST 24 |
Mar 05 01:17:29 PM PST 24 |
74210876 ps |
| T1183 |
/workspace/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.653132197 |
|
|
Mar 05 01:16:53 PM PST 24 |
Mar 05 01:16:57 PM PST 24 |
103631914 ps |
| T1184 |
/workspace/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.4279048085 |
|
|
Mar 05 01:16:56 PM PST 24 |
Mar 05 01:17:00 PM PST 24 |
81594644 ps |
| T1185 |
/workspace/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.1275460401 |
|
|
Mar 05 01:17:08 PM PST 24 |
Mar 05 01:17:13 PM PST 24 |
2186032560 ps |
| T1186 |
/workspace/coverage/cover_reg_top/17.otp_ctrl_intr_test.74891140 |
|
|
Mar 05 01:17:11 PM PST 24 |
Mar 05 01:17:12 PM PST 24 |
69896757 ps |
| T1187 |
/workspace/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.163814662 |
|
|
Mar 05 01:16:58 PM PST 24 |
Mar 05 01:17:00 PM PST 24 |
50656738 ps |
| T280 |
/workspace/coverage/cover_reg_top/6.otp_ctrl_csr_rw.2963444034 |
|
|
Mar 05 01:16:58 PM PST 24 |
Mar 05 01:17:00 PM PST 24 |
64698379 ps |
| T1188 |
/workspace/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.1057404969 |
|
|
Mar 05 01:17:02 PM PST 24 |
Mar 05 01:17:04 PM PST 24 |
126214634 ps |
| T1189 |
/workspace/coverage/cover_reg_top/2.otp_ctrl_tl_errors.3549382748 |
|
|
Mar 05 01:16:54 PM PST 24 |
Mar 05 01:17:01 PM PST 24 |
174460308 ps |
| T1190 |
/workspace/coverage/cover_reg_top/15.otp_ctrl_csr_rw.177075629 |
|
|
Mar 05 01:17:08 PM PST 24 |
Mar 05 01:17:10 PM PST 24 |
50473802 ps |
| T1191 |
/workspace/coverage/cover_reg_top/18.otp_ctrl_csr_rw.3835100460 |
|
|
Mar 05 01:17:09 PM PST 24 |
Mar 05 01:17:10 PM PST 24 |
141970978 ps |
| T338 |
/workspace/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.1271617364 |
|
|
Mar 05 01:17:10 PM PST 24 |
Mar 05 01:17:29 PM PST 24 |
4134360145 ps |
| T1192 |
/workspace/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.916660157 |
|
|
Mar 05 01:16:55 PM PST 24 |
Mar 05 01:16:57 PM PST 24 |
66658006 ps |
| T1193 |
/workspace/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.4269055939 |
|
|
Mar 05 01:17:13 PM PST 24 |
Mar 05 01:17:16 PM PST 24 |
827641944 ps |
| T1194 |
/workspace/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.3521032255 |
|
|
Mar 05 01:17:11 PM PST 24 |
Mar 05 01:17:15 PM PST 24 |
1606881146 ps |
| T281 |
/workspace/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.2729985251 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:17:02 PM PST 24 |
286403907 ps |
| T1195 |
/workspace/coverage/cover_reg_top/43.otp_ctrl_intr_test.274300255 |
|
|
Mar 05 01:17:21 PM PST 24 |
Mar 05 01:17:23 PM PST 24 |
39503892 ps |
| T1196 |
/workspace/coverage/cover_reg_top/16.otp_ctrl_intr_test.770835271 |
|
|
Mar 05 01:17:08 PM PST 24 |
Mar 05 01:17:10 PM PST 24 |
40416926 ps |
| T1197 |
/workspace/coverage/cover_reg_top/22.otp_ctrl_intr_test.1072226006 |
|
|
Mar 05 01:17:12 PM PST 24 |
Mar 05 01:17:14 PM PST 24 |
77175159 ps |
| T282 |
/workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.575321863 |
|
|
Mar 05 01:16:58 PM PST 24 |
Mar 05 01:17:00 PM PST 24 |
40364392 ps |
| T1198 |
/workspace/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.2204803860 |
|
|
Mar 05 01:16:58 PM PST 24 |
Mar 05 01:17:01 PM PST 24 |
58733471 ps |
| T1199 |
/workspace/coverage/cover_reg_top/15.otp_ctrl_tl_errors.2189255969 |
|
|
Mar 05 01:17:13 PM PST 24 |
Mar 05 01:17:18 PM PST 24 |
104952910 ps |
| T1200 |
/workspace/coverage/cover_reg_top/3.otp_ctrl_tl_errors.1010936426 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:17:03 PM PST 24 |
302613348 ps |
| T1201 |
/workspace/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.2806708121 |
|
|
Mar 05 01:16:56 PM PST 24 |
Mar 05 01:16:59 PM PST 24 |
98791132 ps |
| T1202 |
/workspace/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.3041045544 |
|
|
Mar 05 01:17:09 PM PST 24 |
Mar 05 01:17:12 PM PST 24 |
75091452 ps |
| T252 |
/workspace/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.976824701 |
|
|
Mar 05 01:17:13 PM PST 24 |
Mar 05 01:17:35 PM PST 24 |
1614198107 ps |
| T341 |
/workspace/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.1959687884 |
|
|
Mar 05 01:16:59 PM PST 24 |
Mar 05 01:17:18 PM PST 24 |
1554791657 ps |
| T1203 |
/workspace/coverage/cover_reg_top/18.otp_ctrl_intr_test.1718287045 |
|
|
Mar 05 01:17:13 PM PST 24 |
Mar 05 01:17:14 PM PST 24 |
39684995 ps |
| T1204 |
/workspace/coverage/cover_reg_top/14.otp_ctrl_csr_rw.2755906748 |
|
|
Mar 05 01:17:10 PM PST 24 |
Mar 05 01:17:12 PM PST 24 |
669245516 ps |
| T1205 |
/workspace/coverage/cover_reg_top/7.otp_ctrl_tl_errors.3252217938 |
|
|
Mar 05 01:17:10 PM PST 24 |
Mar 05 01:17:16 PM PST 24 |
169286165 ps |
| T1206 |
/workspace/coverage/cover_reg_top/31.otp_ctrl_intr_test.2324222661 |
|
|
Mar 05 01:17:19 PM PST 24 |
Mar 05 01:17:21 PM PST 24 |
552651962 ps |
| T1207 |
/workspace/coverage/cover_reg_top/5.otp_ctrl_tl_errors.3859212633 |
|
|
Mar 05 01:16:58 PM PST 24 |
Mar 05 01:17:06 PM PST 24 |
633635586 ps |
| T339 |
/workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.3054967853 |
|
|
Mar 05 01:17:09 PM PST 24 |
Mar 05 01:17:34 PM PST 24 |
2051391787 ps |
| T1208 |
/workspace/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.423484806 |
|
|
Mar 05 01:17:07 PM PST 24 |
Mar 05 01:17:10 PM PST 24 |
121391461 ps |
| T1209 |
/workspace/coverage/cover_reg_top/19.otp_ctrl_intr_test.414050342 |
|
|
Mar 05 01:17:10 PM PST 24 |
Mar 05 01:17:12 PM PST 24 |
139214709 ps |
| T340 |
/workspace/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.900525656 |
|
|
Mar 05 01:17:11 PM PST 24 |
Mar 05 01:17:21 PM PST 24 |
673298965 ps |
| T1210 |
/workspace/coverage/cover_reg_top/36.otp_ctrl_intr_test.2529487023 |
|
|
Mar 05 01:17:08 PM PST 24 |
Mar 05 01:17:09 PM PST 24 |
68737377 ps |
| T1211 |
/workspace/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.4039400020 |
|
|
Mar 05 01:17:07 PM PST 24 |
Mar 05 01:17:09 PM PST 24 |
645257437 ps |
| T1212 |
/workspace/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.3344758895 |
|
|
Mar 05 01:16:55 PM PST 24 |
Mar 05 01:16:57 PM PST 24 |
364243744 ps |
| T1213 |
/workspace/coverage/cover_reg_top/9.otp_ctrl_tl_errors.1252272410 |
|
|
Mar 05 01:17:05 PM PST 24 |
Mar 05 01:17:11 PM PST 24 |
282176075 ps |
| T1214 |
/workspace/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.788522212 |
|
|
Mar 05 01:17:05 PM PST 24 |
Mar 05 01:17:09 PM PST 24 |
399439738 ps |
| T1215 |
/workspace/coverage/cover_reg_top/25.otp_ctrl_intr_test.866133155 |
|
|
Mar 05 01:17:10 PM PST 24 |
Mar 05 01:17:12 PM PST 24 |
153920283 ps |
| T270 |
/workspace/coverage/cover_reg_top/16.otp_ctrl_csr_rw.2231990863 |
|
|
Mar 05 01:17:09 PM PST 24 |
Mar 05 01:17:11 PM PST 24 |
145502614 ps |
| T251 |
/workspace/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.1862415521 |
|
|
Mar 05 01:17:05 PM PST 24 |
Mar 05 01:17:21 PM PST 24 |
9726359554 ps |
| T1216 |
/workspace/coverage/cover_reg_top/4.otp_ctrl_tl_errors.267707442 |
|
|
Mar 05 01:16:59 PM PST 24 |
Mar 05 01:17:04 PM PST 24 |
927628607 ps |
| T1217 |
/workspace/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.3916346510 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:17:04 PM PST 24 |
126078547 ps |
| T1218 |
/workspace/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.3380594718 |
|
|
Mar 05 01:17:11 PM PST 24 |
Mar 05 01:17:13 PM PST 24 |
254675984 ps |
| T1219 |
/workspace/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.3774777442 |
|
|
Mar 05 01:17:06 PM PST 24 |
Mar 05 01:17:19 PM PST 24 |
9754579824 ps |
| T1220 |
/workspace/coverage/cover_reg_top/33.otp_ctrl_intr_test.278528092 |
|
|
Mar 05 01:17:13 PM PST 24 |
Mar 05 01:17:14 PM PST 24 |
94525202 ps |
| T1221 |
/workspace/coverage/cover_reg_top/15.otp_ctrl_intr_test.414150888 |
|
|
Mar 05 01:17:12 PM PST 24 |
Mar 05 01:17:13 PM PST 24 |
129434737 ps |
| T1222 |
/workspace/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.3373667060 |
|
|
Mar 05 01:16:56 PM PST 24 |
Mar 05 01:16:57 PM PST 24 |
142520219 ps |
| T1223 |
/workspace/coverage/cover_reg_top/34.otp_ctrl_intr_test.3561192000 |
|
|
Mar 05 01:17:08 PM PST 24 |
Mar 05 01:17:10 PM PST 24 |
38469967 ps |
| T1224 |
/workspace/coverage/cover_reg_top/0.otp_ctrl_csr_rw.3219169683 |
|
|
Mar 05 01:16:53 PM PST 24 |
Mar 05 01:16:55 PM PST 24 |
165951089 ps |
| T1225 |
/workspace/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.539263280 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:17:00 PM PST 24 |
420712674 ps |
| T1226 |
/workspace/coverage/cover_reg_top/30.otp_ctrl_intr_test.3771352979 |
|
|
Mar 05 01:17:11 PM PST 24 |
Mar 05 01:17:13 PM PST 24 |
70356895 ps |
| T1227 |
/workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.1249834577 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:16:58 PM PST 24 |
69487630 ps |
| T336 |
/workspace/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.2548057361 |
|
|
Mar 05 01:17:02 PM PST 24 |
Mar 05 01:17:21 PM PST 24 |
1217004859 ps |
| T1228 |
/workspace/coverage/cover_reg_top/1.otp_ctrl_tl_errors.989138183 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:17:01 PM PST 24 |
96334760 ps |
| T283 |
/workspace/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.3964013834 |
|
|
Mar 05 01:16:58 PM PST 24 |
Mar 05 01:17:01 PM PST 24 |
375436756 ps |
| T1229 |
/workspace/coverage/cover_reg_top/6.otp_ctrl_tl_errors.165203073 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:17:02 PM PST 24 |
218194259 ps |
| T1230 |
/workspace/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.730048748 |
|
|
Mar 05 01:16:59 PM PST 24 |
Mar 05 01:17:00 PM PST 24 |
145595254 ps |
| T334 |
/workspace/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.3941307467 |
|
|
Mar 05 01:17:11 PM PST 24 |
Mar 05 01:17:35 PM PST 24 |
5048428064 ps |
| T1231 |
/workspace/coverage/cover_reg_top/37.otp_ctrl_intr_test.3291963581 |
|
|
Mar 05 01:17:20 PM PST 24 |
Mar 05 01:17:21 PM PST 24 |
43022813 ps |
| T1232 |
/workspace/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.1713328331 |
|
|
Mar 05 01:16:56 PM PST 24 |
Mar 05 01:17:07 PM PST 24 |
1395083811 ps |
| T1233 |
/workspace/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.594547563 |
|
|
Mar 05 01:17:11 PM PST 24 |
Mar 05 01:17:14 PM PST 24 |
260061019 ps |
| T1234 |
/workspace/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.1600088609 |
|
|
Mar 05 01:17:12 PM PST 24 |
Mar 05 01:17:15 PM PST 24 |
1022871071 ps |
| T1235 |
/workspace/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.1470190533 |
|
|
Mar 05 01:17:08 PM PST 24 |
Mar 05 01:17:11 PM PST 24 |
108118688 ps |
| T1236 |
/workspace/coverage/cover_reg_top/7.otp_ctrl_intr_test.2261738554 |
|
|
Mar 05 01:17:08 PM PST 24 |
Mar 05 01:17:10 PM PST 24 |
622912928 ps |
| T1237 |
/workspace/coverage/cover_reg_top/12.otp_ctrl_tl_errors.771967335 |
|
|
Mar 05 01:17:07 PM PST 24 |
Mar 05 01:17:11 PM PST 24 |
103868784 ps |
| T1238 |
/workspace/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.2229909130 |
|
|
Mar 05 01:16:52 PM PST 24 |
Mar 05 01:16:54 PM PST 24 |
37077553 ps |
| T1239 |
/workspace/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.3096160687 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:17:03 PM PST 24 |
501952717 ps |
| T1240 |
/workspace/coverage/cover_reg_top/14.otp_ctrl_intr_test.2753735695 |
|
|
Mar 05 01:17:12 PM PST 24 |
Mar 05 01:17:14 PM PST 24 |
39529637 ps |
| T1241 |
/workspace/coverage/cover_reg_top/0.otp_ctrl_intr_test.3827362864 |
|
|
Mar 05 01:16:55 PM PST 24 |
Mar 05 01:16:57 PM PST 24 |
40988340 ps |
| T1242 |
/workspace/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.1323509013 |
|
|
Mar 05 01:16:56 PM PST 24 |
Mar 05 01:17:07 PM PST 24 |
1226605581 ps |
| T1243 |
/workspace/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.913490452 |
|
|
Mar 05 01:16:57 PM PST 24 |
Mar 05 01:17:07 PM PST 24 |
2665459795 ps |
| T1244 |
/workspace/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.3283288562 |
|
|
Mar 05 01:16:58 PM PST 24 |
Mar 05 01:17:01 PM PST 24 |
88590114 ps |
| T1245 |
/workspace/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.662881674 |
|
|
Mar 05 01:16:59 PM PST 24 |
Mar 05 01:17:02 PM PST 24 |
86706711 ps |
| T1246 |
/workspace/coverage/cover_reg_top/38.otp_ctrl_intr_test.3327192530 |
|
|
Mar 05 01:17:18 PM PST 24 |
Mar 05 01:17:19 PM PST 24 |
76149794 ps |
| T271 |
/workspace/coverage/cover_reg_top/2.otp_ctrl_csr_rw.2294998092 |
|
|
Mar 05 01:16:56 PM PST 24 |
Mar 05 01:16:58 PM PST 24 |
52616578 ps |
| T1247 |
/workspace/coverage/cover_reg_top/2.otp_ctrl_intr_test.3395992323 |
|
|
Mar 05 01:16:56 PM PST 24 |
Mar 05 01:16:58 PM PST 24 |
518916309 ps |
| T1248 |
/workspace/coverage/cover_reg_top/10.otp_ctrl_csr_rw.478140490 |
|
|
Mar 05 01:17:06 PM PST 24 |
Mar 05 01:17:09 PM PST 24 |
598937009 ps |
| T284 |
/workspace/coverage/cover_reg_top/7.otp_ctrl_csr_rw.4222515602 |
|
|
Mar 05 01:17:07 PM PST 24 |
Mar 05 01:17:08 PM PST 24 |
94476611 ps |
| T1249 |
/workspace/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.1774059246 |
|
|
Mar 05 01:17:08 PM PST 24 |
Mar 05 01:17:10 PM PST 24 |
254196138 ps |
| T1250 |
/workspace/coverage/cover_reg_top/3.otp_ctrl_mem_walk.1303468843 |
|
|
Mar 05 01:16:59 PM PST 24 |
Mar 05 01:17:00 PM PST 24 |
78455352 ps |
| T1251 |
/workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.3140753151 |
|
|
Mar 05 01:17:08 PM PST 24 |
Mar 05 01:17:11 PM PST 24 |
473223176 ps |
| T1252 |
/workspace/coverage/cover_reg_top/4.otp_ctrl_csr_rw.4286526437 |
|
|
Mar 05 01:17:02 PM PST 24 |
Mar 05 01:17:03 PM PST 24 |
113729853 ps |
| T1253 |
/workspace/coverage/cover_reg_top/13.otp_ctrl_intr_test.1297180127 |
|
|
Mar 05 01:17:11 PM PST 24 |
Mar 05 01:17:12 PM PST 24 |
40562663 ps |
| T1254 |
/workspace/coverage/cover_reg_top/12.otp_ctrl_intr_test.844846573 |
|
|
Mar 05 01:17:05 PM PST 24 |
Mar 05 01:17:07 PM PST 24 |
147415207 ps |
| T1255 |
/workspace/coverage/cover_reg_top/6.otp_ctrl_intr_test.1943016925 |
|
|
Mar 05 01:16:59 PM PST 24 |
Mar 05 01:17:01 PM PST 24 |
37473738 ps |