Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
84.44 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv



Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 18 1 17 94.44
Crosses 72 13 59 81.94


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 7 1 6 85.71 100 1 1 0
partition 11 0 11 100.00 100 1 1 0


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
dai_err_code_for_all_partitions 72 13 59 81.94 100 1 1 0


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 1 6 85.71


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 46617 1 T3 186 T5 333 T106 2
access_err 65322 1 T2 574 T3 62 T5 2
write_blank_err 454 1 T4 3 T12 6 T11 2
ecc_uncorr_err 68242 1 T4 317 T106 42 T12 737
ecc_corr_err 1360 1 T4 2 T106 5 T12 2
no_err 94916 1 T1 30 T2 1022 T3 172



Summary for Variable partition

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 11 0 11 100.00


User Defined Bins for partition

Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_idx 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
life_cycle 829 1 T4 4 T12 8 T11 7
secret2 24938 1 T1 9 T2 161 T3 219
secret1 29112 1 T1 4 T2 129 T3 26
secret0 35625 1 T2 169 T3 29 T5 4
hw_cfg1 36141 1 T1 1 T2 133 T3 16
hw_cfg0 28144 1 T1 2 T2 121 T3 19
rot_creator_auth_state 24367 1 T1 3 T2 135 T3 20
rot_creator_auth_codesign 22946 1 T2 222 T3 30 T5 1
owner_sw_cfg 20957 1 T1 2 T2 216 T3 25
creator_sw_cfg 22883 1 T1 9 T2 138 T3 15
vendor_test 30969 1 T2 172 T3 21 T5 2



Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
TOTAL 72 13 59 81.94 13
Automatically Generated Cross Bins 72 13 59 81.94 13
User Defined Cross Bins 0 0 0


Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins
err_code_valspartitionCOUNTAT LEASTNUMBERSTATUS
[fsm_err] [life_cycle] 0 1 1
[ecc_corr_err] [vendor_test] 0 1 1
[macro_err] [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] -- -- 10
[no_err] [life_cycle] 0 1 1


Covered bins
err_code_valspartitionCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err secret2 3083 1 T3 186 T192 28 T142 297
fsm_err secret1 3996 1 T164 153 T143 203 T269 422
fsm_err secret0 3798 1 T151 94 T153 57 T253 222
fsm_err hw_cfg1 3798 1 T13 412 T165 2 T149 69
fsm_err hw_cfg0 5508 1 T5 333 T106 2 T205 562
fsm_err rot_creator_auth_state 3470 1 T243 355 T94 8 T162 28
fsm_err rot_creator_auth_codesign 3818 1 T242 221 T339 78 T340 494
fsm_err owner_sw_cfg 2239 1 T165 2 T161 24 T162 18
fsm_err creator_sw_cfg 4246 1 T202 60 T42 135 T121 71
fsm_err vendor_test 12661 1 T12 29 T32 307 T56 107
access_err life_cycle 829 1 T4 4 T12 8 T11 7
access_err secret2 11045 1 T2 120 T3 24 T5 2
access_err secret1 6243 1 T7 2 T12 150 T11 5
access_err secret0 5202 1 T2 4 T3 1 T12 79
access_err hw_cfg1 1387 1 T2 2 T3 2 T8 2
access_err hw_cfg0 2267 1 T7 3 T12 40 T33 2
access_err rot_creator_auth_state 6119 1 T2 86 T3 6 T4 3
access_err rot_creator_auth_codesign 8491 1 T2 99 T3 15 T4 1
access_err owner_sw_cfg 7365 1 T2 92 T3 7 T4 4
access_err creator_sw_cfg 8372 1 T2 71 T3 1 T7 2
access_err vendor_test 8002 1 T2 100 T3 6 T7 3
write_blank_err secret2 12 1 T15 1 T341 1 T342 1
write_blank_err secret1 25 1 T164 1 T268 1 T343 1
write_blank_err secret0 48 1 T4 1 T12 1 T11 1
write_blank_err hw_cfg1 81 1 T4 1 T12 2 T13 1
write_blank_err hw_cfg0 21 1 T12 1 T327 1 T174 1
write_blank_err rot_creator_auth_state 148 1 T4 1 T11 1 T13 1
write_blank_err rot_creator_auth_codesign 56 1 T12 2 T13 3 T268 4
write_blank_err owner_sw_cfg 25 1 T344 2 T343 1 T130 2
write_blank_err creator_sw_cfg 15 1 T270 1 T140 2 T130 1
write_blank_err vendor_test 23 1 T13 2 T247 1 T130 2
ecc_uncorr_err secret2 5356 1 T106 9 T165 6 T15 559
ecc_uncorr_err secret1 9194 1 T106 3 T164 313 T94 2
ecc_uncorr_err secret0 17572 1 T12 272 T11 563 T13 341
ecc_uncorr_err hw_cfg1 19562 1 T4 317 T12 465 T13 534
ecc_uncorr_err hw_cfg0 7202 1 T94 5 T345 34 T174 314
ecc_uncorr_err rot_creator_auth_state 5649 1 T165 3 T326 463 T161 35
ecc_uncorr_err rot_creator_auth_codesign 1002 1 T106 13 T165 16 T94 7
ecc_uncorr_err owner_sw_cfg 1374 1 T106 15 T165 8 T345 82
ecc_uncorr_err creator_sw_cfg 1331 1 T106 2 T94 7 T270 237
ecc_corr_err secret2 78 1 T165 2 T169 4 T212 2
ecc_corr_err secret1 153 1 T106 2 T56 1 T169 2
ecc_corr_err secret0 169 1 T4 2 T106 1 T169 7
ecc_corr_err hw_cfg1 231 1 T12 1 T56 2 T94 1
ecc_corr_err hw_cfg0 221 1 T12 1 T56 3 T94 1
ecc_corr_err rot_creator_auth_state 138 1 T56 1 T94 1 T212 3
ecc_corr_err rot_creator_auth_codesign 145 1 T106 1 T165 1 T56 2
ecc_corr_err owner_sw_cfg 107 1 T56 3 T94 3 T169 3
ecc_corr_err creator_sw_cfg 118 1 T106 1 T165 1 T56 3
no_err secret2 5364 1 T1 9 T2 41 T3 9
no_err secret1 9501 1 T1 4 T2 129 T3 26
no_err secret0 8836 1 T2 165 T3 28 T5 4
no_err hw_cfg1 11082 1 T1 1 T2 131 T3 14
no_err hw_cfg0 12925 1 T1 2 T2 121 T3 19
no_err rot_creator_auth_state 8843 1 T1 3 T2 49 T3 14
no_err rot_creator_auth_codesign 9434 1 T2 123 T3 15 T5 1
no_err owner_sw_cfg 9847 1 T1 2 T2 124 T3 18
no_err creator_sw_cfg 8801 1 T1 9 T2 67 T3 14
no_err vendor_test 10283 1 T2 72 T3 15 T5 2


User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins
NAMECOUNTSTATUS
vendor_test_ecc_uncorrectable_err 0 Illegal
life_cycle_ignore 0 Excluded

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