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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10189 1 T1 3 T2 1 T3 2
true 16618 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11093 1 T1 3 T2 1 T3 2
true 16682 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T94 2 T96 2 T71 2
others[1] 88 1 T34 2 T94 2 T71 2
others[2] 104 1 T19 2 T34 2 T95 2
others[3] 80 1 T96 4 T71 2 T380 4
others[4] 112 1 T65 2 T71 2 T380 2
others[5] 98 1 T34 6 T379 2 T213 2
others[6] 110 1 T65 2 T178 4 T179 2
others[7] 116 1 T34 6 T94 2 T95 2
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T19 2 T34 2 T65 2
others[1] 84 1 T34 4 T35 2 T94 2
others[2] 80 1 T65 4 T71 4 T121 2
others[3] 110 1 T65 2 T96 2 T71 2
others[4] 100 1 T5 2 T34 2 T65 8
others[5] 88 1 T19 2 T94 2 T65 2
others[6] 108 1 T5 2 T71 6 T103 2
others[7] 90 1 T19 2 T95 2 T53 2
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T34 2 T94 4 T98 2
others[1] 90 1 T19 2 T94 2 T95 2
others[2] 82 1 T34 2 T65 4 T90 2
others[3] 90 1 T65 6 T179 2 T381 2
others[4] 84 1 T34 8 T65 2 T71 2
others[5] 90 1 T94 2 T103 2 T98 2
others[6] 104 1 T34 2 T94 2 T65 2
others[7] 102 1 T34 2 T71 6 T98 2
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T71 2 T178 2 T382 2
others[1] 62 1 T34 2 T94 2 T71 4
others[2] 54 1 T34 6 T380 4 T250 2
others[3] 62 1 T34 2 T94 2 T53 2
others[4] 82 1 T20 2 T34 2 T90 2
others[5] 54 1 T34 2 T126 2 T65 2
others[6] 54 1 T34 2 T71 2 T90 2
others[7] 86 1 T34 2 T94 4 T65 2
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T34 4 T94 2 T95 2
others[1] 74 1 T34 2 T175 2 T250 2
others[2] 96 1 T20 2 T34 4 T94 4
others[3] 92 1 T65 2 T95 2 T71 2
others[4] 100 1 T94 2 T65 4 T89 2
others[5] 92 1 T94 4 T65 2 T71 2
others[6] 100 1 T34 8 T71 2 T97 2
others[7] 108 1 T34 4 T35 2 T94 2
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T35 2 T89 2 T348 2
others[1] 34 1 T34 4 T93 2 T175 2
others[2] 32 1 T250 2 T383 2 T384 2
others[3] 36 1 T5 2 T71 2 T178 2
others[4] 44 1 T94 2 T65 2 T348 2
others[5] 28 1 T65 2 T385 2 T348 2
others[6] 36 1 T35 2 T94 2 T175 2
others[7] 44 1 T5 2 T175 2 T250 2
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T34 4 T94 2 T65 4
others[1] 82 1 T34 6 T94 2 T65 2
others[2] 66 1 T5 2 T34 2 T65 2
others[3] 76 1 T34 4 T90 2 T175 2
others[4] 112 1 T65 2 T95 2 T71 2
others[5] 96 1 T34 2 T94 2 T65 2
others[6] 90 1 T34 2 T71 2 T175 2
others[7] 78 1 T95 2 T71 2 T250 2
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 116 1 T94 2 T65 4 T95 2
others[1] 88 1 T20 2 T34 2 T94 2
others[2] 84 1 T380 2 T250 4 T386 4
others[3] 86 1 T34 2 T94 2 T65 4
others[4] 80 1 T34 2 T94 2 T71 2
others[5] 90 1 T34 2 T94 2 T71 4
others[6] 96 1 T65 2 T89 2 T178 2
others[7] 86 1 T19 2 T94 4 T65 2
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T34 2 T124 2 T97 2
others[1] 70 1 T94 2 T95 2 T96 2
others[2] 92 1 T34 4 T96 4 T71 4
others[3] 116 1 T20 2 T71 2 T89 2
others[4] 76 1 T71 4 T53 2 T387 2
others[5] 78 1 T34 2 T65 2 T71 2
others[6] 94 1 T34 2 T94 2 T65 2
others[7] 100 1 T34 2 T94 2 T95 2
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T34 2 T175 2 T250 2
others[1] 108 1 T5 2 T34 2 T94 4
others[2] 92 1 T5 2 T65 6 T96 2
others[3] 88 1 T94 2 T65 2 T96 2
others[4] 98 1 T34 2 T94 2 T65 6
others[5] 90 1 T71 2 T90 2 T380 2
others[6] 80 1 T34 4 T96 2 T90 2
others[7] 104 1 T53 2 T250 4 T388 2
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T34 2 T94 2 T389 2
others[1] 90 1 T34 2 T71 2 T90 2
others[2] 86 1 T19 2 T34 2 T65 2
others[3] 118 1 T94 2 T71 2 T124 2
others[4] 56 1 T5 2 T19 2 T65 2
others[5] 68 1 T34 2 T65 2 T89 2
others[6] 72 1 T34 2 T65 2 T250 4
others[7] 90 1 T34 2 T65 2 T124 2
false 14184 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T4 3 T129 1 T390 1
others[1] 33 1 T385 2 T276 2 T243 1
others[2] 43 1 T129 1 T122 1 T276 3
others[3] 48 1 T126 2 T193 2 T250 2
others[4] 39 1 T65 2 T18 1 T124 2
others[5] 38 1 T18 1 T68 1 T387 2
others[6] 42 1 T130 1 T122 1 T276 1
others[7] 41 1 T4 1 T122 1 T209 2
false 14184 1 T1 4 T2 4 T3 4
true 2337 1 T1 1 T4 5 T5 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T65 2 T130 1 T250 2
others[1] 40 1 T4 1 T18 1 T129 1
others[2] 31 1 T18 1 T124 2 T122 1
others[3] 26 1 T129 1 T276 3 T131 2
others[4] 34 1 T130 1 T122 1 T276 2
others[5] 44 1 T4 1 T193 2 T130 1
others[6] 33 1 T387 2 T122 1 T385 2
others[7] 58 1 T4 2 T126 2 T68 1
false 11573 1 T1 3 T2 2 T3 2
true 18960 1 T1 5 T2 5 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 128 1 T90 2 T178 2 T380 2
others[1] 88 1 T94 2 T95 2 T380 2
others[2] 106 1 T34 6 T94 4 T65 2
others[3] 102 1 T95 2 T96 2 T71 2
others[4] 102 1 T34 4 T96 2 T71 2
others[5] 94 1 T19 2 T34 4 T96 2
others[6] 94 1 T65 2 T179 2 T250 2
others[7] 90 1 T34 2 T71 2 T250 2
false 7917 1 T1 3 T2 2 T3 2
true 16747 1 T1 5 T2 5 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T5 2 T19 2 T34 2
others[1] 110 1 T65 4 T96 2 T97 2
others[2] 106 1 T19 2 T34 2 T65 8
others[3] 66 1 T19 2 T71 2 T213 2
others[4] 76 1 T34 2 T71 4 T90 2
others[5] 88 1 T65 2 T71 2 T103 2
others[6] 94 1 T34 2 T35 2 T94 4
others[7] 120 1 T5 2 T65 2 T71 2
false 6951 1 T1 3 T2 1 T3 1
true 16490 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 112 1 T34 2 T71 4 T103 2
others[1] 84 1 T34 4 T65 6 T71 4
others[2] 90 1 T71 2 T90 2 T382 2
others[3] 86 1 T34 2 T94 2 T65 2
others[4] 74 1 T34 4 T94 2 T71 2
others[5] 98 1 T34 2 T94 2 T380 2
others[6] 86 1 T94 2 T65 2 T71 2
others[7] 104 1 T19 2 T34 2 T94 2
false 7420 1 T1 3 T2 1 T3 1
true 16517 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T130 1 T122 1 T276 1
others[1] 32 1 T130 2 T276 2 T77 2
others[2] 30 1 T4 1 T130 3 T209 1
others[3] 48 1 T130 2 T275 1 T276 2
others[4] 37 1 T209 1 T276 1 T332 1
others[5] 28 1 T4 2 T129 1 T130 1
others[6] 42 1 T12 1 T130 1 T209 1
others[7] 33 1 T129 1 T276 4 T291 2
false 11506 1 T1 3 T2 2 T3 2
true 18905 1 T1 5 T2 5 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 50 1 T65 2 T71 2 T90 2
others[1] 60 1 T34 4 T94 2 T391 2
others[2] 62 1 T34 4 T97 2 T388 2
others[3] 72 1 T34 6 T126 2 T94 2
others[4] 58 1 T34 2 T65 2 T95 2
others[5] 84 1 T71 4 T98 2 T90 2
others[6] 54 1 T34 2 T94 4 T90 2
others[7] 66 1 T20 2 T71 2 T53 2
false 8980 1 T1 3 T2 2 T3 2
true 16735 1 T1 5 T2 5 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 45 1 T65 2 T122 1 T209 1
others[1] 42 1 T129 1 T130 2 T122 1
others[2] 44 1 T53 2 T129 1 T380 2
others[3] 33 1 T209 1 T287 1 T77 2
others[4] 40 1 T34 2 T12 1 T18 1
others[5] 35 1 T65 2 T18 2 T68 1
others[6] 32 1 T71 2 T124 2 T129 1
others[7] 45 1 T4 2 T209 1 T243 1
false 11455 1 T1 3 T2 2 T3 2
true 18849 1 T1 5 T2 5 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T94 4 T71 2 T250 6
others[1] 106 1 T34 10 T65 2 T95 2
others[2] 102 1 T34 2 T95 2 T97 2
others[3] 90 1 T20 2 T34 4 T97 2
others[4] 80 1 T34 2 T94 2 T65 2
others[5] 92 1 T94 4 T65 2 T98 2
others[6] 68 1 T34 2 T35 2 T94 4
others[7] 116 1 T34 2 T65 4 T95 2
false 7821 1 T1 3 T2 2 T3 2
true 16670 1 T1 5 T2 5 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 42 1 T18 1 T68 1 T209 2
others[1] 29 1 T18 1 T122 1 T379 2
others[2] 29 1 T4 1 T34 2 T94 2
others[3] 38 1 T4 1 T129 1 T275 1
others[4] 46 1 T65 2 T18 1 T129 2
others[5] 37 1 T68 2 T178 2 T209 2
others[6] 37 1 T229 2 T103 2 T68 1
others[7] 32 1 T4 2 T94 2 T12 1
false 11411 1 T1 3 T2 2 T3 2
true 18811 1 T1 5 T2 5 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T94 2 T178 2 T383 4
others[1] 28 1 T348 2 T392 2 T219 2
others[2] 36 1 T5 2 T89 2 T175 2
others[3] 58 1 T35 2 T71 2 T175 2
others[4] 36 1 T5 2 T34 4 T386 2
others[5] 20 1 T65 2 T93 2 T384 2
others[6] 28 1 T94 2 T65 2 T293 2
others[7] 42 1 T35 2 T175 2 T250 4
false 10015 1 T1 3 T2 2 T3 2
true 16707 1 T1 5 T2 5 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T34 2 T95 2 T71 6
others[1] 88 1 T34 8 T65 2 T89 4
others[2] 76 1 T34 2 T71 4 T387 2
others[3] 102 1 T34 2 T71 2 T98 2
others[4] 82 1 T5 2 T34 2 T379 2
others[5] 90 1 T94 4 T65 2 T387 2
others[6] 86 1 T34 2 T65 6 T71 2
others[7] 82 1 T34 2 T94 2 T65 2
false 7189 1 T1 3 T2 1 T3 2
true 16498 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T94 2 T96 2 T384 2
others[1] 92 1 T34 2 T94 2 T65 4
others[2] 84 1 T20 2 T95 2 T178 2
others[3] 92 1 T65 2 T71 6 T380 2
others[4] 86 1 T175 2 T250 2 T341 2
others[5] 96 1 T19 2 T94 4 T175 2
others[6] 110 1 T34 4 T94 4 T65 6
others[7] 100 1 T34 2 T94 2 T65 4
false 7189 1 T1 3 T2 1 T3 2
true 16498 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T65 4 T96 2 T98 2
others[1] 78 1 T94 2 T71 2 T53 2
others[2] 110 1 T94 2 T71 6 T380 4
others[3] 58 1 T34 8 T53 2 T341 2
others[4] 72 1 T71 2 T387 2 T175 2
others[5] 92 1 T94 2 T95 4 T89 4
others[6] 98 1 T34 2 T96 4 T71 2
others[7] 98 1 T20 2 T34 2 T71 2
false 6499 1 T1 2 T2 1 T3 2
true 16484 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T34 4 T71 2 T387 2
others[1] 94 1 T34 2 T65 4 T96 2
others[2] 84 1 T34 2 T65 2 T71 2
others[3] 78 1 T65 4 T98 2 T192 2
others[4] 112 1 T94 2 T65 2 T96 4
others[5] 84 1 T94 4 T53 2 T380 2
others[6] 96 1 T5 2 T34 2 T65 2
others[7] 98 1 T5 2 T94 2 T65 2
false 6499 1 T1 2 T2 1 T3 2
true 16484 1 T1 5 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 54 1 T175 2 T379 4 T213 2
others[1] 48 1 T65 2 T103 2 T53 2
others[2] 82 1 T94 2 T65 2 T71 6
others[3] 58 1 T19 2 T94 2 T65 4
others[4] 86 1 T34 2 T95 2 T71 2
others[5] 68 1 T34 2 T94 2 T65 2
others[6] 52 1 T34 2 T94 4 T71 4
others[7] 78 1 T19 2 T34 2 T94 2
false 6938 1 T1 2 T2 1 T3 1
true 17878 1 T1 6 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 56 1 T71 2 T178 2 T250 2
others[1] 72 1 T34 2 T250 2 T213 2
others[2] 72 1 T71 2 T391 2 T383 2
others[3] 56 1 T94 4 T71 4 T175 2
others[4] 74 1 T103 2 T250 2 T386 2
others[5] 56 1 T94 4 T179 2 T393 4
others[6] 56 1 T94 2 T65 2 T71 4
others[7] 88 1 T19 2 T35 2 T65 2
false 6938 1 T1 2 T2 1 T3 1
true 17878 1 T1 6 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 31 1 T130 1 T122 1 T250 2
others[1] 29 1 T11 1 T130 1 T276 1
others[2] 42 1 T130 1 T122 1 T209 1
others[3] 43 1 T34 2 T18 1 T68 1
others[4] 31 1 T4 1 T124 2 T68 1
others[5] 45 1 T12 1 T65 2 T18 1
others[6] 31 1 T178 2 T122 1 T243 1
others[7] 48 1 T4 1 T97 2 T68 1
false 11639 1 T1 3 T2 2 T3 2
true 18997 1 T1 5 T2 5 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T19 2 T65 2 T213 2
others[1] 70 1 T34 2 T124 2 T89 2
others[2] 104 1 T34 2 T94 2 T65 2
others[3] 64 1 T386 2 T379 2 T383 2
others[4] 82 1 T34 2 T94 2 T90 2
others[5] 84 1 T34 4 T65 2 T71 2
others[6] 84 1 T5 2 T65 2 T71 2
others[7] 112 1 T19 2 T34 2 T65 2
false 7860 1 T1 3 T2 2 T3 2
true 16696 1 T1 5 T2 5 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 47 1 T4 1 T209 1 T276 2
others[1] 36 1 T129 1 T130 3 T276 1
others[2] 29 1 T129 1 T130 1 T276 3
others[3] 34 1 T130 1 T122 1 T209 2
others[4] 33 1 T130 1 T276 1 T332 1
others[5] 47 1 T12 1 T130 2 T209 1
others[6] 26 1 T4 1 T275 1 T394 1
others[7] 45 1 T4 1 T130 2 T276 2
false 14184 1 T1 4 T2 4 T3 4
true 2322 1 T4 5 T5 6 T7 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 22 1 T124 2 T129 1 T130 1
others[1] 39 1 T12 1 T18 1 T390 2
others[2] 47 1 T65 2 T71 2 T18 1
others[3] 38 1 T129 1 T130 1 T380 2
others[4] 41 1 T4 1 T287 1 T332 1
others[5] 34 1 T4 1 T97 2 T68 1
others[6] 41 1 T34 2 T18 1 T130 1
others[7] 54 1 T65 2 T53 2 T130 1
false 14184 1 T1 4 T2 4 T3 4
true 2306 1 T1 1 T4 5 T5 6

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%