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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.26 94.00 97.19 95.98 92.36 97.70 96.33 93.28


Total test records in report: 1324
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T1071 /workspace/coverage/default/75.otp_ctrl_stress_all_with_rand_reset.3025054132 Mar 10 03:37:33 PM PDT 24 Mar 10 04:12:57 PM PDT 24 296262842679 ps
T17 /workspace/coverage/default/285.otp_ctrl_init_fail.4227944238 Mar 10 03:38:57 PM PDT 24 Mar 10 03:39:03 PM PDT 24 2384496020 ps
T1072 /workspace/coverage/default/248.otp_ctrl_init_fail.824490219 Mar 10 03:38:45 PM PDT 24 Mar 10 03:38:49 PM PDT 24 190363743 ps
T1073 /workspace/coverage/default/53.otp_ctrl_stress_all_with_rand_reset.2114967059 Mar 10 03:37:14 PM PDT 24 Mar 10 04:13:35 PM PDT 24 357984871883 ps
T1074 /workspace/coverage/default/25.otp_ctrl_init_fail.635060551 Mar 10 03:35:31 PM PDT 24 Mar 10 03:35:35 PM PDT 24 2086824093 ps
T1075 /workspace/coverage/default/20.otp_ctrl_smoke.1995745361 Mar 10 03:35:00 PM PDT 24 Mar 10 03:35:09 PM PDT 24 577967338 ps
T1076 /workspace/coverage/default/67.otp_ctrl_init_fail.1219889426 Mar 10 03:37:29 PM PDT 24 Mar 10 03:37:34 PM PDT 24 527688072 ps
T1077 /workspace/coverage/default/22.otp_ctrl_check_fail.531210208 Mar 10 03:35:14 PM PDT 24 Mar 10 03:35:26 PM PDT 24 1065762029 ps
T1078 /workspace/coverage/default/105.otp_ctrl_parallel_lc_esc.2489615384 Mar 10 03:37:47 PM PDT 24 Mar 10 03:37:53 PM PDT 24 267648911 ps
T1079 /workspace/coverage/default/2.otp_ctrl_dai_lock.508529403 Mar 10 03:33:32 PM PDT 24 Mar 10 03:34:02 PM PDT 24 902445642 ps
T1080 /workspace/coverage/default/0.otp_ctrl_smoke.950186571 Mar 10 03:33:13 PM PDT 24 Mar 10 03:33:22 PM PDT 24 246478101 ps
T1081 /workspace/coverage/default/31.otp_ctrl_regwen.2009611277 Mar 10 03:35:51 PM PDT 24 Mar 10 03:35:57 PM PDT 24 659652905 ps
T1082 /workspace/coverage/default/121.otp_ctrl_parallel_lc_esc.1142523693 Mar 10 03:37:59 PM PDT 24 Mar 10 03:38:14 PM PDT 24 889018564 ps
T1083 /workspace/coverage/default/40.otp_ctrl_dai_lock.2116489966 Mar 10 03:36:34 PM PDT 24 Mar 10 03:36:53 PM PDT 24 2833053105 ps
T1084 /workspace/coverage/default/38.otp_ctrl_stress_all_with_rand_reset.2036792471 Mar 10 03:36:28 PM PDT 24 Mar 10 04:02:15 PM PDT 24 110426304770 ps
T1085 /workspace/coverage/default/29.otp_ctrl_dai_lock.184069509 Mar 10 03:35:48 PM PDT 24 Mar 10 03:36:08 PM PDT 24 8445499100 ps
T1086 /workspace/coverage/default/60.otp_ctrl_stress_all_with_rand_reset.756525541 Mar 10 03:37:17 PM PDT 24 Mar 10 04:01:09 PM PDT 24 357118091094 ps
T56 /workspace/coverage/default/210.otp_ctrl_init_fail.1290667578 Mar 10 03:38:39 PM PDT 24 Mar 10 03:38:44 PM PDT 24 162958121 ps
T1087 /workspace/coverage/default/20.otp_ctrl_parallel_lc_req.4202322208 Mar 10 03:35:02 PM PDT 24 Mar 10 03:35:19 PM PDT 24 1000841670 ps
T1088 /workspace/coverage/default/38.otp_ctrl_parallel_key_req.2223209750 Mar 10 03:36:30 PM PDT 24 Mar 10 03:36:44 PM PDT 24 900046991 ps
T1089 /workspace/coverage/default/9.otp_ctrl_background_chks.1944394184 Mar 10 03:34:06 PM PDT 24 Mar 10 03:34:22 PM PDT 24 775011227 ps
T1090 /workspace/coverage/default/24.otp_ctrl_alert_test.270677980 Mar 10 03:35:40 PM PDT 24 Mar 10 03:35:43 PM PDT 24 885481182 ps
T1091 /workspace/coverage/default/39.otp_ctrl_alert_test.1286178380 Mar 10 03:36:32 PM PDT 24 Mar 10 03:36:34 PM PDT 24 359963663 ps
T38 /workspace/coverage/default/226.otp_ctrl_init_fail.273410912 Mar 10 03:38:45 PM PDT 24 Mar 10 03:38:50 PM PDT 24 377344900 ps
T1092 /workspace/coverage/default/17.otp_ctrl_dai_errs.3897277315 Mar 10 03:34:44 PM PDT 24 Mar 10 03:35:00 PM PDT 24 460859130 ps
T1093 /workspace/coverage/default/181.otp_ctrl_init_fail.3106535108 Mar 10 03:38:29 PM PDT 24 Mar 10 03:38:34 PM PDT 24 360576312 ps
T1094 /workspace/coverage/default/144.otp_ctrl_parallel_lc_esc.2132469156 Mar 10 03:38:12 PM PDT 24 Mar 10 03:38:24 PM PDT 24 846683313 ps
T1095 /workspace/coverage/default/38.otp_ctrl_smoke.3969626218 Mar 10 03:36:23 PM PDT 24 Mar 10 03:36:37 PM PDT 24 1149206512 ps
T1096 /workspace/coverage/default/260.otp_ctrl_init_fail.3627852211 Mar 10 03:38:53 PM PDT 24 Mar 10 03:38:58 PM PDT 24 2012231693 ps
T1097 /workspace/coverage/default/5.otp_ctrl_dai_lock.260976682 Mar 10 03:33:48 PM PDT 24 Mar 10 03:34:09 PM PDT 24 656828916 ps
T1098 /workspace/coverage/default/65.otp_ctrl_init_fail.3144982331 Mar 10 03:37:22 PM PDT 24 Mar 10 03:37:27 PM PDT 24 127673194 ps
T1099 /workspace/coverage/default/10.otp_ctrl_parallel_key_req.3611272950 Mar 10 03:34:16 PM PDT 24 Mar 10 03:34:45 PM PDT 24 1003791743 ps
T1100 /workspace/coverage/default/75.otp_ctrl_init_fail.2133351110 Mar 10 03:37:32 PM PDT 24 Mar 10 03:37:37 PM PDT 24 200546490 ps
T1101 /workspace/coverage/default/33.otp_ctrl_check_fail.947637176 Mar 10 03:36:03 PM PDT 24 Mar 10 03:36:08 PM PDT 24 1734049525 ps
T1102 /workspace/coverage/default/24.otp_ctrl_parallel_lc_esc.3624015158 Mar 10 03:35:38 PM PDT 24 Mar 10 03:35:44 PM PDT 24 201488591 ps
T1103 /workspace/coverage/default/42.otp_ctrl_parallel_lc_esc.3228198145 Mar 10 03:36:37 PM PDT 24 Mar 10 03:36:46 PM PDT 24 921548535 ps
T1104 /workspace/coverage/default/56.otp_ctrl_stress_all_with_rand_reset.559014004 Mar 10 03:37:17 PM PDT 24 Mar 10 03:55:56 PM PDT 24 83116008596 ps
T134 /workspace/coverage/default/178.otp_ctrl_init_fail.1951797870 Mar 10 03:38:25 PM PDT 24 Mar 10 03:38:30 PM PDT 24 363545490 ps
T147 /workspace/coverage/default/294.otp_ctrl_init_fail.3845040664 Mar 10 03:38:58 PM PDT 24 Mar 10 03:39:04 PM PDT 24 353790779 ps
T148 /workspace/coverage/default/42.otp_ctrl_parallel_lc_req.2642536020 Mar 10 03:36:39 PM PDT 24 Mar 10 03:36:58 PM PDT 24 6963130864 ps
T149 /workspace/coverage/default/256.otp_ctrl_init_fail.1546974054 Mar 10 03:38:51 PM PDT 24 Mar 10 03:38:56 PM PDT 24 188540809 ps
T150 /workspace/coverage/default/41.otp_ctrl_dai_lock.1665818473 Mar 10 03:36:36 PM PDT 24 Mar 10 03:37:35 PM PDT 24 30253951397 ps
T151 /workspace/coverage/default/72.otp_ctrl_init_fail.3423289122 Mar 10 03:37:26 PM PDT 24 Mar 10 03:37:32 PM PDT 24 163378054 ps
T152 /workspace/coverage/default/240.otp_ctrl_init_fail.1876914680 Mar 10 03:38:49 PM PDT 24 Mar 10 03:38:53 PM PDT 24 134607816 ps
T153 /workspace/coverage/default/32.otp_ctrl_macro_errs.910373652 Mar 10 03:35:52 PM PDT 24 Mar 10 03:36:08 PM PDT 24 2144578762 ps
T154 /workspace/coverage/default/12.otp_ctrl_parallel_lc_esc.3808633568 Mar 10 03:34:25 PM PDT 24 Mar 10 03:34:43 PM PDT 24 301034764 ps
T107 /workspace/coverage/default/16.otp_ctrl_parallel_lc_esc.2375314882 Mar 10 03:34:43 PM PDT 24 Mar 10 03:34:54 PM PDT 24 3656960369 ps
T1105 /workspace/coverage/default/176.otp_ctrl_parallel_lc_esc.1055308358 Mar 10 03:38:26 PM PDT 24 Mar 10 03:38:29 PM PDT 24 113256322 ps
T1106 /workspace/coverage/default/190.otp_ctrl_parallel_lc_esc.1869321657 Mar 10 03:38:32 PM PDT 24 Mar 10 03:38:37 PM PDT 24 199531402 ps
T123 /workspace/coverage/default/31.otp_ctrl_check_fail.1381897817 Mar 10 03:35:47 PM PDT 24 Mar 10 03:36:09 PM PDT 24 682378418 ps
T1107 /workspace/coverage/default/70.otp_ctrl_parallel_lc_esc.1912817985 Mar 10 03:37:26 PM PDT 24 Mar 10 03:37:34 PM PDT 24 253704266 ps
T1108 /workspace/coverage/default/6.otp_ctrl_parallel_lc_req.2491582766 Mar 10 03:33:46 PM PDT 24 Mar 10 03:34:06 PM PDT 24 1123533416 ps
T1109 /workspace/coverage/default/8.otp_ctrl_test_access.3580751479 Mar 10 03:34:04 PM PDT 24 Mar 10 03:34:21 PM PDT 24 678407921 ps
T1110 /workspace/coverage/default/24.otp_ctrl_dai_lock.1487591892 Mar 10 03:35:44 PM PDT 24 Mar 10 03:35:50 PM PDT 24 167444603 ps
T1111 /workspace/coverage/default/18.otp_ctrl_parallel_key_req.3153685627 Mar 10 03:34:52 PM PDT 24 Mar 10 03:35:18 PM PDT 24 4229515753 ps
T1112 /workspace/coverage/default/77.otp_ctrl_init_fail.1671325185 Mar 10 03:37:30 PM PDT 24 Mar 10 03:37:35 PM PDT 24 118283958 ps
T1113 /workspace/coverage/default/48.otp_ctrl_dai_errs.4226210224 Mar 10 03:37:02 PM PDT 24 Mar 10 03:37:24 PM PDT 24 753292913 ps
T1114 /workspace/coverage/default/39.otp_ctrl_parallel_lc_req.159710490 Mar 10 03:36:31 PM PDT 24 Mar 10 03:37:00 PM PDT 24 1635827166 ps
T1115 /workspace/coverage/default/21.otp_ctrl_alert_test.1725604540 Mar 10 03:35:13 PM PDT 24 Mar 10 03:35:14 PM PDT 24 51932362 ps
T1116 /workspace/coverage/default/0.otp_ctrl_background_chks.3936814146 Mar 10 03:33:13 PM PDT 24 Mar 10 03:33:57 PM PDT 24 2130759824 ps
T1117 /workspace/coverage/default/237.otp_ctrl_init_fail.4015169886 Mar 10 03:38:44 PM PDT 24 Mar 10 03:38:51 PM PDT 24 521387315 ps
T1118 /workspace/coverage/default/196.otp_ctrl_init_fail.2393273252 Mar 10 03:38:32 PM PDT 24 Mar 10 03:38:37 PM PDT 24 257151421 ps
T1119 /workspace/coverage/default/0.otp_ctrl_test_access.703293373 Mar 10 03:33:18 PM PDT 24 Mar 10 03:33:24 PM PDT 24 483003098 ps
T1120 /workspace/coverage/default/276.otp_ctrl_init_fail.3586961252 Mar 10 03:38:51 PM PDT 24 Mar 10 03:38:58 PM PDT 24 2049471797 ps
T1121 /workspace/coverage/default/2.otp_ctrl_macro_errs.2795978243 Mar 10 03:33:32 PM PDT 24 Mar 10 03:33:40 PM PDT 24 332056704 ps
T1122 /workspace/coverage/default/13.otp_ctrl_init_fail.153171623 Mar 10 03:34:30 PM PDT 24 Mar 10 03:34:34 PM PDT 24 144756480 ps
T1123 /workspace/coverage/default/113.otp_ctrl_parallel_lc_esc.1177535631 Mar 10 03:37:53 PM PDT 24 Mar 10 03:38:20 PM PDT 24 967061646 ps
T1124 /workspace/coverage/default/160.otp_ctrl_init_fail.3337255828 Mar 10 03:38:14 PM PDT 24 Mar 10 03:38:18 PM PDT 24 193739133 ps
T1125 /workspace/coverage/default/77.otp_ctrl_parallel_lc_esc.243089797 Mar 10 03:37:33 PM PDT 24 Mar 10 03:37:37 PM PDT 24 1264413246 ps
T1126 /workspace/coverage/default/199.otp_ctrl_parallel_lc_esc.546956368 Mar 10 03:38:33 PM PDT 24 Mar 10 03:38:39 PM PDT 24 463646778 ps
T1127 /workspace/coverage/default/49.otp_ctrl_stress_all.3832014051 Mar 10 03:37:14 PM PDT 24 Mar 10 03:40:13 PM PDT 24 27503029892 ps
T1128 /workspace/coverage/default/43.otp_ctrl_alert_test.1614647597 Mar 10 03:36:44 PM PDT 24 Mar 10 03:36:46 PM PDT 24 205299014 ps
T1129 /workspace/coverage/default/129.otp_ctrl_init_fail.363693215 Mar 10 03:38:03 PM PDT 24 Mar 10 03:38:08 PM PDT 24 414366877 ps
T1130 /workspace/coverage/default/147.otp_ctrl_init_fail.225175084 Mar 10 03:38:12 PM PDT 24 Mar 10 03:38:16 PM PDT 24 298209753 ps
T1131 /workspace/coverage/default/19.otp_ctrl_dai_lock.2386387912 Mar 10 03:34:59 PM PDT 24 Mar 10 03:35:14 PM PDT 24 419909952 ps
T1132 /workspace/coverage/default/124.otp_ctrl_init_fail.3005961447 Mar 10 03:37:59 PM PDT 24 Mar 10 03:38:04 PM PDT 24 216107237 ps
T1133 /workspace/coverage/default/2.otp_ctrl_background_chks.3088083054 Mar 10 03:33:33 PM PDT 24 Mar 10 03:34:13 PM PDT 24 3192409258 ps
T1134 /workspace/coverage/default/39.otp_ctrl_check_fail.526159211 Mar 10 03:36:31 PM PDT 24 Mar 10 03:36:36 PM PDT 24 178567408 ps
T1135 /workspace/coverage/default/41.otp_ctrl_parallel_lc_req.2999189540 Mar 10 03:36:35 PM PDT 24 Mar 10 03:36:59 PM PDT 24 1063617386 ps
T1136 /workspace/coverage/default/222.otp_ctrl_init_fail.2842800040 Mar 10 03:38:42 PM PDT 24 Mar 10 03:38:48 PM PDT 24 492333681 ps
T1137 /workspace/coverage/default/47.otp_ctrl_alert_test.624113785 Mar 10 03:37:01 PM PDT 24 Mar 10 03:37:04 PM PDT 24 99286628 ps
T80 /workspace/coverage/default/141.otp_ctrl_init_fail.3837648075 Mar 10 03:38:06 PM PDT 24 Mar 10 03:38:16 PM PDT 24 2309607425 ps
T1138 /workspace/coverage/default/148.otp_ctrl_parallel_lc_esc.4134914331 Mar 10 03:38:13 PM PDT 24 Mar 10 03:38:37 PM PDT 24 8032145576 ps
T1139 /workspace/coverage/default/89.otp_ctrl_parallel_lc_esc.3763111885 Mar 10 03:37:40 PM PDT 24 Mar 10 03:37:47 PM PDT 24 181606059 ps
T1140 /workspace/coverage/default/16.otp_ctrl_dai_errs.3426857937 Mar 10 03:34:45 PM PDT 24 Mar 10 03:35:03 PM PDT 24 1557101440 ps
T1141 /workspace/coverage/default/26.otp_ctrl_regwen.2656296278 Mar 10 03:35:43 PM PDT 24 Mar 10 03:35:48 PM PDT 24 119002637 ps
T1142 /workspace/coverage/default/253.otp_ctrl_init_fail.2376949798 Mar 10 03:38:59 PM PDT 24 Mar 10 03:39:05 PM PDT 24 2257538414 ps
T57 /workspace/coverage/default/207.otp_ctrl_init_fail.63919893 Mar 10 03:38:41 PM PDT 24 Mar 10 03:38:46 PM PDT 24 159017287 ps
T1143 /workspace/coverage/default/28.otp_ctrl_test_access.1702495531 Mar 10 03:35:45 PM PDT 24 Mar 10 03:35:59 PM PDT 24 917716932 ps
T1144 /workspace/coverage/default/13.otp_ctrl_alert_test.2512082234 Mar 10 03:34:34 PM PDT 24 Mar 10 03:34:41 PM PDT 24 823737703 ps
T249 /workspace/coverage/default/72.otp_ctrl_parallel_lc_esc.2369726615 Mar 10 03:37:27 PM PDT 24 Mar 10 03:37:39 PM PDT 24 441335619 ps
T1145 /workspace/coverage/default/22.otp_ctrl_smoke.3869165084 Mar 10 03:35:12 PM PDT 24 Mar 10 03:35:23 PM PDT 24 3826873774 ps
T1146 /workspace/coverage/default/93.otp_ctrl_init_fail.1945590990 Mar 10 03:37:44 PM PDT 24 Mar 10 03:37:48 PM PDT 24 102306105 ps
T1147 /workspace/coverage/default/108.otp_ctrl_init_fail.664611798 Mar 10 03:37:51 PM PDT 24 Mar 10 03:37:57 PM PDT 24 1798584033 ps
T1148 /workspace/coverage/default/33.otp_ctrl_regwen.1342787127 Mar 10 03:36:05 PM PDT 24 Mar 10 03:36:15 PM PDT 24 309420395 ps
T1149 /workspace/coverage/default/46.otp_ctrl_macro_errs.3648515761 Mar 10 03:36:58 PM PDT 24 Mar 10 03:37:14 PM PDT 24 558665758 ps
T1150 /workspace/coverage/default/26.otp_ctrl_stress_all.4098422595 Mar 10 03:35:42 PM PDT 24 Mar 10 03:35:49 PM PDT 24 306821758 ps
T231 /workspace/coverage/default/4.otp_ctrl_sec_cm.1567388527 Mar 10 03:33:44 PM PDT 24 Mar 10 03:37:03 PM PDT 24 21129700893 ps
T1151 /workspace/coverage/default/19.otp_ctrl_smoke.3409256399 Mar 10 03:34:53 PM PDT 24 Mar 10 03:35:10 PM PDT 24 5034226641 ps
T1152 /workspace/coverage/default/94.otp_ctrl_init_fail.285069021 Mar 10 03:37:45 PM PDT 24 Mar 10 03:37:48 PM PDT 24 104088675 ps
T1153 /workspace/coverage/default/184.otp_ctrl_parallel_lc_esc.1167236941 Mar 10 03:38:29 PM PDT 24 Mar 10 03:38:44 PM PDT 24 1140444057 ps
T1154 /workspace/coverage/default/24.otp_ctrl_regwen.1366376836 Mar 10 03:35:39 PM PDT 24 Mar 10 03:35:45 PM PDT 24 219231825 ps
T1155 /workspace/coverage/default/22.otp_ctrl_parallel_lc_req.3797238067 Mar 10 03:35:14 PM PDT 24 Mar 10 03:35:25 PM PDT 24 538001026 ps
T1156 /workspace/coverage/default/156.otp_ctrl_init_fail.2150648071 Mar 10 03:38:18 PM PDT 24 Mar 10 03:38:22 PM PDT 24 119747900 ps
T299 /workspace/coverage/default/86.otp_ctrl_stress_all_with_rand_reset.2345976219 Mar 10 03:37:43 PM PDT 24 Mar 10 04:01:23 PM PDT 24 103179323760 ps
T1157 /workspace/coverage/default/3.otp_ctrl_test_access.385480392 Mar 10 03:33:41 PM PDT 24 Mar 10 03:33:54 PM PDT 24 720699927 ps
T1158 /workspace/coverage/default/16.otp_ctrl_test_access.2932272902 Mar 10 03:34:43 PM PDT 24 Mar 10 03:35:15 PM PDT 24 2503132943 ps
T1159 /workspace/coverage/default/182.otp_ctrl_parallel_lc_esc.1816978609 Mar 10 03:38:27 PM PDT 24 Mar 10 03:38:36 PM PDT 24 337949370 ps
T1160 /workspace/coverage/default/3.otp_ctrl_stress_all_with_rand_reset.1434092378 Mar 10 03:33:39 PM PDT 24 Mar 10 03:52:09 PM PDT 24 40536954267 ps
T1161 /workspace/coverage/default/27.otp_ctrl_parallel_key_req.118857866 Mar 10 03:35:42 PM PDT 24 Mar 10 03:36:06 PM PDT 24 2708018564 ps
T1162 /workspace/coverage/default/33.otp_ctrl_macro_errs.2131091369 Mar 10 03:36:05 PM PDT 24 Mar 10 03:36:32 PM PDT 24 711312851 ps
T1163 /workspace/coverage/default/48.otp_ctrl_macro_errs.3210085610 Mar 10 03:37:02 PM PDT 24 Mar 10 03:37:41 PM PDT 24 1354089431 ps
T1164 /workspace/coverage/default/267.otp_ctrl_init_fail.3017914226 Mar 10 03:38:56 PM PDT 24 Mar 10 03:39:01 PM PDT 24 385021677 ps
T1165 /workspace/coverage/default/34.otp_ctrl_dai_lock.2642472691 Mar 10 03:36:05 PM PDT 24 Mar 10 03:36:30 PM PDT 24 2385079910 ps
T1166 /workspace/coverage/default/11.otp_ctrl_dai_errs.4113080978 Mar 10 03:34:18 PM PDT 24 Mar 10 03:34:42 PM PDT 24 370468277 ps
T1167 /workspace/coverage/default/5.otp_ctrl_macro_errs.3116613942 Mar 10 03:33:48 PM PDT 24 Mar 10 03:34:19 PM PDT 24 1426523488 ps
T1168 /workspace/coverage/default/48.otp_ctrl_parallel_lc_esc.2169967234 Mar 10 03:37:01 PM PDT 24 Mar 10 03:37:07 PM PDT 24 397795737 ps
T1169 /workspace/coverage/default/13.otp_ctrl_stress_all_with_rand_reset.2418027767 Mar 10 03:34:31 PM PDT 24 Mar 10 03:43:37 PM PDT 24 63888656456 ps
T135 /workspace/coverage/default/111.otp_ctrl_init_fail.1810771319 Mar 10 03:37:54 PM PDT 24 Mar 10 03:37:58 PM PDT 24 562434315 ps
T1170 /workspace/coverage/default/183.otp_ctrl_init_fail.2180268577 Mar 10 03:38:30 PM PDT 24 Mar 10 03:38:35 PM PDT 24 183356147 ps
T1171 /workspace/coverage/default/5.otp_ctrl_alert_test.283337888 Mar 10 03:33:44 PM PDT 24 Mar 10 03:33:47 PM PDT 24 159031345 ps
T1172 /workspace/coverage/default/153.otp_ctrl_init_fail.2549944928 Mar 10 03:38:15 PM PDT 24 Mar 10 03:38:22 PM PDT 24 759831792 ps
T1173 /workspace/coverage/default/138.otp_ctrl_init_fail.3695826589 Mar 10 03:38:06 PM PDT 24 Mar 10 03:38:10 PM PDT 24 107965952 ps
T1174 /workspace/coverage/default/31.otp_ctrl_parallel_lc_esc.942090735 Mar 10 03:35:47 PM PDT 24 Mar 10 03:36:04 PM PDT 24 792614035 ps
T1175 /workspace/coverage/default/141.otp_ctrl_parallel_lc_esc.1020607838 Mar 10 03:38:07 PM PDT 24 Mar 10 03:38:15 PM PDT 24 402380858 ps
T1176 /workspace/coverage/default/49.otp_ctrl_macro_errs.4140736762 Mar 10 03:37:10 PM PDT 24 Mar 10 03:37:23 PM PDT 24 357362898 ps
T1177 /workspace/coverage/default/32.otp_ctrl_parallel_key_req.782271233 Mar 10 03:35:56 PM PDT 24 Mar 10 03:36:17 PM PDT 24 1488653301 ps
T1178 /workspace/coverage/default/6.otp_ctrl_dai_lock.3443844311 Mar 10 03:33:54 PM PDT 24 Mar 10 03:34:58 PM PDT 24 8108232278 ps
T1179 /workspace/coverage/default/163.otp_ctrl_parallel_lc_esc.1683898374 Mar 10 03:38:20 PM PDT 24 Mar 10 03:38:30 PM PDT 24 2372190673 ps
T1180 /workspace/coverage/default/21.otp_ctrl_parallel_lc_esc.4043651545 Mar 10 03:35:07 PM PDT 24 Mar 10 03:35:18 PM PDT 24 615382392 ps
T1181 /workspace/coverage/default/132.otp_ctrl_init_fail.2999910773 Mar 10 03:38:07 PM PDT 24 Mar 10 03:38:11 PM PDT 24 120164284 ps
T1182 /workspace/coverage/default/132.otp_ctrl_parallel_lc_esc.1291405436 Mar 10 03:38:07 PM PDT 24 Mar 10 03:38:16 PM PDT 24 171282753 ps
T1183 /workspace/coverage/default/21.otp_ctrl_regwen.2920763755 Mar 10 03:35:07 PM PDT 24 Mar 10 03:35:14 PM PDT 24 231977058 ps
T1184 /workspace/coverage/default/63.otp_ctrl_init_fail.1951974128 Mar 10 03:37:23 PM PDT 24 Mar 10 03:37:28 PM PDT 24 146642812 ps
T1185 /workspace/coverage/default/18.otp_ctrl_stress_all_with_rand_reset.2920807132 Mar 10 03:34:53 PM PDT 24 Mar 10 03:50:50 PM PDT 24 38317875512 ps
T1186 /workspace/coverage/default/1.otp_ctrl_init_fail.1677306875 Mar 10 03:33:18 PM PDT 24 Mar 10 03:33:23 PM PDT 24 125111875 ps
T1187 /workspace/coverage/default/91.otp_ctrl_stress_all_with_rand_reset.782085535 Mar 10 03:37:41 PM PDT 24 Mar 10 03:46:23 PM PDT 24 50736827596 ps
T1188 /workspace/coverage/default/56.otp_ctrl_init_fail.4193027737 Mar 10 03:37:12 PM PDT 24 Mar 10 03:37:17 PM PDT 24 140725168 ps
T1189 /workspace/coverage/default/8.otp_ctrl_parallel_key_req.2424093278 Mar 10 03:34:05 PM PDT 24 Mar 10 03:34:15 PM PDT 24 545615935 ps
T1190 /workspace/coverage/default/12.otp_ctrl_test_access.687111140 Mar 10 03:34:23 PM PDT 24 Mar 10 03:34:52 PM PDT 24 1496670257 ps
T1191 /workspace/coverage/default/8.otp_ctrl_alert_test.3451773795 Mar 10 03:34:04 PM PDT 24 Mar 10 03:34:07 PM PDT 24 77165058 ps
T1192 /workspace/coverage/default/5.otp_ctrl_smoke.2761270460 Mar 10 03:33:42 PM PDT 24 Mar 10 03:33:50 PM PDT 24 706357597 ps
T1193 /workspace/coverage/default/135.otp_ctrl_init_fail.274532692 Mar 10 03:38:05 PM PDT 24 Mar 10 03:38:11 PM PDT 24 174065622 ps
T1194 /workspace/coverage/default/7.otp_ctrl_smoke.538220915 Mar 10 03:33:56 PM PDT 24 Mar 10 03:34:06 PM PDT 24 3742894199 ps
T1195 /workspace/coverage/default/15.otp_ctrl_dai_errs.3820894446 Mar 10 03:34:39 PM PDT 24 Mar 10 03:35:05 PM PDT 24 765896543 ps
T1196 /workspace/coverage/default/113.otp_ctrl_init_fail.723689547 Mar 10 03:37:54 PM PDT 24 Mar 10 03:38:00 PM PDT 24 466507306 ps
T1197 /workspace/coverage/default/34.otp_ctrl_smoke.2512524463 Mar 10 03:36:06 PM PDT 24 Mar 10 03:36:11 PM PDT 24 124892704 ps
T1198 /workspace/coverage/default/32.otp_ctrl_smoke.1443493503 Mar 10 03:35:55 PM PDT 24 Mar 10 03:36:00 PM PDT 24 174049516 ps
T215 /workspace/coverage/default/90.otp_ctrl_parallel_lc_esc.449286312 Mar 10 03:37:39 PM PDT 24 Mar 10 03:37:49 PM PDT 24 343919105 ps
T1199 /workspace/coverage/cover_reg_top/49.otp_ctrl_intr_test.3999647491 Mar 10 01:20:45 PM PDT 24 Mar 10 01:20:46 PM PDT 24 134740409 ps
T263 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.3677248873 Mar 10 01:20:37 PM PDT 24 Mar 10 01:20:57 PM PDT 24 2618775240 ps
T271 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.2551422582 Mar 10 01:20:32 PM PDT 24 Mar 10 01:20:36 PM PDT 24 206596784 ps
T272 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_rw.2711688000 Mar 10 01:20:39 PM PDT 24 Mar 10 01:20:41 PM PDT 24 62827464 ps
T1200 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_errors.701408693 Mar 10 01:20:27 PM PDT 24 Mar 10 01:20:33 PM PDT 24 141322409 ps
T1201 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_errors.780066529 Mar 10 01:20:31 PM PDT 24 Mar 10 01:20:38 PM PDT 24 79947973 ps
T268 /workspace/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.3277219053 Mar 10 01:20:40 PM PDT 24 Mar 10 01:20:43 PM PDT 24 647729514 ps
T1202 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_walk.1106885610 Mar 10 01:20:24 PM PDT 24 Mar 10 01:20:26 PM PDT 24 546427270 ps
T266 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.1540090206 Mar 10 01:20:30 PM PDT 24 Mar 10 01:20:32 PM PDT 24 87254782 ps
T1203 /workspace/coverage/cover_reg_top/37.otp_ctrl_intr_test.2139839662 Mar 10 01:20:54 PM PDT 24 Mar 10 01:20:56 PM PDT 24 42729027 ps
T267 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.1446860716 Mar 10 01:20:19 PM PDT 24 Mar 10 01:20:25 PM PDT 24 326402627 ps
T377 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_rw.2897085046 Mar 10 01:20:47 PM PDT 24 Mar 10 01:20:49 PM PDT 24 146429787 ps
T1204 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.2416647384 Mar 10 01:20:44 PM PDT 24 Mar 10 01:20:48 PM PDT 24 112312256 ps
T1205 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_errors.587154911 Mar 10 01:20:41 PM PDT 24 Mar 10 01:20:47 PM PDT 24 76793561 ps
T1206 /workspace/coverage/cover_reg_top/38.otp_ctrl_intr_test.332926685 Mar 10 01:20:55 PM PDT 24 Mar 10 01:20:57 PM PDT 24 109204789 ps
T1207 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.3880061422 Mar 10 01:20:25 PM PDT 24 Mar 10 01:20:27 PM PDT 24 72259820 ps
T1208 /workspace/coverage/cover_reg_top/36.otp_ctrl_intr_test.2380104012 Mar 10 01:20:47 PM PDT 24 Mar 10 01:20:49 PM PDT 24 49672705 ps
T325 /workspace/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.3967090102 Mar 10 01:20:26 PM PDT 24 Mar 10 01:20:28 PM PDT 24 94564940 ps
T376 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.1418951876 Mar 10 01:20:40 PM PDT 24 Mar 10 01:20:45 PM PDT 24 1717180853 ps
T1209 /workspace/coverage/cover_reg_top/41.otp_ctrl_intr_test.592945402 Mar 10 01:20:47 PM PDT 24 Mar 10 01:20:49 PM PDT 24 596969939 ps
T300 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_rw.1516361776 Mar 10 01:20:37 PM PDT 24 Mar 10 01:20:40 PM PDT 24 576922479 ps
T1210 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_errors.2702345935 Mar 10 01:20:37 PM PDT 24 Mar 10 01:20:44 PM PDT 24 2120949886 ps
T333 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.4021752963 Mar 10 01:20:21 PM PDT 24 Mar 10 01:20:42 PM PDT 24 7670915231 ps
T264 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.3956534788 Mar 10 01:20:45 PM PDT 24 Mar 10 01:21:06 PM PDT 24 1302930172 ps
T1211 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_errors.2532973436 Mar 10 01:20:22 PM PDT 24 Mar 10 01:20:31 PM PDT 24 3438664053 ps
T1212 /workspace/coverage/cover_reg_top/39.otp_ctrl_intr_test.3979358121 Mar 10 01:20:47 PM PDT 24 Mar 10 01:20:49 PM PDT 24 88566233 ps
T301 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.1328738458 Mar 10 01:20:25 PM PDT 24 Mar 10 01:20:32 PM PDT 24 757738572 ps
T1213 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.3514343370 Mar 10 01:20:18 PM PDT 24 Mar 10 01:20:20 PM PDT 24 581719679 ps
T1214 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_errors.1576030056 Mar 10 01:20:23 PM PDT 24 Mar 10 01:20:29 PM PDT 24 147628883 ps
T1215 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.1514759851 Mar 10 01:20:39 PM PDT 24 Mar 10 01:20:42 PM PDT 24 1041252471 ps
T303 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.4156561526 Mar 10 01:20:31 PM PDT 24 Mar 10 01:20:38 PM PDT 24 178539599 ps
T304 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_rw.879163465 Mar 10 01:20:41 PM PDT 24 Mar 10 01:20:43 PM PDT 24 40853278 ps
T265 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.2329357381 Mar 10 01:20:45 PM PDT 24 Mar 10 01:21:03 PM PDT 24 1227682617 ps
T351 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.3863301832 Mar 10 01:20:32 PM PDT 24 Mar 10 01:21:11 PM PDT 24 18933375368 ps
T1216 /workspace/coverage/cover_reg_top/44.otp_ctrl_intr_test.1805780900 Mar 10 01:20:47 PM PDT 24 Mar 10 01:20:49 PM PDT 24 97711857 ps
T1217 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.1051950366 Mar 10 01:20:42 PM PDT 24 Mar 10 01:20:44 PM PDT 24 146035252 ps
T1218 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_walk.827788587 Mar 10 01:20:20 PM PDT 24 Mar 10 01:20:21 PM PDT 24 36879597 ps
T326 /workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.4248508228 Mar 10 01:20:40 PM PDT 24 Mar 10 01:20:43 PM PDT 24 214243821 ps
T1219 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.1310372375 Mar 10 01:20:30 PM PDT 24 Mar 10 01:20:33 PM PDT 24 208578742 ps
T327 /workspace/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.829796558 Mar 10 01:20:37 PM PDT 24 Mar 10 01:20:40 PM PDT 24 714950332 ps
T1220 /workspace/coverage/cover_reg_top/45.otp_ctrl_intr_test.1380410305 Mar 10 01:20:54 PM PDT 24 Mar 10 01:20:56 PM PDT 24 526007330 ps
T307 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_rw.3067070780 Mar 10 01:20:23 PM PDT 24 Mar 10 01:20:24 PM PDT 24 154600829 ps
T328 /workspace/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.3693841021 Mar 10 01:20:46 PM PDT 24 Mar 10 01:20:49 PM PDT 24 104246552 ps
T1221 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_errors.3677806306 Mar 10 01:20:30 PM PDT 24 Mar 10 01:20:35 PM PDT 24 311640992 ps
T1222 /workspace/coverage/cover_reg_top/5.otp_ctrl_intr_test.3657774240 Mar 10 01:20:31 PM PDT 24 Mar 10 01:20:33 PM PDT 24 130536653 ps
T329 /workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.64533382 Mar 10 01:20:21 PM PDT 24 Mar 10 01:20:24 PM PDT 24 67092972 ps
T305 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_rw.3581604446 Mar 10 01:20:28 PM PDT 24 Mar 10 01:20:30 PM PDT 24 89799151 ps
T1223 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.2982761626 Mar 10 01:20:32 PM PDT 24 Mar 10 01:20:37 PM PDT 24 213879691 ps
T330 /workspace/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.560966307 Mar 10 01:20:37 PM PDT 24 Mar 10 01:20:41 PM PDT 24 231114130 ps
T1224 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.3598023981 Mar 10 01:20:41 PM PDT 24 Mar 10 01:20:43 PM PDT 24 235812624 ps
T1225 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.906179296 Mar 10 01:20:48 PM PDT 24 Mar 10 01:20:50 PM PDT 24 38017157 ps
T331 /workspace/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.2163460526 Mar 10 01:20:35 PM PDT 24 Mar 10 01:20:39 PM PDT 24 181701373 ps
T1226 /workspace/coverage/cover_reg_top/12.otp_ctrl_intr_test.3123849643 Mar 10 01:20:34 PM PDT 24 Mar 10 01:20:37 PM PDT 24 87050361 ps
T1227 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.2333076107 Mar 10 01:20:25 PM PDT 24 Mar 10 01:20:27 PM PDT 24 39741815 ps
T1228 /workspace/coverage/cover_reg_top/17.otp_ctrl_tl_errors.2059678487 Mar 10 01:20:39 PM PDT 24 Mar 10 01:20:46 PM PDT 24 1228387592 ps
T1229 /workspace/coverage/cover_reg_top/35.otp_ctrl_intr_test.512705851 Mar 10 01:20:44 PM PDT 24 Mar 10 01:20:45 PM PDT 24 84182567 ps
T306 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_rw.326086250 Mar 10 01:20:30 PM PDT 24 Mar 10 01:20:32 PM PDT 24 61270096 ps
T1230 /workspace/coverage/cover_reg_top/28.otp_ctrl_intr_test.484128307 Mar 10 01:20:45 PM PDT 24 Mar 10 01:20:46 PM PDT 24 40388554 ps
T1231 /workspace/coverage/cover_reg_top/24.otp_ctrl_intr_test.3273342733 Mar 10 01:20:47 PM PDT 24 Mar 10 01:20:48 PM PDT 24 134573818 ps
T1232 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.1166299838 Mar 10 01:20:31 PM PDT 24 Mar 10 01:20:35 PM PDT 24 234545847 ps
T1233 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_errors.372275026 Mar 10 01:20:21 PM PDT 24 Mar 10 01:20:26 PM PDT 24 187055490 ps
T274 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.3577205865 Mar 10 01:20:19 PM PDT 24 Mar 10 01:21:07 PM PDT 24 19851782745 ps
T1234 /workspace/coverage/cover_reg_top/8.otp_ctrl_intr_test.1165199687 Mar 10 01:20:32 PM PDT 24 Mar 10 01:20:35 PM PDT 24 43690544 ps
T1235 /workspace/coverage/cover_reg_top/17.otp_ctrl_intr_test.1032232413 Mar 10 01:20:41 PM PDT 24 Mar 10 01:20:43 PM PDT 24 69361218 ps
T1236 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_errors.3345453293 Mar 10 01:20:26 PM PDT 24 Mar 10 01:20:35 PM PDT 24 2263716782 ps
T308 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.3243092386 Mar 10 01:20:26 PM PDT 24 Mar 10 01:20:29 PM PDT 24 1548337890 ps
T1237 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_errors.2571437584 Mar 10 01:20:42 PM PDT 24 Mar 10 01:20:47 PM PDT 24 205759921 ps
T1238 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.368680004 Mar 10 01:20:27 PM PDT 24 Mar 10 01:20:33 PM PDT 24 386384966 ps
T1239 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.2822620963 Mar 10 01:20:18 PM PDT 24 Mar 10 01:20:20 PM PDT 24 127768661 ps
T353 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.1844634744 Mar 10 01:20:34 PM PDT 24 Mar 10 01:21:26 PM PDT 24 19993895628 ps
T1240 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.2344176735 Mar 10 01:20:41 PM PDT 24 Mar 10 01:20:43 PM PDT 24 65113143 ps
T1241 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.4258628996 Mar 10 01:20:27 PM PDT 24 Mar 10 01:20:30 PM PDT 24 220249980 ps
T1242 /workspace/coverage/cover_reg_top/33.otp_ctrl_intr_test.4143837933 Mar 10 01:20:54 PM PDT 24 Mar 10 01:20:56 PM PDT 24 85076578 ps
T1243 /workspace/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.419048104 Mar 10 01:20:24 PM PDT 24 Mar 10 01:20:26 PM PDT 24 173001577 ps
T1244 /workspace/coverage/cover_reg_top/48.otp_ctrl_intr_test.4214243824 Mar 10 01:20:45 PM PDT 24 Mar 10 01:20:47 PM PDT 24 130714606 ps
T1245 /workspace/coverage/cover_reg_top/20.otp_ctrl_intr_test.1863001670 Mar 10 01:20:47 PM PDT 24 Mar 10 01:20:48 PM PDT 24 131311569 ps
T1246 /workspace/coverage/cover_reg_top/2.otp_ctrl_intr_test.1755957463 Mar 10 01:20:28 PM PDT 24 Mar 10 01:20:30 PM PDT 24 77051693 ps
T1247 /workspace/coverage/cover_reg_top/26.otp_ctrl_intr_test.925036195 Mar 10 01:20:44 PM PDT 24 Mar 10 01:20:46 PM PDT 24 530998398 ps
T1248 /workspace/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.2837146026 Mar 10 01:20:32 PM PDT 24 Mar 10 01:20:34 PM PDT 24 85337246 ps
T1249 /workspace/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.1113882279 Mar 10 01:20:40 PM PDT 24 Mar 10 01:20:45 PM PDT 24 547453400 ps
T1250 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_errors.371727729 Mar 10 01:20:48 PM PDT 24 Mar 10 01:20:52 PM PDT 24 230134879 ps
T1251 /workspace/coverage/cover_reg_top/43.otp_ctrl_intr_test.1600718632 Mar 10 01:20:47 PM PDT 24 Mar 10 01:20:49 PM PDT 24 41775686 ps
T1252 /workspace/coverage/cover_reg_top/0.otp_ctrl_intr_test.67971058 Mar 10 01:20:19 PM PDT 24 Mar 10 01:20:21 PM PDT 24 71051821 ps
T1253 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.1440753116 Mar 10 01:20:26 PM PDT 24 Mar 10 01:20:36 PM PDT 24 523378138 ps
T1254 /workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.519055385 Mar 10 01:20:47 PM PDT 24 Mar 10 01:20:48 PM PDT 24 36574000 ps
T309 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.963055834 Mar 10 01:20:21 PM PDT 24 Mar 10 01:20:24 PM PDT 24 116524291 ps
T1255 /workspace/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.4206938996 Mar 10 01:20:45 PM PDT 24 Mar 10 01:20:48 PM PDT 24 100785621 ps
T1256 /workspace/coverage/cover_reg_top/7.otp_ctrl_intr_test.4227087132 Mar 10 01:20:34 PM PDT 24 Mar 10 01:20:37 PM PDT 24 125757965 ps
T1257 /workspace/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.1183719362 Mar 10 01:20:34 PM PDT 24 Mar 10 01:20:38 PM PDT 24 79663884 ps
T1258 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_rw.3855168456 Mar 10 01:20:40 PM PDT 24 Mar 10 01:20:42 PM PDT 24 150488655 ps
T355 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.1484957668 Mar 10 01:20:20 PM PDT 24 Mar 10 01:20:40 PM PDT 24 10184493557 ps
T1259 /workspace/coverage/cover_reg_top/25.otp_ctrl_intr_test.1061107562 Mar 10 01:20:47 PM PDT 24 Mar 10 01:20:49 PM PDT 24 150593732 ps
T1260 /workspace/coverage/cover_reg_top/15.otp_ctrl_intr_test.2939508043 Mar 10 01:20:43 PM PDT 24 Mar 10 01:20:45 PM PDT 24 79554391 ps
T1261 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.3307984684 Mar 10 01:20:40 PM PDT 24 Mar 10 01:20:44 PM PDT 24 115006910 ps
T1262 /workspace/coverage/cover_reg_top/14.otp_ctrl_intr_test.2496137639 Mar 10 01:20:34 PM PDT 24 Mar 10 01:20:37 PM PDT 24 47776083 ps
T360 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.2989829480 Mar 10 01:20:26 PM PDT 24 Mar 10 01:20:40 PM PDT 24 10277272929 ps
T1263 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.862767298 Mar 10 01:20:25 PM PDT 24 Mar 10 01:20:27 PM PDT 24 107344255 ps
T1264 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.3708487481 Mar 10 01:20:25 PM PDT 24 Mar 10 01:20:31 PM PDT 24 452642903 ps
T1265 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.715630742 Mar 10 01:20:21 PM PDT 24 Mar 10 01:20:24 PM PDT 24 396321540 ps
T323 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_rw.2928651965 Mar 10 01:20:46 PM PDT 24 Mar 10 01:20:47 PM PDT 24 42206545 ps
T1266 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.1425334245 Mar 10 01:20:26 PM PDT 24 Mar 10 01:20:28 PM PDT 24 68673056 ps
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