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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.95 93.86 96.44 95.50 92.36 97.00 96.26 93.21


Total test records in report: 1322
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T1051 /workspace/coverage/default/284.otp_ctrl_init_fail.3304058097 Mar 24 03:11:51 PM PDT 24 Mar 24 03:11:55 PM PDT 24 179700535 ps
T1052 /workspace/coverage/default/157.otp_ctrl_parallel_lc_esc.1434882349 Mar 24 03:11:05 PM PDT 24 Mar 24 03:11:26 PM PDT 24 781996700 ps
T1053 /workspace/coverage/default/152.otp_ctrl_init_fail.1852684468 Mar 24 03:11:05 PM PDT 24 Mar 24 03:11:11 PM PDT 24 2610237160 ps
T1054 /workspace/coverage/default/32.otp_ctrl_parallel_key_req.3551923121 Mar 24 03:08:42 PM PDT 24 Mar 24 03:09:06 PM PDT 24 1175362328 ps
T218 /workspace/coverage/default/165.otp_ctrl_parallel_lc_esc.223617113 Mar 24 03:11:11 PM PDT 24 Mar 24 03:11:28 PM PDT 24 559748360 ps
T1055 /workspace/coverage/default/112.otp_ctrl_init_fail.4057084398 Mar 24 03:10:34 PM PDT 24 Mar 24 03:10:38 PM PDT 24 219547509 ps
T1056 /workspace/coverage/default/17.otp_ctrl_test_access.1865266416 Mar 24 03:07:36 PM PDT 24 Mar 24 03:07:51 PM PDT 24 673524703 ps
T1057 /workspace/coverage/default/34.otp_ctrl_macro_errs.560796059 Mar 24 03:08:40 PM PDT 24 Mar 24 03:09:00 PM PDT 24 2473911511 ps
T1058 /workspace/coverage/default/14.otp_ctrl_macro_errs.4230341550 Mar 24 03:07:21 PM PDT 24 Mar 24 03:08:01 PM PDT 24 4265580687 ps
T1059 /workspace/coverage/default/295.otp_ctrl_init_fail.3697257685 Mar 24 03:11:52 PM PDT 24 Mar 24 03:11:57 PM PDT 24 207050551 ps
T1060 /workspace/coverage/default/42.otp_ctrl_parallel_lc_req.819328992 Mar 24 03:09:16 PM PDT 24 Mar 24 03:09:27 PM PDT 24 324028895 ps
T278 /workspace/coverage/default/70.otp_ctrl_stress_all_with_rand_reset.631605074 Mar 24 03:10:03 PM PDT 24 Mar 24 03:32:50 PM PDT 24 59100835844 ps
T1061 /workspace/coverage/default/27.otp_ctrl_parallel_lc_req.2555335328 Mar 24 03:08:12 PM PDT 24 Mar 24 03:08:34 PM PDT 24 611470385 ps
T1062 /workspace/coverage/default/15.otp_ctrl_alert_test.3528386804 Mar 24 03:07:31 PM PDT 24 Mar 24 03:07:33 PM PDT 24 95309340 ps
T1063 /workspace/coverage/default/36.otp_ctrl_stress_all_with_rand_reset.2036846569 Mar 24 03:08:50 PM PDT 24 Mar 24 03:18:13 PM PDT 24 76528229744 ps
T1064 /workspace/coverage/default/184.otp_ctrl_parallel_lc_esc.3395796569 Mar 24 03:11:16 PM PDT 24 Mar 24 03:11:24 PM PDT 24 171931629 ps
T1065 /workspace/coverage/default/5.otp_ctrl_regwen.1790296812 Mar 24 03:07:00 PM PDT 24 Mar 24 03:07:07 PM PDT 24 640007972 ps
T1066 /workspace/coverage/default/279.otp_ctrl_init_fail.3068020325 Mar 24 03:11:52 PM PDT 24 Mar 24 03:11:55 PM PDT 24 104698577 ps
T1067 /workspace/coverage/default/190.otp_ctrl_parallel_lc_esc.4043003849 Mar 24 03:11:19 PM PDT 24 Mar 24 03:11:32 PM PDT 24 424850355 ps
T1068 /workspace/coverage/default/15.otp_ctrl_stress_all.254002741 Mar 24 03:07:33 PM PDT 24 Mar 24 03:12:53 PM PDT 24 42114476235 ps
T1069 /workspace/coverage/default/24.otp_ctrl_regwen.80644440 Mar 24 03:08:01 PM PDT 24 Mar 24 03:08:08 PM PDT 24 644023650 ps
T1070 /workspace/coverage/default/22.otp_ctrl_alert_test.326979644 Mar 24 03:08:03 PM PDT 24 Mar 24 03:08:04 PM PDT 24 56930031 ps
T1071 /workspace/coverage/default/101.otp_ctrl_parallel_lc_esc.647411338 Mar 24 03:10:31 PM PDT 24 Mar 24 03:10:36 PM PDT 24 204852552 ps
T1072 /workspace/coverage/default/30.otp_ctrl_parallel_key_req.1722960775 Mar 24 03:08:29 PM PDT 24 Mar 24 03:08:47 PM PDT 24 740832466 ps
T1073 /workspace/coverage/default/9.otp_ctrl_smoke.1017989064 Mar 24 03:07:05 PM PDT 24 Mar 24 03:07:13 PM PDT 24 601170410 ps
T1074 /workspace/coverage/default/18.otp_ctrl_check_fail.1333858329 Mar 24 03:07:46 PM PDT 24 Mar 24 03:08:25 PM PDT 24 14268297091 ps
T1075 /workspace/coverage/default/185.otp_ctrl_init_fail.2063537777 Mar 24 03:11:15 PM PDT 24 Mar 24 03:11:18 PM PDT 24 292060690 ps
T1076 /workspace/coverage/default/2.otp_ctrl_background_chks.2035227430 Mar 24 03:06:45 PM PDT 24 Mar 24 03:07:25 PM PDT 24 3407662398 ps
T1077 /workspace/coverage/default/35.otp_ctrl_parallel_key_req.3697307180 Mar 24 03:08:47 PM PDT 24 Mar 24 03:09:01 PM PDT 24 914971149 ps
T1078 /workspace/coverage/default/21.otp_ctrl_init_fail.2266619813 Mar 24 03:07:54 PM PDT 24 Mar 24 03:08:00 PM PDT 24 157965673 ps
T1079 /workspace/coverage/default/80.otp_ctrl_init_fail.1708941234 Mar 24 03:10:15 PM PDT 24 Mar 24 03:10:19 PM PDT 24 291613972 ps
T1080 /workspace/coverage/default/13.otp_ctrl_parallel_lc_esc.1498273156 Mar 24 03:07:17 PM PDT 24 Mar 24 03:07:22 PM PDT 24 376607338 ps
T1081 /workspace/coverage/default/6.otp_ctrl_dai_lock.3620533988 Mar 24 03:07:00 PM PDT 24 Mar 24 03:07:19 PM PDT 24 7326181373 ps
T1082 /workspace/coverage/default/162.otp_ctrl_parallel_lc_esc.3952178747 Mar 24 03:11:11 PM PDT 24 Mar 24 03:11:35 PM PDT 24 11299219423 ps
T1083 /workspace/coverage/default/13.otp_ctrl_parallel_key_req.2088277280 Mar 24 03:07:19 PM PDT 24 Mar 24 03:07:41 PM PDT 24 1464945678 ps
T1084 /workspace/coverage/default/28.otp_ctrl_parallel_key_req.1174148353 Mar 24 03:08:23 PM PDT 24 Mar 24 03:08:41 PM PDT 24 1615437288 ps
T1085 /workspace/coverage/default/65.otp_ctrl_stress_all_with_rand_reset.3110849815 Mar 24 03:10:06 PM PDT 24 Mar 24 03:40:29 PM PDT 24 196316745968 ps
T1086 /workspace/coverage/default/286.otp_ctrl_init_fail.3145871491 Mar 24 03:11:50 PM PDT 24 Mar 24 03:11:55 PM PDT 24 453263808 ps
T1087 /workspace/coverage/default/229.otp_ctrl_init_fail.3433877869 Mar 24 03:11:40 PM PDT 24 Mar 24 03:11:44 PM PDT 24 345744871 ps
T1088 /workspace/coverage/default/35.otp_ctrl_init_fail.4078039137 Mar 24 03:08:46 PM PDT 24 Mar 24 03:08:50 PM PDT 24 141390721 ps
T1089 /workspace/coverage/default/0.otp_ctrl_regwen.151176567 Mar 24 03:06:43 PM PDT 24 Mar 24 03:06:55 PM PDT 24 1146485021 ps
T1090 /workspace/coverage/default/25.otp_ctrl_parallel_lc_esc.3803117642 Mar 24 03:08:07 PM PDT 24 Mar 24 03:08:14 PM PDT 24 269691152 ps
T282 /workspace/coverage/default/59.otp_ctrl_stress_all_with_rand_reset.4260159951 Mar 24 03:09:59 PM PDT 24 Mar 24 03:43:27 PM PDT 24 90056001330 ps
T1091 /workspace/coverage/default/22.otp_ctrl_regwen.2115180075 Mar 24 03:08:01 PM PDT 24 Mar 24 03:08:12 PM PDT 24 1095021761 ps
T1092 /workspace/coverage/default/31.otp_ctrl_macro_errs.916289025 Mar 24 03:08:31 PM PDT 24 Mar 24 03:08:41 PM PDT 24 573264625 ps
T1093 /workspace/coverage/default/233.otp_ctrl_init_fail.1763286984 Mar 24 03:11:40 PM PDT 24 Mar 24 03:11:44 PM PDT 24 142879855 ps
T1094 /workspace/coverage/default/59.otp_ctrl_parallel_lc_esc.3088827929 Mar 24 03:09:54 PM PDT 24 Mar 24 03:10:08 PM PDT 24 957948096 ps
T1095 /workspace/coverage/default/33.otp_ctrl_parallel_lc_req.285818027 Mar 24 03:08:39 PM PDT 24 Mar 24 03:08:47 PM PDT 24 4082416725 ps
T1096 /workspace/coverage/default/13.otp_ctrl_dai_errs.1738744076 Mar 24 03:07:18 PM PDT 24 Mar 24 03:07:57 PM PDT 24 2666169410 ps
T1097 /workspace/coverage/default/131.otp_ctrl_parallel_lc_esc.2621583888 Mar 24 03:10:46 PM PDT 24 Mar 24 03:10:52 PM PDT 24 434413036 ps
T1098 /workspace/coverage/default/175.otp_ctrl_parallel_lc_esc.851024518 Mar 24 03:11:11 PM PDT 24 Mar 24 03:11:27 PM PDT 24 424655725 ps
T1099 /workspace/coverage/default/1.otp_ctrl_parallel_lc_esc.3845358398 Mar 24 03:06:45 PM PDT 24 Mar 24 03:06:56 PM PDT 24 226273056 ps
T1100 /workspace/coverage/default/72.otp_ctrl_stress_all_with_rand_reset.74976489 Mar 24 03:10:07 PM PDT 24 Mar 24 03:45:21 PM PDT 24 107467505401 ps
T1101 /workspace/coverage/default/8.otp_ctrl_smoke.1703108699 Mar 24 03:06:58 PM PDT 24 Mar 24 03:07:05 PM PDT 24 280585887 ps
T1102 /workspace/coverage/default/14.otp_ctrl_parallel_key_req.1152430733 Mar 24 03:07:20 PM PDT 24 Mar 24 03:07:57 PM PDT 24 17891127969 ps
T1103 /workspace/coverage/default/37.otp_ctrl_init_fail.1622399177 Mar 24 03:08:49 PM PDT 24 Mar 24 03:08:53 PM PDT 24 280777525 ps
T1104 /workspace/coverage/default/62.otp_ctrl_init_fail.2708994067 Mar 24 03:10:01 PM PDT 24 Mar 24 03:10:05 PM PDT 24 93017792 ps
T1105 /workspace/coverage/default/35.otp_ctrl_smoke.3412556156 Mar 24 03:08:45 PM PDT 24 Mar 24 03:08:49 PM PDT 24 118055761 ps
T1106 /workspace/coverage/default/283.otp_ctrl_init_fail.4018987825 Mar 24 03:11:47 PM PDT 24 Mar 24 03:11:53 PM PDT 24 2350175123 ps
T1107 /workspace/coverage/default/40.otp_ctrl_parallel_lc_req.1655494823 Mar 24 03:09:11 PM PDT 24 Mar 24 03:09:31 PM PDT 24 562962546 ps
T1108 /workspace/coverage/default/6.otp_ctrl_stress_all.291585327 Mar 24 03:07:04 PM PDT 24 Mar 24 03:11:02 PM PDT 24 28015578417 ps
T1109 /workspace/coverage/default/136.otp_ctrl_init_fail.2631608571 Mar 24 03:10:54 PM PDT 24 Mar 24 03:10:59 PM PDT 24 541151596 ps
T1110 /workspace/coverage/default/159.otp_ctrl_init_fail.2864667604 Mar 24 03:11:04 PM PDT 24 Mar 24 03:11:09 PM PDT 24 138838125 ps
T1111 /workspace/coverage/default/36.otp_ctrl_check_fail.2307647259 Mar 24 03:08:51 PM PDT 24 Mar 24 03:09:01 PM PDT 24 538144063 ps
T1112 /workspace/coverage/default/48.otp_ctrl_alert_test.1120588699 Mar 24 03:09:45 PM PDT 24 Mar 24 03:09:47 PM PDT 24 148453681 ps
T1113 /workspace/coverage/default/33.otp_ctrl_stress_all.1749025620 Mar 24 03:08:41 PM PDT 24 Mar 24 03:08:57 PM PDT 24 469590637 ps
T1114 /workspace/coverage/default/29.otp_ctrl_parallel_key_req.558406475 Mar 24 03:08:24 PM PDT 24 Mar 24 03:09:12 PM PDT 24 16939316986 ps
T1115 /workspace/coverage/default/61.otp_ctrl_parallel_lc_esc.2155491865 Mar 24 03:10:01 PM PDT 24 Mar 24 03:10:17 PM PDT 24 3377578875 ps
T1116 /workspace/coverage/default/154.otp_ctrl_init_fail.1263700770 Mar 24 03:11:05 PM PDT 24 Mar 24 03:11:08 PM PDT 24 185977920 ps
T1117 /workspace/coverage/default/191.otp_ctrl_parallel_lc_esc.2586814319 Mar 24 03:11:24 PM PDT 24 Mar 24 03:11:40 PM PDT 24 979688277 ps
T1118 /workspace/coverage/default/0.otp_ctrl_partition_walk.2578077979 Mar 24 03:06:41 PM PDT 24 Mar 24 03:07:02 PM PDT 24 312858196 ps
T1119 /workspace/coverage/default/0.otp_ctrl_stress_all_with_rand_reset.824490362 Mar 24 03:06:46 PM PDT 24 Mar 24 03:15:59 PM PDT 24 40623143334 ps
T1120 /workspace/coverage/default/27.otp_ctrl_parallel_key_req.2299575166 Mar 24 03:08:20 PM PDT 24 Mar 24 03:08:34 PM PDT 24 5002384184 ps
T1121 /workspace/coverage/default/82.otp_ctrl_stress_all_with_rand_reset.2996630422 Mar 24 03:10:20 PM PDT 24 Mar 24 03:19:58 PM PDT 24 102371858329 ps
T1122 /workspace/coverage/default/109.otp_ctrl_init_fail.2029921084 Mar 24 03:10:31 PM PDT 24 Mar 24 03:10:37 PM PDT 24 1619107162 ps
T1123 /workspace/coverage/default/66.otp_ctrl_init_fail.2332467336 Mar 24 03:10:04 PM PDT 24 Mar 24 03:10:09 PM PDT 24 1988843514 ps
T1124 /workspace/coverage/default/11.otp_ctrl_dai_lock.2274499616 Mar 24 03:07:16 PM PDT 24 Mar 24 03:07:31 PM PDT 24 478628399 ps
T1125 /workspace/coverage/default/18.otp_ctrl_dai_lock.884461041 Mar 24 03:07:42 PM PDT 24 Mar 24 03:07:48 PM PDT 24 440752989 ps
T1126 /workspace/coverage/default/114.otp_ctrl_parallel_lc_esc.3049327885 Mar 24 03:10:38 PM PDT 24 Mar 24 03:10:43 PM PDT 24 279244818 ps
T1127 /workspace/coverage/default/9.otp_ctrl_dai_lock.1509040584 Mar 24 03:07:07 PM PDT 24 Mar 24 03:07:27 PM PDT 24 2458284806 ps
T1128 /workspace/coverage/default/17.otp_ctrl_alert_test.891049479 Mar 24 03:07:38 PM PDT 24 Mar 24 03:07:40 PM PDT 24 116915535 ps
T1129 /workspace/coverage/default/13.otp_ctrl_alert_test.489749972 Mar 24 03:07:19 PM PDT 24 Mar 24 03:07:22 PM PDT 24 144219558 ps
T1130 /workspace/coverage/default/48.otp_ctrl_smoke.1566233138 Mar 24 03:09:37 PM PDT 24 Mar 24 03:09:42 PM PDT 24 232448113 ps
T1131 /workspace/coverage/default/29.otp_ctrl_dai_errs.1223095187 Mar 24 03:08:24 PM PDT 24 Mar 24 03:08:46 PM PDT 24 1124307667 ps
T1132 /workspace/coverage/default/6.otp_ctrl_init_fail.2069438122 Mar 24 03:07:03 PM PDT 24 Mar 24 03:07:08 PM PDT 24 382642432 ps
T1133 /workspace/coverage/default/46.otp_ctrl_init_fail.3410838049 Mar 24 03:09:28 PM PDT 24 Mar 24 03:09:32 PM PDT 24 112936389 ps
T1134 /workspace/coverage/default/18.otp_ctrl_parallel_lc_req.979198568 Mar 24 03:07:44 PM PDT 24 Mar 24 03:08:03 PM PDT 24 651108327 ps
T1135 /workspace/coverage/default/45.otp_ctrl_alert_test.1488917455 Mar 24 03:09:27 PM PDT 24 Mar 24 03:09:29 PM PDT 24 44405009 ps
T1136 /workspace/coverage/default/37.otp_ctrl_stress_all.3167939642 Mar 24 03:08:54 PM PDT 24 Mar 24 03:12:45 PM PDT 24 8802911621 ps
T1137 /workspace/coverage/default/30.otp_ctrl_parallel_lc_req.2752355267 Mar 24 03:08:24 PM PDT 24 Mar 24 03:08:49 PM PDT 24 2635435233 ps
T1138 /workspace/coverage/default/192.otp_ctrl_init_fail.1029741561 Mar 24 03:11:23 PM PDT 24 Mar 24 03:11:30 PM PDT 24 2050359626 ps
T1139 /workspace/coverage/default/25.otp_ctrl_check_fail.3601614457 Mar 24 03:08:07 PM PDT 24 Mar 24 03:08:14 PM PDT 24 231498165 ps
T1140 /workspace/coverage/default/39.otp_ctrl_init_fail.1805547772 Mar 24 03:09:00 PM PDT 24 Mar 24 03:09:08 PM PDT 24 2009582105 ps
T1141 /workspace/coverage/default/39.otp_ctrl_dai_lock.2539990746 Mar 24 03:09:02 PM PDT 24 Mar 24 03:09:29 PM PDT 24 1255806841 ps
T1142 /workspace/coverage/default/46.otp_ctrl_parallel_lc_esc.918653984 Mar 24 03:09:27 PM PDT 24 Mar 24 03:09:34 PM PDT 24 2343111233 ps
T148 /workspace/coverage/default/151.otp_ctrl_init_fail.3015698706 Mar 24 03:10:58 PM PDT 24 Mar 24 03:11:01 PM PDT 24 433193058 ps
T1143 /workspace/coverage/default/49.otp_ctrl_macro_errs.3105019318 Mar 24 03:09:43 PM PDT 24 Mar 24 03:10:06 PM PDT 24 5447737333 ps
T1144 /workspace/coverage/default/30.otp_ctrl_check_fail.2116728590 Mar 24 03:08:30 PM PDT 24 Mar 24 03:08:57 PM PDT 24 1302794304 ps
T1145 /workspace/coverage/default/38.otp_ctrl_parallel_lc_esc.3359288520 Mar 24 03:08:56 PM PDT 24 Mar 24 03:09:03 PM PDT 24 988779542 ps
T1146 /workspace/coverage/default/15.otp_ctrl_macro_errs.2127121248 Mar 24 03:07:30 PM PDT 24 Mar 24 03:07:49 PM PDT 24 1734793828 ps
T1147 /workspace/coverage/default/146.otp_ctrl_parallel_lc_esc.1162932308 Mar 24 03:10:59 PM PDT 24 Mar 24 03:11:35 PM PDT 24 9544988184 ps
T1148 /workspace/coverage/default/0.otp_ctrl_alert_test.1744831418 Mar 24 03:06:45 PM PDT 24 Mar 24 03:06:48 PM PDT 24 783123407 ps
T1149 /workspace/coverage/default/39.otp_ctrl_parallel_lc_esc.196349380 Mar 24 03:09:02 PM PDT 24 Mar 24 03:09:16 PM PDT 24 910464178 ps
T1150 /workspace/coverage/default/235.otp_ctrl_init_fail.2242731088 Mar 24 03:11:38 PM PDT 24 Mar 24 03:11:43 PM PDT 24 260529172 ps
T1151 /workspace/coverage/default/22.otp_ctrl_parallel_lc_req.1583117748 Mar 24 03:08:01 PM PDT 24 Mar 24 03:08:18 PM PDT 24 1873469849 ps
T1152 /workspace/coverage/default/12.otp_ctrl_smoke.3702107472 Mar 24 03:07:13 PM PDT 24 Mar 24 03:07:26 PM PDT 24 1782718182 ps
T1153 /workspace/coverage/default/12.otp_ctrl_alert_test.95652986 Mar 24 03:07:19 PM PDT 24 Mar 24 03:07:22 PM PDT 24 145420755 ps
T1154 /workspace/coverage/default/15.otp_ctrl_parallel_lc_req.4038048515 Mar 24 03:07:25 PM PDT 24 Mar 24 03:07:37 PM PDT 24 366726927 ps
T1155 /workspace/coverage/default/40.otp_ctrl_smoke.3735831587 Mar 24 03:09:06 PM PDT 24 Mar 24 03:09:10 PM PDT 24 420453997 ps
T1156 /workspace/coverage/default/22.otp_ctrl_smoke.48582520 Mar 24 03:07:53 PM PDT 24 Mar 24 03:08:14 PM PDT 24 1619187101 ps
T1157 /workspace/coverage/default/169.otp_ctrl_init_fail.1328064392 Mar 24 03:11:10 PM PDT 24 Mar 24 03:11:15 PM PDT 24 106894635 ps
T1158 /workspace/coverage/default/47.otp_ctrl_smoke.2131106397 Mar 24 03:09:36 PM PDT 24 Mar 24 03:09:40 PM PDT 24 224146023 ps
T1159 /workspace/coverage/default/91.otp_ctrl_init_fail.812563369 Mar 24 03:10:24 PM PDT 24 Mar 24 03:10:29 PM PDT 24 465520536 ps
T1160 /workspace/coverage/default/6.otp_ctrl_macro_errs.1486445664 Mar 24 03:07:00 PM PDT 24 Mar 24 03:07:34 PM PDT 24 2924573962 ps
T1161 /workspace/coverage/default/49.otp_ctrl_regwen.2131001070 Mar 24 03:09:45 PM PDT 24 Mar 24 03:10:02 PM PDT 24 4965882325 ps
T1162 /workspace/coverage/default/44.otp_ctrl_alert_test.1616617039 Mar 24 03:09:28 PM PDT 24 Mar 24 03:09:31 PM PDT 24 187672951 ps
T1163 /workspace/coverage/default/3.otp_ctrl_init_fail.3428162640 Mar 24 03:06:51 PM PDT 24 Mar 24 03:06:56 PM PDT 24 158579601 ps
T1164 /workspace/coverage/default/89.otp_ctrl_parallel_lc_esc.3350907228 Mar 24 03:10:22 PM PDT 24 Mar 24 03:10:27 PM PDT 24 326423181 ps
T1165 /workspace/coverage/default/42.otp_ctrl_macro_errs.2780715072 Mar 24 03:09:23 PM PDT 24 Mar 24 03:09:57 PM PDT 24 1767405621 ps
T1166 /workspace/coverage/default/8.otp_ctrl_regwen.1085718109 Mar 24 03:07:07 PM PDT 24 Mar 24 03:07:11 PM PDT 24 108729449 ps
T1167 /workspace/coverage/default/16.otp_ctrl_regwen.1633279430 Mar 24 03:07:32 PM PDT 24 Mar 24 03:07:40 PM PDT 24 265394500 ps
T1168 /workspace/coverage/default/82.otp_ctrl_init_fail.2395255926 Mar 24 03:10:17 PM PDT 24 Mar 24 03:10:22 PM PDT 24 106502445 ps
T1169 /workspace/coverage/default/0.otp_ctrl_smoke.3394764875 Mar 24 03:06:39 PM PDT 24 Mar 24 03:06:46 PM PDT 24 1076661462 ps
T1170 /workspace/coverage/default/25.otp_ctrl_macro_errs.1342100371 Mar 24 03:08:08 PM PDT 24 Mar 24 03:08:49 PM PDT 24 15297854725 ps
T1171 /workspace/coverage/default/7.otp_ctrl_dai_errs.1098697329 Mar 24 03:07:01 PM PDT 24 Mar 24 03:07:42 PM PDT 24 1640090281 ps
T1172 /workspace/coverage/default/33.otp_ctrl_check_fail.2592476898 Mar 24 03:08:40 PM PDT 24 Mar 24 03:08:57 PM PDT 24 641109206 ps
T1173 /workspace/coverage/default/12.otp_ctrl_stress_all_with_rand_reset.1148152361 Mar 24 03:07:17 PM PDT 24 Mar 24 03:33:59 PM PDT 24 765453926026 ps
T1174 /workspace/coverage/default/134.otp_ctrl_init_fail.4113419428 Mar 24 03:10:48 PM PDT 24 Mar 24 03:10:53 PM PDT 24 123555737 ps
T1175 /workspace/coverage/default/17.otp_ctrl_parallel_lc_req.2094259452 Mar 24 03:07:38 PM PDT 24 Mar 24 03:07:59 PM PDT 24 1048452579 ps
T1176 /workspace/coverage/default/41.otp_ctrl_test_access.4216338107 Mar 24 03:09:11 PM PDT 24 Mar 24 03:09:32 PM PDT 24 1068231664 ps
T1177 /workspace/coverage/default/7.otp_ctrl_regwen.1198754198 Mar 24 03:07:01 PM PDT 24 Mar 24 03:07:11 PM PDT 24 1134488344 ps
T1178 /workspace/coverage/default/3.otp_ctrl_stress_all_with_rand_reset.4042107946 Mar 24 03:06:52 PM PDT 24 Mar 24 03:17:56 PM PDT 24 53928720179 ps
T1179 /workspace/coverage/default/78.otp_ctrl_parallel_lc_esc.2187124056 Mar 24 03:10:18 PM PDT 24 Mar 24 03:10:35 PM PDT 24 4680216223 ps
T1180 /workspace/coverage/default/36.otp_ctrl_alert_test.693338742 Mar 24 03:08:52 PM PDT 24 Mar 24 03:08:54 PM PDT 24 74028516 ps
T1181 /workspace/coverage/default/186.otp_ctrl_parallel_lc_esc.1929866862 Mar 24 03:11:21 PM PDT 24 Mar 24 03:11:41 PM PDT 24 588621360 ps
T1182 /workspace/coverage/default/11.otp_ctrl_stress_all.2733911200 Mar 24 03:07:13 PM PDT 24 Mar 24 03:10:09 PM PDT 24 14137843724 ps
T1183 /workspace/coverage/default/31.otp_ctrl_test_access.1450743950 Mar 24 03:08:36 PM PDT 24 Mar 24 03:09:01 PM PDT 24 907722937 ps
T1184 /workspace/coverage/default/3.otp_ctrl_smoke.181916145 Mar 24 03:06:48 PM PDT 24 Mar 24 03:06:58 PM PDT 24 458131128 ps
T1185 /workspace/coverage/default/43.otp_ctrl_regwen.4107258778 Mar 24 03:09:30 PM PDT 24 Mar 24 03:09:39 PM PDT 24 2468576363 ps
T1186 /workspace/coverage/default/68.otp_ctrl_stress_all_with_rand_reset.1976242684 Mar 24 03:10:04 PM PDT 24 Mar 24 03:21:59 PM PDT 24 54514031984 ps
T279 /workspace/coverage/default/48.otp_ctrl_stress_all_with_rand_reset.2614484142 Mar 24 03:09:46 PM PDT 24 Mar 24 03:28:21 PM PDT 24 571814793811 ps
T280 /workspace/coverage/default/43.otp_ctrl_test_access.843531662 Mar 24 03:09:23 PM PDT 24 Mar 24 03:09:55 PM PDT 24 3268346801 ps
T1187 /workspace/coverage/default/49.otp_ctrl_parallel_lc_req.24054569 Mar 24 03:09:44 PM PDT 24 Mar 24 03:10:03 PM PDT 24 2398409154 ps
T1188 /workspace/coverage/default/49.otp_ctrl_smoke.93765894 Mar 24 03:09:47 PM PDT 24 Mar 24 03:09:53 PM PDT 24 372052536 ps
T1189 /workspace/coverage/default/7.otp_ctrl_alert_test.2617333401 Mar 24 03:07:03 PM PDT 24 Mar 24 03:07:05 PM PDT 24 57290692 ps
T1190 /workspace/coverage/default/183.otp_ctrl_parallel_lc_esc.1364075726 Mar 24 03:11:16 PM PDT 24 Mar 24 03:11:36 PM PDT 24 6964118995 ps
T1191 /workspace/coverage/default/7.otp_ctrl_stress_all_with_rand_reset.2322543382 Mar 24 03:07:02 PM PDT 24 Mar 24 03:37:39 PM PDT 24 93755732761 ps
T266 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.3254825982 Mar 24 12:49:18 PM PDT 24 Mar 24 12:49:23 PM PDT 24 82202728 ps
T267 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.2949571717 Mar 24 12:49:21 PM PDT 24 Mar 24 12:49:32 PM PDT 24 1729330752 ps
T263 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.2252512885 Mar 24 12:49:20 PM PDT 24 Mar 24 12:49:31 PM PDT 24 769819889 ps
T268 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_rw.1195845738 Mar 24 12:49:34 PM PDT 24 Mar 24 12:49:35 PM PDT 24 149897803 ps
T264 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.556537544 Mar 24 12:49:35 PM PDT 24 Mar 24 12:49:45 PM PDT 24 651472270 ps
T1192 /workspace/coverage/cover_reg_top/5.otp_ctrl_intr_test.2424041589 Mar 24 12:49:19 PM PDT 24 Mar 24 12:49:21 PM PDT 24 41629327 ps
T1193 /workspace/coverage/cover_reg_top/45.otp_ctrl_intr_test.4063564282 Mar 24 12:49:36 PM PDT 24 Mar 24 12:49:37 PM PDT 24 71982025 ps
T1194 /workspace/coverage/cover_reg_top/40.otp_ctrl_intr_test.2557188690 Mar 24 12:49:36 PM PDT 24 Mar 24 12:49:38 PM PDT 24 143159915 ps
T303 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_rw.553004024 Mar 24 12:49:25 PM PDT 24 Mar 24 12:49:28 PM PDT 24 616521326 ps
T1195 /workspace/coverage/cover_reg_top/16.otp_ctrl_intr_test.3336802864 Mar 24 12:49:26 PM PDT 24 Mar 24 12:49:28 PM PDT 24 78719883 ps
T1196 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_errors.3993857993 Mar 24 12:49:33 PM PDT 24 Mar 24 12:49:36 PM PDT 24 101327323 ps
T281 /workspace/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.372649008 Mar 24 12:49:24 PM PDT 24 Mar 24 12:49:27 PM PDT 24 55759109 ps
T1197 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.3542658375 Mar 24 12:49:30 PM PDT 24 Mar 24 12:49:33 PM PDT 24 132421980 ps
T1198 /workspace/coverage/cover_reg_top/14.otp_ctrl_intr_test.255936707 Mar 24 12:49:30 PM PDT 24 Mar 24 12:49:33 PM PDT 24 560513109 ps
T1199 /workspace/coverage/cover_reg_top/47.otp_ctrl_intr_test.3811052348 Mar 24 12:49:35 PM PDT 24 Mar 24 12:49:37 PM PDT 24 71891330 ps
T1200 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_errors.2055229864 Mar 24 12:49:31 PM PDT 24 Mar 24 12:49:36 PM PDT 24 525409079 ps
T1201 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.2233186228 Mar 24 12:49:25 PM PDT 24 Mar 24 12:49:28 PM PDT 24 534723580 ps
T1202 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.1307099647 Mar 24 12:49:19 PM PDT 24 Mar 24 12:49:21 PM PDT 24 146456036 ps
T304 /workspace/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.3043486101 Mar 24 12:49:20 PM PDT 24 Mar 24 12:49:23 PM PDT 24 71182026 ps
T265 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.1058974683 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:47 PM PDT 24 6302230037 ps
T1203 /workspace/coverage/cover_reg_top/30.otp_ctrl_intr_test.2712915811 Mar 24 12:49:32 PM PDT 24 Mar 24 12:49:34 PM PDT 24 525253802 ps
T1204 /workspace/coverage/cover_reg_top/33.otp_ctrl_intr_test.1419144720 Mar 24 12:49:33 PM PDT 24 Mar 24 12:49:35 PM PDT 24 42349184 ps
T328 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.418214238 Mar 24 12:49:25 PM PDT 24 Mar 24 12:49:37 PM PDT 24 1243046296 ps
T1205 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.4283578410 Mar 24 12:49:32 PM PDT 24 Mar 24 12:49:34 PM PDT 24 47082973 ps
T1206 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.608146507 Mar 24 12:49:21 PM PDT 24 Mar 24 12:49:24 PM PDT 24 1071780441 ps
T1207 /workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.3355379687 Mar 24 12:49:38 PM PDT 24 Mar 24 12:49:40 PM PDT 24 620832954 ps
T1208 /workspace/coverage/cover_reg_top/10.otp_ctrl_intr_test.2828017955 Mar 24 12:49:30 PM PDT 24 Mar 24 12:49:31 PM PDT 24 41829754 ps
T283 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.2238468364 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:30 PM PDT 24 568285042 ps
T1209 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.653166659 Mar 24 12:49:18 PM PDT 24 Mar 24 12:49:20 PM PDT 24 545392709 ps
T329 /workspace/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.435695873 Mar 24 12:49:29 PM PDT 24 Mar 24 12:49:40 PM PDT 24 1225161048 ps
T305 /workspace/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.2775378782 Mar 24 12:49:17 PM PDT 24 Mar 24 12:49:20 PM PDT 24 68619681 ps
T306 /workspace/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.4012404788 Mar 24 12:49:31 PM PDT 24 Mar 24 12:49:34 PM PDT 24 165014542 ps
T1210 /workspace/coverage/cover_reg_top/7.otp_ctrl_intr_test.390207101 Mar 24 12:49:21 PM PDT 24 Mar 24 12:49:24 PM PDT 24 45207696 ps
T334 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.939794905 Mar 24 12:49:18 PM PDT 24 Mar 24 12:49:38 PM PDT 24 2404922778 ps
T1211 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_rw.303906830 Mar 24 12:49:24 PM PDT 24 Mar 24 12:49:26 PM PDT 24 150593122 ps
T1212 /workspace/coverage/cover_reg_top/44.otp_ctrl_intr_test.3172532471 Mar 24 12:49:35 PM PDT 24 Mar 24 12:49:37 PM PDT 24 146238168 ps
T307 /workspace/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.226352773 Mar 24 12:49:20 PM PDT 24 Mar 24 12:49:24 PM PDT 24 1643079359 ps
T1213 /workspace/coverage/cover_reg_top/2.otp_ctrl_intr_test.3321152521 Mar 24 12:49:18 PM PDT 24 Mar 24 12:49:20 PM PDT 24 41132972 ps
T1214 /workspace/coverage/cover_reg_top/41.otp_ctrl_intr_test.3363617301 Mar 24 12:49:28 PM PDT 24 Mar 24 12:49:30 PM PDT 24 40600238 ps
T1215 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.3408086805 Mar 24 12:49:20 PM PDT 24 Mar 24 12:49:27 PM PDT 24 279974117 ps
T308 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_rw.3056115398 Mar 24 12:49:24 PM PDT 24 Mar 24 12:49:27 PM PDT 24 44118998 ps
T309 /workspace/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.2339551669 Mar 24 12:49:23 PM PDT 24 Mar 24 12:49:27 PM PDT 24 1035964351 ps
T284 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_rw.4271678688 Mar 24 12:49:30 PM PDT 24 Mar 24 12:49:32 PM PDT 24 142707687 ps
T310 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_rw.2779690885 Mar 24 12:49:21 PM PDT 24 Mar 24 12:49:24 PM PDT 24 136340655 ps
T1216 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.3697900775 Mar 24 12:49:30 PM PDT 24 Mar 24 12:49:33 PM PDT 24 94207403 ps
T1217 /workspace/coverage/cover_reg_top/4.otp_ctrl_intr_test.4091075700 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:25 PM PDT 24 41234048 ps
T1218 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.3855327945 Mar 24 12:49:21 PM PDT 24 Mar 24 12:49:25 PM PDT 24 205949274 ps
T1219 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_rw.2754251369 Mar 24 12:49:26 PM PDT 24 Mar 24 12:49:29 PM PDT 24 74923361 ps
T1220 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_errors.3067836366 Mar 24 12:49:28 PM PDT 24 Mar 24 12:49:31 PM PDT 24 159904112 ps
T1221 /workspace/coverage/cover_reg_top/29.otp_ctrl_intr_test.1834522324 Mar 24 12:49:31 PM PDT 24 Mar 24 12:49:33 PM PDT 24 71487797 ps
T1222 /workspace/coverage/cover_reg_top/3.otp_ctrl_intr_test.790411499 Mar 24 12:49:21 PM PDT 24 Mar 24 12:49:23 PM PDT 24 535091747 ps
T1223 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.3724120419 Mar 24 12:49:28 PM PDT 24 Mar 24 12:49:32 PM PDT 24 385301328 ps
T1224 /workspace/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.2905617998 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:25 PM PDT 24 52283800 ps
T1225 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.907181743 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:27 PM PDT 24 1096598356 ps
T1226 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_errors.1958257765 Mar 24 12:49:30 PM PDT 24 Mar 24 12:49:36 PM PDT 24 192773339 ps
T1227 /workspace/coverage/cover_reg_top/34.otp_ctrl_intr_test.1797276831 Mar 24 12:49:33 PM PDT 24 Mar 24 12:49:34 PM PDT 24 50125733 ps
T1228 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_errors.1581839872 Mar 24 12:49:10 PM PDT 24 Mar 24 12:49:16 PM PDT 24 66903453 ps
T332 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.1506351271 Mar 24 12:49:25 PM PDT 24 Mar 24 12:49:51 PM PDT 24 2013181917 ps
T290 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.3645446448 Mar 24 12:49:25 PM PDT 24 Mar 24 12:49:29 PM PDT 24 69077819 ps
T1229 /workspace/coverage/cover_reg_top/6.otp_ctrl_intr_test.2234188999 Mar 24 12:49:20 PM PDT 24 Mar 24 12:49:22 PM PDT 24 37117464 ps
T1230 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.1241260909 Mar 24 12:49:23 PM PDT 24 Mar 24 12:49:28 PM PDT 24 385427775 ps
T1231 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.3304511994 Mar 24 12:49:31 PM PDT 24 Mar 24 12:49:35 PM PDT 24 1078736582 ps
T1232 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_walk.146024700 Mar 24 12:49:19 PM PDT 24 Mar 24 12:49:21 PM PDT 24 39642161 ps
T1233 /workspace/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.1359109555 Mar 24 12:49:25 PM PDT 24 Mar 24 12:49:31 PM PDT 24 1460401930 ps
T1234 /workspace/coverage/cover_reg_top/28.otp_ctrl_intr_test.2997316460 Mar 24 12:49:34 PM PDT 24 Mar 24 12:49:36 PM PDT 24 92199345 ps
T1235 /workspace/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.2647781175 Mar 24 12:49:29 PM PDT 24 Mar 24 12:49:32 PM PDT 24 81653241 ps
T1236 /workspace/coverage/cover_reg_top/12.otp_ctrl_intr_test.1639264777 Mar 24 12:49:30 PM PDT 24 Mar 24 12:49:32 PM PDT 24 557045047 ps
T1237 /workspace/coverage/cover_reg_top/38.otp_ctrl_intr_test.175033137 Mar 24 12:49:31 PM PDT 24 Mar 24 12:49:33 PM PDT 24 145206487 ps
T1238 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.967954632 Mar 24 12:49:19 PM PDT 24 Mar 24 12:49:25 PM PDT 24 463805017 ps
T285 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.1225788829 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:25 PM PDT 24 95988612 ps
T1239 /workspace/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.3772643955 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:25 PM PDT 24 161800562 ps
T1240 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_walk.1473657835 Mar 24 12:49:23 PM PDT 24 Mar 24 12:49:26 PM PDT 24 140295801 ps
T291 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.2239684140 Mar 24 12:49:18 PM PDT 24 Mar 24 12:49:21 PM PDT 24 396961745 ps
T286 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_rw.1004865963 Mar 24 12:49:25 PM PDT 24 Mar 24 12:49:28 PM PDT 24 43258721 ps
T1241 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_walk.1649403566 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:24 PM PDT 24 38148821 ps
T1242 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.175878052 Mar 24 12:49:27 PM PDT 24 Mar 24 12:49:29 PM PDT 24 66725773 ps
T333 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.203015480 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:42 PM PDT 24 1282370189 ps
T1243 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_errors.1664231643 Mar 24 12:49:19 PM PDT 24 Mar 24 12:49:24 PM PDT 24 70028564 ps
T1244 /workspace/coverage/cover_reg_top/32.otp_ctrl_intr_test.3997173054 Mar 24 12:49:32 PM PDT 24 Mar 24 12:49:34 PM PDT 24 38061552 ps
T1245 /workspace/coverage/cover_reg_top/37.otp_ctrl_intr_test.3279855756 Mar 24 12:49:34 PM PDT 24 Mar 24 12:49:35 PM PDT 24 77498938 ps
T269 /workspace/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.1449263347 Mar 24 12:49:28 PM PDT 24 Mar 24 12:49:47 PM PDT 24 4941294891 ps
T1246 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_errors.309423942 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:28 PM PDT 24 131543683 ps
T1247 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.1860023473 Mar 24 12:49:26 PM PDT 24 Mar 24 12:49:38 PM PDT 24 10454664758 ps
T1248 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.2539517495 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:27 PM PDT 24 115063206 ps
T331 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.838560461 Mar 24 12:49:28 PM PDT 24 Mar 24 12:49:41 PM PDT 24 1275024374 ps
T1249 /workspace/coverage/cover_reg_top/15.otp_ctrl_tl_errors.2758233100 Mar 24 12:49:24 PM PDT 24 Mar 24 12:49:33 PM PDT 24 2334773803 ps
T1250 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_walk.792702108 Mar 24 12:49:22 PM PDT 24 Mar 24 12:49:25 PM PDT 24 535071135 ps
T1251 /workspace/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.3004624281 Mar 24 12:49:29 PM PDT 24 Mar 24 12:49:32 PM PDT 24 775628483 ps
T1252 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.1371418139 Mar 24 12:49:29 PM PDT 24 Mar 24 12:49:33 PM PDT 24 225393943 ps
T1253 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.2931408051 Mar 24 12:49:25 PM PDT 24 Mar 24 12:49:31 PM PDT 24 406642760 ps
T1254 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_errors.3566143629 Mar 24 12:49:28 PM PDT 24 Mar 24 12:49:34 PM PDT 24 245583500 ps
T1255 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_errors.4047791391 Mar 24 12:49:26 PM PDT 24 Mar 24 12:49:32 PM PDT 24 255710172 ps
T330 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.2086095635 Mar 24 12:49:28 PM PDT 24 Mar 24 12:49:47 PM PDT 24 5013864399 ps
T1256 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.1892436741 Mar 24 12:49:18 PM PDT 24 Mar 24 12:49:25 PM PDT 24 874218468 ps
T1257 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.4049477442 Mar 24 12:49:21 PM PDT 24 Mar 24 12:49:25 PM PDT 24 283553067 ps
T1258 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.498832708 Mar 24 12:49:17 PM PDT 24 Mar 24 12:49:20 PM PDT 24 216990233 ps
T287 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_rw.185338484 Mar 24 12:49:25 PM PDT 24 Mar 24 12:49:28 PM PDT 24 588891530 ps
T1259 /workspace/coverage/cover_reg_top/48.otp_ctrl_intr_test.1646294941 Mar 24 12:49:36 PM PDT 24 Mar 24 12:49:38 PM PDT 24 69232262 ps
T1260 /workspace/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.2146932888 Mar 24 12:49:32 PM PDT 24 Mar 24 12:49:36 PM PDT 24 132542798 ps
T288 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.552142307 Mar 24 12:49:29 PM PDT 24 Mar 24 12:49:35 PM PDT 24 297912363 ps
T1261 /workspace/coverage/cover_reg_top/18.otp_ctrl_intr_test.2072193345 Mar 24 12:49:32 PM PDT 24 Mar 24 12:49:34 PM PDT 24 43222336 ps
T1262 /workspace/coverage/cover_reg_top/13.otp_ctrl_intr_test.819754291 Mar 24 12:49:27 PM PDT 24 Mar 24 12:49:29 PM PDT 24 73292677 ps
T1263 /workspace/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.86379785 Mar 24 12:49:19 PM PDT 24 Mar 24 12:49:23 PM PDT 24 77629710 ps
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