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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10007 1 T1 9 T2 3 T3 2
true 16358 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10877 1 T1 10 T2 3 T3 2
true 16420 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T36 4 T98 2 T131 2
others[1] 120 1 T42 2 T36 2 T100 2
others[2] 100 1 T101 2 T120 2 T121 2
others[3] 98 1 T36 6 T99 2 T103 2
others[4] 90 1 T42 2 T36 2 T103 2
others[5] 90 1 T36 2 T160 2 T97 2
others[6] 98 1 T98 2 T99 2 T101 2
others[7] 114 1 T10 2 T97 2 T98 2
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T100 2 T101 2 T104 2
others[1] 68 1 T103 2 T122 2 T386 2
others[2] 80 1 T1 2 T121 2 T122 2
others[3] 82 1 T36 10 T99 2 T204 2
others[4] 84 1 T10 2 T35 2 T36 6
others[5] 90 1 T42 2 T36 2 T97 2
others[6] 108 1 T36 4 T101 2 T121 4
others[7] 86 1 T36 2 T120 2 T259 2
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T26 2 T97 2 T121 2
others[1] 70 1 T259 2 T89 2 T223 2
others[2] 102 1 T259 4 T152 4 T387 2
others[3] 94 1 T42 2 T36 2 T277 2
others[4] 88 1 T102 4 T36 2 T101 4
others[5] 106 1 T36 2 T101 6 T122 2
others[6] 60 1 T120 2 T121 4 T259 2
others[7] 102 1 T36 2 T97 2 T101 2
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T110 2 T26 2 T97 2
others[1] 62 1 T100 2 T101 4 T131 2
others[2] 74 1 T97 2 T131 2 T229 2
others[3] 62 1 T36 2 T121 2 T223 4
others[4] 74 1 T36 2 T100 2 T121 4
others[5] 62 1 T36 2 T101 2 T131 2
others[6] 42 1 T102 2 T37 2 T122 2
others[7] 82 1 T10 2 T102 2 T36 4
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T36 2 T259 2 T73 2
others[1] 102 1 T160 2 T99 4 T103 2
others[2] 76 1 T36 2 T121 2 T259 2
others[3] 94 1 T15 2 T36 2 T131 2
others[4] 90 1 T25 2 T36 2 T101 2
others[5] 86 1 T111 2 T36 2 T121 6
others[6] 80 1 T10 2 T36 2 T122 2
others[7] 108 1 T1 2 T102 2 T101 4
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 26 1 T70 2 T388 2 T305 2
others[1] 16 1 T235 2 T389 4 T390 2
others[2] 24 1 T104 2 T70 2 T305 2
others[3] 30 1 T305 2 T391 2 T361 4
others[4] 26 1 T223 2 T392 2 T393 2
others[5] 30 1 T36 2 T121 2 T96 2
others[6] 42 1 T121 2 T221 2 T222 2
others[7] 28 1 T42 2 T101 2 T204 4
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T36 2 T121 2 T259 2
others[1] 96 1 T36 4 T100 2 T101 2
others[2] 96 1 T36 2 T104 2 T152 4
others[3] 94 1 T10 2 T15 2 T36 4
others[4] 88 1 T1 2 T35 2 T36 4
others[5] 76 1 T101 2 T131 2 T120 2
others[6] 84 1 T42 2 T36 2 T99 2
others[7] 100 1 T15 2 T36 2 T97 2
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T98 2 T101 2 T104 4
others[1] 90 1 T15 2 T121 4 T152 4
others[2] 104 1 T36 4 T100 2 T101 2
others[3] 96 1 T36 2 T104 2 T121 2
others[4] 102 1 T42 2 T15 2 T131 2
others[5] 90 1 T131 2 T152 2 T89 2
others[6] 102 1 T1 2 T36 4 T104 2
others[7] 104 1 T10 2 T98 2 T103 2
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T42 2 T36 4 T97 2
others[1] 92 1 T121 8 T222 2 T394 2
others[2] 90 1 T35 2 T36 2 T221 2
others[3] 90 1 T36 2 T26 2 T131 2
others[4] 82 1 T10 2 T36 2 T100 2
others[5] 68 1 T42 2 T104 2 T152 2
others[6] 92 1 T10 2 T26 2 T121 2
others[7] 106 1 T1 2 T36 2 T98 2
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T1 2 T98 2 T100 2
others[1] 102 1 T36 2 T26 2 T101 2
others[2] 70 1 T42 2 T229 2 T386 2
others[3] 88 1 T102 2 T37 2 T96 2
others[4] 82 1 T101 4 T122 2 T386 2
others[5] 86 1 T42 2 T36 2 T97 2
others[6] 84 1 T36 4 T100 2 T121 2
others[7] 124 1 T10 2 T35 2 T15 2
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 112 1 T1 2 T111 2 T37 2
others[1] 76 1 T98 2 T101 2 T204 2
others[2] 106 1 T36 4 T259 2 T152 2
others[3] 100 1 T36 6 T97 2 T103 2
others[4] 120 1 T97 2 T101 4 T131 2
others[5] 70 1 T1 2 T36 2 T120 2
others[6] 90 1 T36 4 T101 2 T120 2
others[7] 100 1 T36 4 T101 6 T120 2
false 13947 1 T1 14 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 33 1 T36 2 T13 1 T271 1
others[1] 28 1 T226 2 T24 1 T212 1
others[2] 39 1 T6 1 T13 1 T24 1
others[3] 28 1 T6 1 T34 1 T131 2
others[4] 34 1 T6 1 T34 1 T144 1
others[5] 23 1 T6 1 T34 1 T223 2
others[6] 30 1 T13 1 T24 1 T271 1
others[7] 46 1 T6 1 T13 1 T14 1
false 13947 1 T1 14 T2 3 T3 4
true 2260 1 T1 6 T3 1 T10 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 30 1 T271 1 T144 1 T223 2
others[1] 38 1 T14 1 T24 2 T34 1
others[2] 28 1 T6 1 T271 2 T152 2
others[3] 38 1 T13 1 T101 2 T212 1
others[4] 36 1 T6 1 T24 2 T254 1
others[5] 32 1 T13 2 T226 2 T34 2
others[6] 28 1 T6 2 T13 1 T34 1
others[7] 31 1 T6 1 T36 2 T24 1
false 11358 1 T1 10 T2 3 T3 2
true 18633 1 T1 20 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 124 1 T101 2 T104 2 T229 2
others[1] 118 1 T36 2 T160 2 T103 2
others[2] 52 1 T36 2 T98 2 T120 2
others[3] 94 1 T42 2 T36 2 T99 2
others[4] 124 1 T42 2 T36 2 T98 2
others[5] 106 1 T36 2 T98 2 T100 2
others[6] 86 1 T10 2 T36 4 T97 2
others[7] 106 1 T36 2 T97 2 T101 2
false 7626 1 T1 2 T2 3 T3 2
true 16476 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T42 2 T36 2 T100 2
others[1] 98 1 T36 4 T26 2 T100 2
others[2] 76 1 T36 2 T99 2 T120 2
others[3] 78 1 T1 2 T36 6 T104 2
others[4] 94 1 T103 2 T121 2 T259 2
others[5] 70 1 T36 4 T101 2 T121 4
others[6] 82 1 T36 6 T121 2 T122 2
others[7] 86 1 T10 2 T35 2 T97 2
false 6837 1 T1 3 T2 3 T3 1
true 16235 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T36 2 T101 2 T121 4
others[1] 100 1 T42 2 T102 2 T152 4
others[2] 76 1 T26 2 T89 2 T395 2
others[3] 76 1 T36 2 T101 2 T104 2
others[4] 100 1 T102 2 T36 2 T101 4
others[5] 76 1 T97 2 T101 2 T120 2
others[6] 76 1 T97 2 T70 2 T396 2
others[7] 98 1 T36 2 T101 2 T121 2
false 7142 1 T1 3 T2 3 T3 1
true 16259 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 32 1 T13 1 T24 1 T259 2
others[1] 30 1 T6 1 T24 1 T271 2
others[2] 38 1 T6 1 T13 1 T152 2
others[3] 26 1 T36 2 T24 2 T121 2
others[4] 45 1 T6 1 T13 2 T24 1
others[5] 32 1 T35 2 T6 2 T14 1
others[6] 40 1 T14 1 T24 1 T271 2
others[7] 48 1 T6 1 T24 1 T272 1
false 11289 1 T1 10 T2 3 T3 2
true 18589 1 T1 19 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 58 1 T102 2 T36 2 T103 2
others[1] 72 1 T10 2 T102 2 T36 2
others[2] 76 1 T122 2 T223 6 T77 2
others[3] 62 1 T36 2 T97 2 T101 2
others[4] 46 1 T100 2 T131 2 T152 2
others[5] 58 1 T26 2 T101 2 T121 2
others[6] 70 1 T110 2 T131 2 T121 2
others[7] 88 1 T36 4 T97 2 T37 2
false 8666 1 T1 10 T2 3 T3 1
true 16443 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T121 2 T96 2 T207 2
others[1] 43 1 T35 2 T6 2 T13 1
others[2] 33 1 T6 1 T24 1 T259 2
others[3] 33 1 T36 2 T34 1 T271 2
others[4] 28 1 T6 1 T24 1 T101 2
others[5] 25 1 T14 2 T254 1 T397 1
others[6] 32 1 T6 2 T14 2 T34 1
others[7] 37 1 T357 1 T397 1 T348 2
false 11227 1 T1 10 T2 3 T3 2
true 18552 1 T1 19 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T36 4 T99 2 T101 2
others[1] 80 1 T25 2 T131 2 T104 2
others[2] 84 1 T1 2 T36 6 T99 2
others[3] 92 1 T101 2 T104 2 T121 2
others[4] 76 1 T121 2 T152 2 T223 2
others[5] 70 1 T103 2 T101 2 T121 2
others[6] 94 1 T102 2 T160 2 T259 2
others[7] 112 1 T10 2 T15 2 T111 2
false 7523 1 T1 3 T2 3 T3 1
true 16386 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 37 1 T10 2 T24 1 T254 2
others[1] 31 1 T10 2 T14 1 T24 1
others[2] 31 1 T6 1 T271 2 T272 1
others[3] 32 1 T24 3 T121 2 T271 3
others[4] 33 1 T6 3 T13 2 T152 2
others[5] 28 1 T24 2 T34 1 T272 1
others[6] 36 1 T24 1 T271 2 T254 1
others[7] 31 1 T6 1 T13 1 T254 2
false 11181 1 T1 10 T2 3 T3 2
true 18525 1 T1 19 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T96 2 T70 2 T398 2
others[1] 22 1 T70 2 T399 2 T400 2
others[2] 40 1 T388 2 T392 2 T305 6
others[3] 18 1 T36 2 T121 2 T70 2
others[4] 28 1 T70 6 T393 2 T389 2
others[5] 24 1 T104 2 T222 2 T401 2
others[6] 34 1 T42 2 T101 2 T204 2
others[7] 28 1 T204 2 T223 2 T400 2
false 9814 1 T1 2 T2 3 T3 2
true 16444 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T36 2 T101 2 T229 2
others[1] 106 1 T36 2 T120 2 T204 2
others[2] 80 1 T10 2 T35 2 T36 2
others[3] 92 1 T15 2 T36 4 T121 6
others[4] 78 1 T36 4 T221 2 T152 2
others[5] 74 1 T42 2 T100 2 T101 2
others[6] 90 1 T1 2 T36 2 T97 2
others[7] 86 1 T15 2 T36 4 T101 4
false 6926 1 T1 2 T2 3 T3 1
true 16246 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T42 2 T15 2 T101 2
others[1] 80 1 T1 2 T100 2 T101 2
others[2] 80 1 T10 2 T101 2 T152 2
others[3] 108 1 T15 2 T36 2 T120 2
others[4] 108 1 T36 2 T131 4 T402 2
others[5] 80 1 T98 4 T103 2 T104 2
others[6] 122 1 T36 4 T101 2 T104 2
others[7] 96 1 T36 2 T104 2 T121 4
false 6926 1 T1 2 T2 3 T3 1
true 16246 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T35 2 T36 2 T26 2
others[1] 92 1 T42 2 T101 2 T122 2
others[2] 90 1 T36 2 T104 2 T121 6
others[3] 74 1 T10 2 T36 2 T101 2
others[4] 88 1 T1 2 T97 2 T100 2
others[5] 78 1 T26 2 T121 6 T259 2
others[6] 84 1 T10 2 T36 4 T121 2
others[7] 90 1 T42 2 T36 2 T98 2
false 6370 1 T1 2 T2 2 T3 1
true 16236 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T102 2 T36 2 T99 2
others[1] 86 1 T35 2 T15 2 T131 2
others[2] 74 1 T100 2 T101 2 T229 2
others[3] 112 1 T98 2 T131 2 T259 2
others[4] 78 1 T98 2 T101 6 T121 2
others[5] 88 1 T26 2 T97 2 T100 2
others[6] 90 1 T10 2 T36 4 T97 2
others[7] 104 1 T1 2 T42 4 T36 2
false 6370 1 T1 2 T2 2 T3 1
true 16236 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T36 2 T101 2 T121 2
others[1] 54 1 T15 2 T121 2 T259 2
others[2] 68 1 T120 2 T121 2 T259 2
others[3] 74 1 T104 2 T121 2 T259 2
others[4] 72 1 T36 6 T101 2 T104 2
others[5] 56 1 T97 2 T101 2 T121 4
others[6] 62 1 T36 4 T204 2 T122 2
others[7] 52 1 T36 2 T394 2 T89 2
false 6857 1 T1 6 T2 2 T3 2
true 17636 1 T1 19 T2 4 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T204 2 T259 4 T402 2
others[1] 40 1 T36 2 T97 2 T121 2
others[2] 66 1 T36 2 T26 2 T152 2
others[3] 60 1 T97 2 T101 2 T223 2
others[4] 44 1 T15 2 T36 2 T100 2
others[5] 70 1 T120 2 T121 2 T259 2
others[6] 80 1 T101 4 T104 2 T259 2
others[7] 58 1 T36 6 T101 2 T121 2
false 6857 1 T1 6 T2 2 T3 2
true 17636 1 T1 19 T2 4 T3 6


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T6 1 T14 1 T34 1
others[1] 22 1 T6 1 T14 1 T134 1
others[2] 31 1 T212 1 T271 1 T254 1
others[3] 37 1 T109 2 T13 1 T24 1
others[4] 36 1 T24 2 T152 2 T397 1
others[5] 32 1 T13 1 T24 1 T34 1
others[6] 17 1 T14 1 T271 1 T357 1
others[7] 42 1 T212 2 T271 1 T272 2
false 11425 1 T1 10 T2 3 T3 2
true 18697 1 T1 20 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T1 2 T103 2 T101 2
others[1] 94 1 T1 2 T36 2 T101 2
others[2] 86 1 T36 2 T97 2 T101 2
others[3] 96 1 T36 6 T120 2 T121 6
others[4] 88 1 T36 4 T104 2 T121 2
others[5] 106 1 T36 2 T37 2 T101 4
others[6] 80 1 T36 2 T101 2 T131 2
others[7] 132 1 T111 2 T36 2 T97 2
false 7603 1 T1 2 T2 3 T3 1
true 16439 1 T1 14 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 45 1 T13 2 T14 1 T259 2
others[1] 42 1 T14 1 T121 2 T271 1
others[2] 26 1 T36 2 T152 2 T272 1
others[3] 45 1 T6 2 T13 1 T24 2
others[4] 27 1 T6 2 T24 1 T271 1
others[5] 31 1 T6 1 T34 1 T271 1
others[6] 33 1 T35 2 T24 3 T272 1
others[7] 40 1 T6 1 T13 1 T24 2
false 13947 1 T1 14 T2 3 T3 4
true 2275 1 T1 5 T2 1 T3 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%