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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10305 1 T1 2 T2 5 T3 21
true 16838 1 T1 4 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11207 1 T1 3 T2 6 T3 23
true 16898 1 T1 5 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 50 1 T11 2 T92 2 T93 2
others[1] 98 1 T91 2 T63 2 T103 2
others[2] 78 1 T11 2 T99 2 T101 2
others[3] 92 1 T240 2 T129 4 T357 2
others[4] 80 1 T33 6 T63 2 T209 2
others[5] 102 1 T92 2 T129 2 T289 2
others[6] 90 1 T32 2 T23 2 T91 2
others[7] 96 1 T2 2 T24 4 T92 2
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 112 1 T63 4 T94 4 T129 2
others[1] 90 1 T24 2 T399 4 T129 4
others[2] 74 1 T94 2 T129 2 T357 2
others[3] 62 1 T24 2 T130 2 T400 2
others[4] 80 1 T24 2 T102 2 T93 4
others[5] 80 1 T96 2 T129 2 T130 2
others[6] 64 1 T23 2 T63 2 T130 2
others[7] 78 1 T101 2 T91 2 T63 2
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 62 1 T63 2 T129 2 T357 2
others[1] 76 1 T23 2 T24 2 T95 2
others[2] 66 1 T23 2 T63 2 T129 2
others[3] 92 1 T63 6 T76 2 T96 2
others[4] 112 1 T33 2 T116 2 T94 2
others[5] 116 1 T32 2 T63 4 T94 2
others[6] 112 1 T23 2 T101 2 T63 4
others[7] 94 1 T24 2 T92 2 T289 2
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 50 1 T63 2 T209 2 T129 2
others[1] 76 1 T23 2 T93 2 T94 2
others[2] 68 1 T91 4 T93 2 T63 6
others[3] 40 1 T99 2 T93 2 T94 2
others[4] 46 1 T63 2 T103 2 T129 2
others[5] 54 1 T91 2 T94 2 T129 4
others[6] 40 1 T91 2 T116 2 T209 2
others[7] 68 1 T91 2 T63 2 T96 2
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T33 2 T208 2 T129 2
others[1] 108 1 T33 2 T63 2 T94 2
others[2] 86 1 T32 4 T94 4 T96 2
others[3] 74 1 T95 2 T399 2 T401 2
others[4] 96 1 T32 2 T63 2 T94 2
others[5] 74 1 T23 2 T101 2 T133 4
others[6] 96 1 T94 2 T244 2 T129 4
others[7] 110 1 T63 4 T94 2 T96 2
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T63 2 T130 2 T402 2
others[1] 52 1 T92 2 T94 2 T129 4
others[2] 40 1 T130 4 T403 2 T72 2
others[3] 40 1 T208 2 T129 2 T403 2
others[4] 58 1 T92 2 T359 4 T255 2
others[5] 38 1 T101 2 T239 2 T240 2
others[6] 52 1 T24 2 T402 2 T404 2
others[7] 50 1 T24 2 T63 2 T129 2
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 70 1 T23 2 T94 4 T129 2
others[1] 68 1 T92 2 T93 2 T130 2
others[2] 88 1 T11 2 T32 2 T94 2
others[3] 90 1 T92 2 T129 2 T289 2
others[4] 70 1 T63 4 T209 2 T399 2
others[5] 54 1 T23 2 T92 2 T63 2
others[6] 62 1 T94 2 T96 2 T209 2
others[7] 100 1 T24 2 T63 2 T94 2
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T24 2 T101 2 T399 2
others[1] 76 1 T91 2 T63 4 T94 2
others[2] 96 1 T91 2 T63 2 T94 2
others[3] 101 1 T23 2 T93 2 T63 2
others[4] 88 1 T92 2 T399 2 T129 2
others[5] 84 1 T101 2 T209 2 T129 2
others[6] 100 1 T101 2 T93 2 T94 2
others[7] 84 1 T91 2 T62 2 T93 2
false 14370 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T32 2 T24 2 T63 4
others[1] 86 1 T91 2 T129 2 T289 2
others[2] 66 1 T91 2 T63 2 T129 2
others[3] 104 1 T23 2 T63 4 T95 2
others[4] 102 1 T92 2 T63 4 T94 2
others[5] 96 1 T33 2 T94 2 T244 2
others[6] 86 1 T23 2 T103 2 T240 2
others[7] 86 1 T2 2 T133 2 T76 2
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T33 2 T93 2 T357 4
others[1] 90 1 T2 2 T94 2 T95 2
others[2] 96 1 T63 2 T95 2 T240 2
others[3] 76 1 T103 2 T129 4 T404 2
others[4] 118 1 T63 2 T209 6 T129 4
others[5] 72 1 T95 2 T96 2 T399 2
others[6] 88 1 T129 2 T130 4 T403 2
others[7] 116 1 T91 6 T94 2 T76 2
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T32 2 T94 2 T96 2
others[1] 76 1 T101 2 T92 2 T95 2
others[2] 112 1 T32 2 T23 2 T94 2
others[3] 92 1 T33 2 T92 2 T63 4
others[4] 76 1 T23 2 T24 2 T91 2
others[5] 86 1 T94 2 T129 2 T289 2
others[6] 96 1 T24 2 T94 4 T209 2
others[7] 100 1 T91 2 T93 2 T63 2
false 14371 1 T1 4 T2 8 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 27 1 T5 1 T6 1 T284 1
others[1] 34 1 T13 3 T63 2 T284 3
others[2] 34 1 T5 1 T284 1 T285 1
others[3] 42 1 T5 1 T144 1 T286 1
others[4] 37 1 T14 1 T286 2 T89 1
others[5] 28 1 T5 1 T12 1 T105 2
others[6] 36 1 T13 1 T144 1 T209 2
others[7] 38 1 T94 2 T14 1 T284 1
false 14371 1 T1 4 T2 8 T3 23
true 2337 1 T2 4 T3 2 T4 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 32 1 T5 1 T6 1 T105 2
others[1] 40 1 T13 1 T144 1 T209 2
others[2] 43 1 T14 2 T144 1 T286 1
others[3] 36 1 T5 2 T13 1 T14 1
others[4] 27 1 T285 1 T89 1 T90 2
others[5] 32 1 T5 1 T63 2 T94 2
others[6] 28 1 T14 1 T144 1 T284 1
others[7] 38 1 T12 1 T13 1 T144 1
false 11701 1 T1 3 T2 6 T3 23
true 19200 1 T1 5 T2 12 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T2 2 T91 2 T129 2
others[1] 100 1 T11 2 T101 2 T91 2
others[2] 58 1 T24 2 T33 2 T93 2
others[3] 92 1 T63 2 T240 2 T130 2
others[4] 72 1 T93 2 T209 2 T129 2
others[5] 92 1 T11 2 T33 2 T63 4
others[6] 82 1 T99 2 T24 2 T33 2
others[7] 112 1 T32 2 T23 2 T92 4
false 7969 1 T1 3 T2 2 T3 21
true 16953 1 T1 5 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T101 2 T63 2 T399 2
others[1] 80 1 T24 2 T93 2 T94 2
others[2] 66 1 T93 2 T63 2 T94 2
others[3] 68 1 T63 2 T129 2 T130 4
others[4] 84 1 T23 2 T102 2 T95 2
others[5] 86 1 T24 4 T103 2 T129 2
others[6] 72 1 T94 2 T129 2 T400 2
others[7] 100 1 T91 2 T63 2 T94 2
false 7024 1 T1 2 T2 1 T3 21
true 16710 1 T1 4 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T23 2 T101 2 T116 2
others[1] 98 1 T33 2 T63 2 T129 4
others[2] 90 1 T32 2 T63 6 T129 4
others[3] 94 1 T23 2 T92 2 T63 4
others[4] 110 1 T24 2 T76 4 T289 4
others[5] 106 1 T23 2 T63 4 T103 2
others[6] 74 1 T24 2 T95 2 T130 2
others[7] 84 1 T94 2 T103 2 T209 2
false 7436 1 T1 3 T2 2 T3 23
true 16724 1 T1 5 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 31 1 T6 2 T12 1 T13 1
others[1] 33 1 T12 2 T144 1 T284 1
others[2] 30 1 T6 1 T103 2 T129 2
others[3] 37 1 T6 1 T284 1 T285 1
others[4] 36 1 T5 1 T12 2 T169 2
others[5] 37 1 T5 1 T6 1 T13 1
others[6] 41 1 T13 1 T405 1 T365 1
others[7] 36 1 T13 1 T14 1 T399 2
false 11641 1 T1 3 T2 6 T3 23
true 19187 1 T1 5 T2 12 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T63 2 T129 4 T287 2
others[1] 54 1 T93 2 T94 2 T103 2
others[2] 52 1 T91 2 T63 2 T94 4
others[3] 60 1 T23 2 T91 2 T63 4
others[4] 56 1 T91 2 T96 2 T357 2
others[5] 58 1 T91 2 T209 2 T399 2
others[6] 44 1 T99 2 T116 2 T129 2
others[7] 58 1 T91 2 T93 4 T63 4
false 9246 1 T1 3 T2 2 T3 21
true 16952 1 T1 5 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 26 1 T6 1 T12 1 T14 1
others[1] 29 1 T6 1 T12 1 T92 2
others[2] 24 1 T14 1 T284 1 T285 1
others[3] 39 1 T12 2 T13 1 T399 2
others[4] 39 1 T3 2 T129 2 T405 1
others[5] 32 1 T5 2 T92 2 T144 1
others[6] 41 1 T13 1 T116 2 T284 2
others[7] 43 1 T91 2 T209 2 T129 2
false 11577 1 T1 3 T2 6 T3 23
true 19121 1 T1 5 T2 12 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T94 2 T240 2 T129 6
others[1] 124 1 T23 2 T63 2 T94 2
others[2] 86 1 T63 4 T96 2 T370 2
others[3] 84 1 T94 4 T399 2 T129 4
others[4] 84 1 T96 2 T357 2 T404 4
others[5] 92 1 T94 2 T133 2 T208 2
others[6] 78 1 T32 2 T101 2 T33 2
others[7] 108 1 T32 4 T33 2 T94 2
false 7761 1 T1 3 T2 2 T3 23
true 16857 1 T1 5 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T286 1 T90 1 T405 1
others[1] 34 1 T12 2 T399 2 T90 1
others[2] 43 1 T5 1 T14 1 T144 1
others[3] 56 1 T5 1 T6 1 T13 3
others[4] 25 1 T406 1 T405 2 T256 1
others[5] 31 1 T144 1 T89 1 T405 2
others[6] 44 1 T5 2 T144 1 T286 2
others[7] 58 1 T5 1 T6 1 T14 1
false 11535 1 T1 3 T2 6 T3 23
true 19121 1 T1 5 T2 12 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T208 2 T130 2 T273 2
others[1] 46 1 T92 2 T129 2 T130 2
others[2] 50 1 T94 2 T130 4 T402 2
others[3] 56 1 T24 2 T404 2 T72 2
others[4] 30 1 T24 2 T92 2 T63 2
others[5] 58 1 T63 2 T403 2 T402 4
others[6] 42 1 T129 4 T403 2 T357 2
others[7] 64 1 T101 2 T239 2 T240 2
false 9861 1 T1 3 T2 6 T3 23
true 16911 1 T1 5 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T32 2 T95 2 T209 2
others[1] 70 1 T92 2 T96 2 T340 2
others[2] 62 1 T24 2 T94 4 T209 2
others[3] 84 1 T23 2 T92 2 T94 2
others[4] 84 1 T63 2 T399 2 T129 4
others[5] 62 1 T63 2 T94 4 T129 2
others[6] 72 1 T23 2 T92 2 T63 4
others[7] 100 1 T11 2 T93 2 T94 2
false 7243 1 T1 3 T2 4 T3 22
true 16724 1 T1 5 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T23 2 T101 4 T93 2
others[1] 61 1 T62 2 T92 2 T129 2
others[2] 94 1 T101 2 T91 4 T93 2
others[3] 98 1 T93 2 T63 2 T129 2
others[4] 96 1 T24 2 T63 4 T77 2
others[5] 78 1 T129 2 T130 2 T357 2
others[6] 96 1 T94 2 T209 2 T399 2
others[7] 100 1 T91 2 T63 2 T94 4
false 7243 1 T1 3 T2 4 T3 22
true 16723 1 T1 5 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T91 2 T63 4 T70 2
others[1] 86 1 T23 2 T63 2 T94 2
others[2] 94 1 T32 2 T23 2 T103 2
others[3] 86 1 T92 2 T63 2 T94 2
others[4] 120 1 T24 2 T244 2 T240 2
others[5] 80 1 T63 4 T133 2 T129 2
others[6] 88 1 T2 2 T33 2 T63 2
others[7] 88 1 T91 2 T94 2 T129 4
false 6464 1 T1 2 T2 1 T3 13
true 16701 1 T1 4 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T63 2 T130 2 T357 2
others[1] 84 1 T95 2 T129 4 T402 2
others[2] 116 1 T91 4 T94 2 T129 4
others[3] 84 1 T95 4 T96 2 T240 2
others[4] 90 1 T2 2 T76 2 T209 2
others[5] 84 1 T91 2 T93 2 T95 2
others[6] 96 1 T33 2 T103 2 T129 2
others[7] 104 1 T63 2 T94 2 T399 2
false 6464 1 T1 2 T2 1 T3 13
true 16701 1 T1 4 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T129 2 T86 2 T407 2
others[1] 48 1 T129 2 T402 2 T400 2
others[2] 64 1 T93 2 T63 2 T96 2
others[3] 60 1 T94 2 T129 2 T357 2
others[4] 64 1 T93 2 T94 2 T340 2
others[5] 80 1 T91 2 T63 2 T95 2
others[6] 54 1 T91 2 T63 2 T95 2
others[7] 66 1 T2 2 T23 2 T129 2
false 6910 1 T1 1 T2 2 T3 13
true 18078 1 T1 4 T2 8 T3 32


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T2 2 T63 2 T95 2
others[1] 46 1 T101 2 T95 2 T129 2
others[2] 60 1 T33 2 T94 2 T129 2
others[3] 36 1 T401 2 T357 2 T408 2
others[4] 76 1 T63 2 T103 2 T129 4
others[5] 64 1 T11 2 T101 2 T91 2
others[6] 58 1 T101 2 T63 2 T57 2
others[7] 80 1 T63 2 T129 6 T130 2
false 6910 1 T1 1 T2 2 T3 13
true 18078 1 T1 4 T2 8 T3 32


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T5 1 T12 1 T63 2
others[1] 36 1 T12 1 T284 1 T129 2
others[2] 32 1 T6 1 T144 1 T90 1
others[3] 29 1 T5 2 T14 1 T284 2
others[4] 43 1 T5 1 T144 2 T90 1
others[5] 25 1 T14 1 T284 1 T399 2
others[6] 24 1 T12 1 T13 1 T89 1
others[7] 55 1 T5 3 T12 1 T286 1
false 11774 1 T1 3 T2 6 T3 23
true 19265 1 T1 5 T2 12 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T101 2 T93 2 T94 2
others[1] 80 1 T91 2 T94 2 T96 2
others[2] 98 1 T23 2 T370 2 T129 4
others[3] 92 1 T23 2 T24 2 T63 6
others[4] 76 1 T91 2 T94 2 T209 2
others[5] 96 1 T24 2 T92 4 T94 2
others[6] 86 1 T32 4 T63 2 T133 2
others[7] 108 1 T33 2 T129 6 T340 2
false 7892 1 T1 2 T2 2 T3 23
true 16934 1 T1 4 T2 8 T3 31


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 47 1 T5 1 T6 1 T14 1
others[1] 26 1 T6 1 T12 1 T169 2
others[2] 37 1 T14 1 T399 2 T129 2
others[3] 30 1 T5 1 T13 2 T103 2
others[4] 27 1 T12 1 T13 1 T284 1
others[5] 34 1 T12 2 T89 1 T90 1
others[6] 33 1 T6 1 T12 1 T144 1
others[7] 47 1 T6 2 T13 1 T14 1
false 14371 1 T1 4 T2 8 T3 23
true 2362 1 T2 4 T4 1 T5 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%