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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.94 93.89 96.45 95.76 91.89 97.05 96.33 93.21


Total test records in report: 1324
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T1059 /workspace/coverage/default/2.otp_ctrl_init_fail.1697237085 Apr 04 03:40:57 PM PDT 24 Apr 04 03:41:03 PM PDT 24 2440076849 ps
T1060 /workspace/coverage/default/32.otp_ctrl_parallel_lc_req.2842738527 Apr 04 03:42:38 PM PDT 24 Apr 04 03:43:06 PM PDT 24 13124325464 ps
T1061 /workspace/coverage/default/90.otp_ctrl_init_fail.1705543646 Apr 04 03:44:26 PM PDT 24 Apr 04 03:44:31 PM PDT 24 306113994 ps
T1062 /workspace/coverage/default/186.otp_ctrl_parallel_lc_esc.4219093409 Apr 04 03:45:22 PM PDT 24 Apr 04 03:45:30 PM PDT 24 910632341 ps
T1063 /workspace/coverage/default/37.otp_ctrl_test_access.549960602 Apr 04 03:43:08 PM PDT 24 Apr 04 03:43:23 PM PDT 24 1100857967 ps
T1064 /workspace/coverage/default/19.otp_ctrl_regwen.3002575998 Apr 04 03:42:03 PM PDT 24 Apr 04 03:42:07 PM PDT 24 259828865 ps
T1065 /workspace/coverage/default/14.otp_ctrl_test_access.2988844760 Apr 04 03:41:22 PM PDT 24 Apr 04 03:41:39 PM PDT 24 1102599557 ps
T1066 /workspace/coverage/default/255.otp_ctrl_init_fail.3861999163 Apr 04 03:45:53 PM PDT 24 Apr 04 03:45:58 PM PDT 24 499297693 ps
T1067 /workspace/coverage/default/12.otp_ctrl_test_access.2064508939 Apr 04 03:41:20 PM PDT 24 Apr 04 03:41:26 PM PDT 24 239658779 ps
T1068 /workspace/coverage/default/65.otp_ctrl_stress_all_with_rand_reset.1574458085 Apr 04 03:44:15 PM PDT 24 Apr 04 03:50:34 PM PDT 24 31114057635 ps
T132 /workspace/coverage/default/134.otp_ctrl_init_fail.2033556046 Apr 04 03:45:09 PM PDT 24 Apr 04 03:45:13 PM PDT 24 304615581 ps
T1069 /workspace/coverage/default/22.otp_ctrl_parallel_lc_req.2781491638 Apr 04 03:42:06 PM PDT 24 Apr 04 03:42:18 PM PDT 24 577498783 ps
T1070 /workspace/coverage/default/20.otp_ctrl_macro_errs.231223510 Apr 04 03:42:02 PM PDT 24 Apr 04 03:42:53 PM PDT 24 20974171493 ps
T1071 /workspace/coverage/default/280.otp_ctrl_init_fail.2683833113 Apr 04 03:46:02 PM PDT 24 Apr 04 03:46:08 PM PDT 24 139968745 ps
T1072 /workspace/coverage/default/1.otp_ctrl_smoke.485712990 Apr 04 03:40:55 PM PDT 24 Apr 04 03:41:01 PM PDT 24 286717064 ps
T1073 /workspace/coverage/default/49.otp_ctrl_test_access.4268300207 Apr 04 03:43:48 PM PDT 24 Apr 04 03:44:12 PM PDT 24 1186076563 ps
T1074 /workspace/coverage/default/18.otp_ctrl_parallel_key_req.1084201201 Apr 04 03:42:03 PM PDT 24 Apr 04 03:42:14 PM PDT 24 577554848 ps
T1075 /workspace/coverage/default/10.otp_ctrl_parallel_lc_req.3271878755 Apr 04 03:41:16 PM PDT 24 Apr 04 03:41:45 PM PDT 24 10919971908 ps
T1076 /workspace/coverage/default/56.otp_ctrl_parallel_lc_esc.545018262 Apr 04 03:44:03 PM PDT 24 Apr 04 03:44:14 PM PDT 24 3893691904 ps
T1077 /workspace/coverage/default/142.otp_ctrl_parallel_lc_esc.2243525433 Apr 04 03:45:05 PM PDT 24 Apr 04 03:45:20 PM PDT 24 270453797 ps
T1078 /workspace/coverage/default/39.otp_ctrl_parallel_key_req.1214767047 Apr 04 03:43:21 PM PDT 24 Apr 04 03:43:57 PM PDT 24 819630975 ps
T1079 /workspace/coverage/default/190.otp_ctrl_parallel_lc_esc.3208688852 Apr 04 03:45:33 PM PDT 24 Apr 04 03:45:54 PM PDT 24 8859580554 ps
T306 /workspace/coverage/default/5.otp_ctrl_stress_all_with_rand_reset.1151545729 Apr 04 03:41:06 PM PDT 24 Apr 04 03:51:59 PM PDT 24 175089864878 ps
T328 /workspace/coverage/default/44.otp_ctrl_smoke.3714535238 Apr 04 03:43:32 PM PDT 24 Apr 04 03:43:39 PM PDT 24 739319623 ps
T329 /workspace/coverage/default/50.otp_ctrl_parallel_lc_esc.158950283 Apr 04 03:43:47 PM PDT 24 Apr 04 03:43:53 PM PDT 24 239595550 ps
T330 /workspace/coverage/default/166.otp_ctrl_init_fail.1848531331 Apr 04 03:45:25 PM PDT 24 Apr 04 03:45:29 PM PDT 24 155111131 ps
T331 /workspace/coverage/default/156.otp_ctrl_parallel_lc_esc.2393815156 Apr 04 03:45:25 PM PDT 24 Apr 04 03:45:35 PM PDT 24 354112712 ps
T332 /workspace/coverage/default/24.otp_ctrl_dai_lock.540362018 Apr 04 03:42:18 PM PDT 24 Apr 04 03:42:40 PM PDT 24 2464050931 ps
T333 /workspace/coverage/default/38.otp_ctrl_alert_test.773814625 Apr 04 03:43:10 PM PDT 24 Apr 04 03:43:12 PM PDT 24 121863888 ps
T334 /workspace/coverage/default/136.otp_ctrl_init_fail.3987308925 Apr 04 03:45:03 PM PDT 24 Apr 04 03:45:07 PM PDT 24 399200561 ps
T335 /workspace/coverage/default/44.otp_ctrl_regwen.3045756193 Apr 04 03:43:34 PM PDT 24 Apr 04 03:43:40 PM PDT 24 1974435913 ps
T244 /workspace/coverage/default/1.otp_ctrl_sec_cm.703296512 Apr 04 03:41:00 PM PDT 24 Apr 04 03:43:55 PM PDT 24 21351454761 ps
T376 /workspace/coverage/default/25.otp_ctrl_regwen.1240496067 Apr 04 03:42:18 PM PDT 24 Apr 04 03:42:30 PM PDT 24 456599839 ps
T1080 /workspace/coverage/default/177.otp_ctrl_parallel_lc_esc.4073662926 Apr 04 03:45:21 PM PDT 24 Apr 04 03:45:35 PM PDT 24 469452000 ps
T1081 /workspace/coverage/default/160.otp_ctrl_parallel_lc_esc.2535236813 Apr 04 03:45:25 PM PDT 24 Apr 04 03:45:29 PM PDT 24 198400527 ps
T1082 /workspace/coverage/default/32.otp_ctrl_regwen.1177904197 Apr 04 03:42:39 PM PDT 24 Apr 04 03:42:45 PM PDT 24 594724235 ps
T1083 /workspace/coverage/default/23.otp_ctrl_stress_all_with_rand_reset.225920557 Apr 04 03:42:17 PM PDT 24 Apr 04 04:11:04 PM PDT 24 387852848616 ps
T1084 /workspace/coverage/default/20.otp_ctrl_parallel_key_req.4047621580 Apr 04 03:42:06 PM PDT 24 Apr 04 03:42:38 PM PDT 24 10578160393 ps
T1085 /workspace/coverage/default/3.otp_ctrl_test_access.160491458 Apr 04 03:41:02 PM PDT 24 Apr 04 03:41:16 PM PDT 24 7929564713 ps
T1086 /workspace/coverage/default/185.otp_ctrl_parallel_lc_esc.185825492 Apr 04 03:45:28 PM PDT 24 Apr 04 03:45:44 PM PDT 24 5957934048 ps
T1087 /workspace/coverage/default/43.otp_ctrl_test_access.3183130051 Apr 04 03:43:21 PM PDT 24 Apr 04 03:43:45 PM PDT 24 666082987 ps
T1088 /workspace/coverage/default/26.otp_ctrl_smoke.3324746395 Apr 04 03:42:20 PM PDT 24 Apr 04 03:42:30 PM PDT 24 621724056 ps
T136 /workspace/coverage/default/74.otp_ctrl_init_fail.1657540637 Apr 04 03:44:14 PM PDT 24 Apr 04 03:44:19 PM PDT 24 133052823 ps
T1089 /workspace/coverage/default/13.otp_ctrl_parallel_key_req.2977891223 Apr 04 03:41:34 PM PDT 24 Apr 04 03:42:08 PM PDT 24 2971312996 ps
T1090 /workspace/coverage/default/220.otp_ctrl_init_fail.3877147646 Apr 04 03:45:38 PM PDT 24 Apr 04 03:45:43 PM PDT 24 550031164 ps
T1091 /workspace/coverage/default/36.otp_ctrl_check_fail.1767916177 Apr 04 03:43:07 PM PDT 24 Apr 04 03:43:46 PM PDT 24 2568274028 ps
T1092 /workspace/coverage/default/168.otp_ctrl_parallel_lc_esc.1640603138 Apr 04 03:45:25 PM PDT 24 Apr 04 03:45:32 PM PDT 24 2014661320 ps
T1093 /workspace/coverage/default/241.otp_ctrl_init_fail.2298591087 Apr 04 03:45:47 PM PDT 24 Apr 04 03:45:51 PM PDT 24 1372712115 ps
T1094 /workspace/coverage/default/83.otp_ctrl_init_fail.1107754333 Apr 04 03:44:26 PM PDT 24 Apr 04 03:44:30 PM PDT 24 135292085 ps
T1095 /workspace/coverage/default/122.otp_ctrl_parallel_lc_esc.1394553290 Apr 04 03:45:08 PM PDT 24 Apr 04 03:45:16 PM PDT 24 863864442 ps
T1096 /workspace/coverage/default/42.otp_ctrl_alert_test.381226926 Apr 04 03:43:22 PM PDT 24 Apr 04 03:43:24 PM PDT 24 104947767 ps
T1097 /workspace/coverage/default/18.otp_ctrl_smoke.2722487510 Apr 04 03:41:49 PM PDT 24 Apr 04 03:42:15 PM PDT 24 3524829037 ps
T1098 /workspace/coverage/default/9.otp_ctrl_parallel_key_req.762165001 Apr 04 03:41:14 PM PDT 24 Apr 04 03:41:46 PM PDT 24 2493848642 ps
T1099 /workspace/coverage/default/150.otp_ctrl_parallel_lc_esc.3645709019 Apr 04 03:45:22 PM PDT 24 Apr 04 03:45:36 PM PDT 24 3118135132 ps
T1100 /workspace/coverage/default/48.otp_ctrl_init_fail.4207582657 Apr 04 03:43:46 PM PDT 24 Apr 04 03:43:50 PM PDT 24 122098281 ps
T1101 /workspace/coverage/default/151.otp_ctrl_parallel_lc_esc.947646497 Apr 04 03:45:19 PM PDT 24 Apr 04 03:45:32 PM PDT 24 594495938 ps
T1102 /workspace/coverage/default/21.otp_ctrl_dai_lock.84074072 Apr 04 03:42:04 PM PDT 24 Apr 04 03:42:54 PM PDT 24 17722675183 ps
T1103 /workspace/coverage/default/19.otp_ctrl_alert_test.593642883 Apr 04 03:42:04 PM PDT 24 Apr 04 03:42:06 PM PDT 24 162235384 ps
T1104 /workspace/coverage/default/22.otp_ctrl_dai_lock.1695831322 Apr 04 03:42:05 PM PDT 24 Apr 04 03:42:25 PM PDT 24 7599212700 ps
T1105 /workspace/coverage/default/181.otp_ctrl_parallel_lc_esc.1942079858 Apr 04 03:45:27 PM PDT 24 Apr 04 03:45:30 PM PDT 24 298775722 ps
T1106 /workspace/coverage/default/9.otp_ctrl_stress_all_with_rand_reset.924190758 Apr 04 03:41:14 PM PDT 24 Apr 04 03:50:05 PM PDT 24 69578457463 ps
T1107 /workspace/coverage/default/235.otp_ctrl_init_fail.1713550774 Apr 04 03:45:51 PM PDT 24 Apr 04 03:45:55 PM PDT 24 218239278 ps
T1108 /workspace/coverage/default/30.otp_ctrl_smoke.2807221198 Apr 04 03:42:28 PM PDT 24 Apr 04 03:42:37 PM PDT 24 3286426759 ps
T1109 /workspace/coverage/default/279.otp_ctrl_init_fail.4197382045 Apr 04 03:46:01 PM PDT 24 Apr 04 03:46:04 PM PDT 24 134869399 ps
T1110 /workspace/coverage/default/29.otp_ctrl_dai_errs.1351511258 Apr 04 03:42:31 PM PDT 24 Apr 04 03:42:49 PM PDT 24 721896749 ps
T1111 /workspace/coverage/default/21.otp_ctrl_parallel_lc_req.2345257720 Apr 04 03:42:02 PM PDT 24 Apr 04 03:42:26 PM PDT 24 3004095601 ps
T1112 /workspace/coverage/default/45.otp_ctrl_stress_all_with_rand_reset.1159396044 Apr 04 03:43:35 PM PDT 24 Apr 04 04:35:20 PM PDT 24 714890808745 ps
T1113 /workspace/coverage/default/70.otp_ctrl_init_fail.1388942718 Apr 04 03:44:11 PM PDT 24 Apr 04 03:44:15 PM PDT 24 227426103 ps
T1114 /workspace/coverage/default/24.otp_ctrl_parallel_lc_esc.2915399444 Apr 04 03:42:17 PM PDT 24 Apr 04 03:42:28 PM PDT 24 3383665922 ps
T1115 /workspace/coverage/default/8.otp_ctrl_regwen.2192064895 Apr 04 03:41:12 PM PDT 24 Apr 04 03:41:18 PM PDT 24 285371521 ps
T218 /workspace/coverage/default/10.otp_ctrl_stress_all_with_rand_reset.3748909688 Apr 04 03:41:15 PM PDT 24 Apr 04 03:46:10 PM PDT 24 29643328620 ps
T1116 /workspace/coverage/default/65.otp_ctrl_init_fail.910965423 Apr 04 03:44:12 PM PDT 24 Apr 04 03:44:17 PM PDT 24 139549259 ps
T1117 /workspace/coverage/default/167.otp_ctrl_parallel_lc_esc.1148933969 Apr 04 03:45:25 PM PDT 24 Apr 04 03:45:29 PM PDT 24 117989449 ps
T1118 /workspace/coverage/default/34.otp_ctrl_init_fail.98722927 Apr 04 03:42:57 PM PDT 24 Apr 04 03:43:02 PM PDT 24 449311178 ps
T155 /workspace/coverage/default/123.otp_ctrl_init_fail.170005169 Apr 04 03:45:05 PM PDT 24 Apr 04 03:45:09 PM PDT 24 137760028 ps
T1119 /workspace/coverage/default/0.otp_ctrl_low_freq_read.2852012395 Apr 04 03:40:38 PM PDT 24 Apr 04 03:40:54 PM PDT 24 6889799541 ps
T1120 /workspace/coverage/default/49.otp_ctrl_dai_lock.4219292366 Apr 04 03:43:48 PM PDT 24 Apr 04 03:44:00 PM PDT 24 1771145710 ps
T1121 /workspace/coverage/default/60.otp_ctrl_init_fail.2310477823 Apr 04 03:44:01 PM PDT 24 Apr 04 03:44:04 PM PDT 24 201539766 ps
T1122 /workspace/coverage/default/25.otp_ctrl_macro_errs.3682070556 Apr 04 03:42:17 PM PDT 24 Apr 04 03:42:30 PM PDT 24 1242801726 ps
T1123 /workspace/coverage/default/176.otp_ctrl_init_fail.1473303740 Apr 04 03:45:22 PM PDT 24 Apr 04 03:45:27 PM PDT 24 312095685 ps
T1124 /workspace/coverage/default/42.otp_ctrl_parallel_lc_esc.1710345885 Apr 04 03:43:20 PM PDT 24 Apr 04 03:43:30 PM PDT 24 694750373 ps
T1125 /workspace/coverage/default/1.otp_ctrl_parallel_lc_esc.200264620 Apr 04 03:41:00 PM PDT 24 Apr 04 03:41:03 PM PDT 24 110198248 ps
T1126 /workspace/coverage/default/33.otp_ctrl_check_fail.1167432115 Apr 04 03:42:53 PM PDT 24 Apr 04 03:43:10 PM PDT 24 2586739493 ps
T1127 /workspace/coverage/default/43.otp_ctrl_check_fail.446330056 Apr 04 03:43:24 PM PDT 24 Apr 04 03:44:02 PM PDT 24 21627566574 ps
T258 /workspace/coverage/default/119.otp_ctrl_parallel_lc_esc.413719491 Apr 04 03:44:43 PM PDT 24 Apr 04 03:44:56 PM PDT 24 1741103901 ps
T1128 /workspace/coverage/default/7.otp_ctrl_dai_errs.1154953257 Apr 04 03:41:14 PM PDT 24 Apr 04 03:41:45 PM PDT 24 841340908 ps
T1129 /workspace/coverage/default/99.otp_ctrl_init_fail.1815499454 Apr 04 03:44:45 PM PDT 24 Apr 04 03:44:50 PM PDT 24 204608016 ps
T1130 /workspace/coverage/default/4.otp_ctrl_regwen.959381563 Apr 04 03:41:06 PM PDT 24 Apr 04 03:41:13 PM PDT 24 1972602266 ps
T1131 /workspace/coverage/default/62.otp_ctrl_stress_all_with_rand_reset.334910339 Apr 04 03:44:14 PM PDT 24 Apr 04 04:14:06 PM PDT 24 82263591535 ps
T1132 /workspace/coverage/default/35.otp_ctrl_check_fail.1751467383 Apr 04 03:42:53 PM PDT 24 Apr 04 03:43:38 PM PDT 24 16909220726 ps
T1133 /workspace/coverage/default/27.otp_ctrl_regwen.2801522175 Apr 04 03:42:27 PM PDT 24 Apr 04 03:42:39 PM PDT 24 622760585 ps
T1134 /workspace/coverage/default/22.otp_ctrl_parallel_lc_esc.2457065240 Apr 04 03:42:04 PM PDT 24 Apr 04 03:42:14 PM PDT 24 355258765 ps
T1135 /workspace/coverage/default/2.otp_ctrl_parallel_key_req.366482361 Apr 04 03:40:59 PM PDT 24 Apr 04 03:41:34 PM PDT 24 1616924916 ps
T1136 /workspace/coverage/default/15.otp_ctrl_test_access.2408058042 Apr 04 03:41:34 PM PDT 24 Apr 04 03:41:52 PM PDT 24 3161477912 ps
T1137 /workspace/coverage/default/28.otp_ctrl_regwen.3053582018 Apr 04 03:42:26 PM PDT 24 Apr 04 03:42:31 PM PDT 24 150169720 ps
T1138 /workspace/coverage/default/180.otp_ctrl_init_fail.590997401 Apr 04 03:45:23 PM PDT 24 Apr 04 03:45:29 PM PDT 24 543622900 ps
T1139 /workspace/coverage/default/18.otp_ctrl_check_fail.1700029027 Apr 04 03:41:49 PM PDT 24 Apr 04 03:41:55 PM PDT 24 327099780 ps
T1140 /workspace/coverage/default/169.otp_ctrl_parallel_lc_esc.2487308174 Apr 04 03:45:19 PM PDT 24 Apr 04 03:45:23 PM PDT 24 347448552 ps
T1141 /workspace/coverage/default/8.otp_ctrl_dai_lock.353184934 Apr 04 03:41:16 PM PDT 24 Apr 04 03:41:31 PM PDT 24 1349136186 ps
T1142 /workspace/coverage/default/42.otp_ctrl_test_access.1408761163 Apr 04 03:43:23 PM PDT 24 Apr 04 03:43:37 PM PDT 24 872390120 ps
T1143 /workspace/coverage/default/18.otp_ctrl_macro_errs.3933356726 Apr 04 03:41:49 PM PDT 24 Apr 04 03:42:03 PM PDT 24 5088802868 ps
T1144 /workspace/coverage/default/16.otp_ctrl_stress_all_with_rand_reset.1543921819 Apr 04 03:41:50 PM PDT 24 Apr 04 04:06:00 PM PDT 24 677490334939 ps
T1145 /workspace/coverage/default/29.otp_ctrl_check_fail.242344862 Apr 04 03:42:27 PM PDT 24 Apr 04 03:43:15 PM PDT 24 8613154245 ps
T1146 /workspace/coverage/default/54.otp_ctrl_parallel_lc_esc.1116523702 Apr 04 03:43:59 PM PDT 24 Apr 04 03:44:19 PM PDT 24 729893213 ps
T1147 /workspace/coverage/default/46.otp_ctrl_parallel_lc_esc.2309994319 Apr 04 03:43:33 PM PDT 24 Apr 04 03:43:41 PM PDT 24 583740035 ps
T1148 /workspace/coverage/default/246.otp_ctrl_init_fail.2576550952 Apr 04 03:45:55 PM PDT 24 Apr 04 03:45:58 PM PDT 24 120469512 ps
T1149 /workspace/coverage/default/4.otp_ctrl_background_chks.2539747478 Apr 04 03:40:57 PM PDT 24 Apr 04 03:41:30 PM PDT 24 3325656003 ps
T1150 /workspace/coverage/default/106.otp_ctrl_parallel_lc_esc.1296388595 Apr 04 03:44:43 PM PDT 24 Apr 04 03:45:00 PM PDT 24 1257546086 ps
T1151 /workspace/coverage/default/33.otp_ctrl_dai_lock.4094741074 Apr 04 03:42:54 PM PDT 24 Apr 04 03:43:38 PM PDT 24 17209669589 ps
T1152 /workspace/coverage/default/40.otp_ctrl_regwen.2732197756 Apr 04 03:43:22 PM PDT 24 Apr 04 03:43:32 PM PDT 24 381761097 ps
T1153 /workspace/coverage/default/42.otp_ctrl_dai_errs.1615085784 Apr 04 03:43:20 PM PDT 24 Apr 04 03:43:39 PM PDT 24 342297359 ps
T1154 /workspace/coverage/default/23.otp_ctrl_init_fail.883233575 Apr 04 03:42:17 PM PDT 24 Apr 04 03:42:21 PM PDT 24 266170238 ps
T1155 /workspace/coverage/default/1.otp_ctrl_test_access.3494741510 Apr 04 03:40:59 PM PDT 24 Apr 04 03:41:08 PM PDT 24 3373552808 ps
T1156 /workspace/coverage/default/188.otp_ctrl_parallel_lc_esc.4116982924 Apr 04 03:45:27 PM PDT 24 Apr 04 03:45:32 PM PDT 24 441991120 ps
T1157 /workspace/coverage/default/197.otp_ctrl_init_fail.2365504509 Apr 04 03:45:37 PM PDT 24 Apr 04 03:45:41 PM PDT 24 2269797058 ps
T1158 /workspace/coverage/default/13.otp_ctrl_parallel_lc_req.2826440030 Apr 04 03:41:26 PM PDT 24 Apr 04 03:41:42 PM PDT 24 939967958 ps
T1159 /workspace/coverage/default/9.otp_ctrl_parallel_lc_esc.1486322867 Apr 04 03:41:14 PM PDT 24 Apr 04 03:41:19 PM PDT 24 256114485 ps
T1160 /workspace/coverage/default/36.otp_ctrl_alert_test.580879335 Apr 04 03:43:10 PM PDT 24 Apr 04 03:43:12 PM PDT 24 963474887 ps
T1161 /workspace/coverage/default/21.otp_ctrl_dai_errs.3163399762 Apr 04 03:42:04 PM PDT 24 Apr 04 03:42:32 PM PDT 24 1944811025 ps
T1162 /workspace/coverage/default/36.otp_ctrl_test_access.1594114777 Apr 04 03:43:06 PM PDT 24 Apr 04 03:43:23 PM PDT 24 1440244772 ps
T1163 /workspace/coverage/default/35.otp_ctrl_test_access.391278725 Apr 04 03:42:54 PM PDT 24 Apr 04 03:43:13 PM PDT 24 2212410714 ps
T1164 /workspace/coverage/default/38.otp_ctrl_stress_all_with_rand_reset.60727459 Apr 04 03:43:10 PM PDT 24 Apr 04 03:55:19 PM PDT 24 333398321450 ps
T1165 /workspace/coverage/default/154.otp_ctrl_parallel_lc_esc.3235130389 Apr 04 03:45:25 PM PDT 24 Apr 04 03:45:42 PM PDT 24 5008305956 ps
T1166 /workspace/coverage/default/295.otp_ctrl_init_fail.2577882879 Apr 04 03:46:03 PM PDT 24 Apr 04 03:46:08 PM PDT 24 1623204138 ps
T1167 /workspace/coverage/default/49.otp_ctrl_alert_test.496069197 Apr 04 03:43:48 PM PDT 24 Apr 04 03:43:50 PM PDT 24 59813801 ps
T1168 /workspace/coverage/default/22.otp_ctrl_check_fail.43280681 Apr 04 03:42:06 PM PDT 24 Apr 04 03:42:27 PM PDT 24 2695846855 ps
T1169 /workspace/coverage/default/35.otp_ctrl_parallel_key_req.5901093 Apr 04 03:42:57 PM PDT 24 Apr 04 03:43:13 PM PDT 24 3817828203 ps
T133 /workspace/coverage/default/111.otp_ctrl_init_fail.4137053915 Apr 04 03:44:47 PM PDT 24 Apr 04 03:44:51 PM PDT 24 148000730 ps
T1170 /workspace/coverage/default/8.otp_ctrl_smoke.2584848232 Apr 04 03:41:09 PM PDT 24 Apr 04 03:41:15 PM PDT 24 1997309774 ps
T1171 /workspace/coverage/default/5.otp_ctrl_test_access.4284069919 Apr 04 03:40:59 PM PDT 24 Apr 04 03:41:13 PM PDT 24 923286940 ps
T1172 /workspace/coverage/default/44.otp_ctrl_dai_errs.3179507872 Apr 04 03:43:33 PM PDT 24 Apr 04 03:43:55 PM PDT 24 911204651 ps
T245 /workspace/coverage/default/0.otp_ctrl_sec_cm.3203127965 Apr 04 03:40:56 PM PDT 24 Apr 04 03:44:28 PM PDT 24 10841225205 ps
T1173 /workspace/coverage/default/91.otp_ctrl_stress_all_with_rand_reset.3096016695 Apr 04 03:44:28 PM PDT 24 Apr 04 03:56:55 PM PDT 24 92967461343 ps
T68 /workspace/coverage/default/68.otp_ctrl_init_fail.2709551935 Apr 04 03:44:11 PM PDT 24 Apr 04 03:44:16 PM PDT 24 98294878 ps
T1174 /workspace/coverage/default/46.otp_ctrl_smoke.3930088769 Apr 04 03:43:32 PM PDT 24 Apr 04 03:43:40 PM PDT 24 220198399 ps
T1175 /workspace/coverage/default/17.otp_ctrl_macro_errs.3198548773 Apr 04 03:41:51 PM PDT 24 Apr 04 03:42:27 PM PDT 24 4503747520 ps
T1176 /workspace/coverage/default/20.otp_ctrl_stress_all.772540751 Apr 04 03:42:04 PM PDT 24 Apr 04 03:45:09 PM PDT 24 73009232878 ps
T1177 /workspace/coverage/default/45.otp_ctrl_alert_test.605921716 Apr 04 03:43:35 PM PDT 24 Apr 04 03:43:37 PM PDT 24 846186198 ps
T1178 /workspace/coverage/default/11.otp_ctrl_alert_test.3039483332 Apr 04 03:41:18 PM PDT 24 Apr 04 03:41:20 PM PDT 24 130084761 ps
T45 /workspace/coverage/default/163.otp_ctrl_init_fail.1684996432 Apr 04 03:45:21 PM PDT 24 Apr 04 03:45:26 PM PDT 24 153888965 ps
T1179 /workspace/coverage/default/292.otp_ctrl_init_fail.1915229897 Apr 04 03:46:00 PM PDT 24 Apr 04 03:46:04 PM PDT 24 122270645 ps
T1180 /workspace/coverage/default/13.otp_ctrl_check_fail.2324613943 Apr 04 03:41:35 PM PDT 24 Apr 04 03:41:41 PM PDT 24 447095835 ps
T1181 /workspace/coverage/default/31.otp_ctrl_parallel_lc_req.1506849818 Apr 04 03:42:33 PM PDT 24 Apr 04 03:42:39 PM PDT 24 210494110 ps
T1182 /workspace/coverage/default/25.otp_ctrl_test_access.2374081949 Apr 04 03:42:18 PM PDT 24 Apr 04 03:43:04 PM PDT 24 3582853730 ps
T1183 /workspace/coverage/default/126.otp_ctrl_init_fail.4217369688 Apr 04 03:45:03 PM PDT 24 Apr 04 03:45:07 PM PDT 24 395713786 ps
T1184 /workspace/coverage/default/103.otp_ctrl_parallel_lc_esc.1580237710 Apr 04 03:44:44 PM PDT 24 Apr 04 03:44:49 PM PDT 24 555015142 ps
T36 /workspace/coverage/default/28.otp_ctrl_check_fail.3110483297 Apr 04 03:42:30 PM PDT 24 Apr 04 03:42:58 PM PDT 24 3595150728 ps
T1185 /workspace/coverage/default/11.otp_ctrl_stress_all.1895653931 Apr 04 03:41:15 PM PDT 24 Apr 04 03:44:45 PM PDT 24 25526703390 ps
T1186 /workspace/coverage/default/0.otp_ctrl_parallel_key_req.2936213573 Apr 04 03:40:58 PM PDT 24 Apr 04 03:41:18 PM PDT 24 617237968 ps
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T280 /workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.2297893953 Apr 04 03:12:53 PM PDT 24 Apr 04 03:12:56 PM PDT 24 196925878 ps
T1187 /workspace/coverage/cover_reg_top/11.otp_ctrl_intr_test.3789113205 Apr 04 03:12:54 PM PDT 24 Apr 04 03:12:55 PM PDT 24 41677961 ps
T1188 /workspace/coverage/cover_reg_top/15.otp_ctrl_intr_test.3940713429 Apr 04 03:12:53 PM PDT 24 Apr 04 03:12:55 PM PDT 24 100694123 ps
T284 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.2337126899 Apr 04 03:12:53 PM PDT 24 Apr 04 03:12:56 PM PDT 24 194107892 ps
T1189 /workspace/coverage/cover_reg_top/25.otp_ctrl_intr_test.3339037336 Apr 04 03:13:07 PM PDT 24 Apr 04 03:13:08 PM PDT 24 40321995 ps
T1190 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_walk.157630000 Apr 04 03:12:21 PM PDT 24 Apr 04 03:12:23 PM PDT 24 70706183 ps
T281 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_rw.4128060106 Apr 04 03:12:55 PM PDT 24 Apr 04 03:12:56 PM PDT 24 139980728 ps
T389 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.1223099042 Apr 04 03:13:09 PM PDT 24 Apr 04 03:13:12 PM PDT 24 256539216 ps
T1191 /workspace/coverage/cover_reg_top/2.otp_ctrl_intr_test.3724158531 Apr 04 03:12:21 PM PDT 24 Apr 04 03:12:22 PM PDT 24 54840176 ps
T337 /workspace/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.2065800110 Apr 04 03:12:52 PM PDT 24 Apr 04 03:12:55 PM PDT 24 108291417 ps
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T1192 /workspace/coverage/cover_reg_top/45.otp_ctrl_intr_test.2354935493 Apr 04 03:13:09 PM PDT 24 Apr 04 03:13:10 PM PDT 24 79199742 ps
T1193 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_errors.3215793259 Apr 04 03:12:38 PM PDT 24 Apr 04 03:12:43 PM PDT 24 76313566 ps
T1194 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_errors.996383522 Apr 04 03:12:57 PM PDT 24 Apr 04 03:13:00 PM PDT 24 767970267 ps
T276 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.1727158609 Apr 04 03:12:52 PM PDT 24 Apr 04 03:13:18 PM PDT 24 3701135007 ps
T1195 /workspace/coverage/cover_reg_top/17.otp_ctrl_intr_test.3662129921 Apr 04 03:12:53 PM PDT 24 Apr 04 03:12:54 PM PDT 24 64441982 ps
T390 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.1211045592 Apr 04 03:12:53 PM PDT 24 Apr 04 03:12:55 PM PDT 24 281736055 ps
T277 /workspace/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.3949695280 Apr 04 03:12:55 PM PDT 24 Apr 04 03:13:17 PM PDT 24 4491811284 ps
T1196 /workspace/coverage/cover_reg_top/6.otp_ctrl_intr_test.1189849085 Apr 04 03:12:39 PM PDT 24 Apr 04 03:12:41 PM PDT 24 76389578 ps
T1197 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.2582784198 Apr 04 03:12:45 PM PDT 24 Apr 04 03:12:47 PM PDT 24 77186234 ps
T278 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.2821628251 Apr 04 03:12:37 PM PDT 24 Apr 04 03:12:59 PM PDT 24 1477500932 ps
T308 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.3048362725 Apr 04 03:12:14 PM PDT 24 Apr 04 03:12:18 PM PDT 24 1547605091 ps
T1198 /workspace/coverage/cover_reg_top/12.otp_ctrl_intr_test.4271906637 Apr 04 03:12:56 PM PDT 24 Apr 04 03:12:58 PM PDT 24 39644598 ps
T309 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_rw.2934360601 Apr 04 03:12:43 PM PDT 24 Apr 04 03:12:45 PM PDT 24 41838773 ps
T338 /workspace/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.456298742 Apr 04 03:12:53 PM PDT 24 Apr 04 03:12:56 PM PDT 24 77065983 ps
T1199 /workspace/coverage/cover_reg_top/34.otp_ctrl_intr_test.697834496 Apr 04 03:13:13 PM PDT 24 Apr 04 03:13:14 PM PDT 24 563259279 ps
T1200 /workspace/coverage/cover_reg_top/23.otp_ctrl_intr_test.945330691 Apr 04 03:13:11 PM PDT 24 Apr 04 03:13:13 PM PDT 24 41817245 ps
T1201 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.178936947 Apr 04 03:12:51 PM PDT 24 Apr 04 03:12:55 PM PDT 24 1696591736 ps
T339 /workspace/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.1616728569 Apr 04 03:12:57 PM PDT 24 Apr 04 03:13:00 PM PDT 24 185789585 ps
T340 /workspace/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.2277799422 Apr 04 03:12:18 PM PDT 24 Apr 04 03:12:20 PM PDT 24 267611643 ps
T1202 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.783359669 Apr 04 03:12:16 PM PDT 24 Apr 04 03:12:18 PM PDT 24 1061013057 ps
T1203 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.4005184164 Apr 04 03:13:11 PM PDT 24 Apr 04 03:13:12 PM PDT 24 151704425 ps
T1204 /workspace/coverage/cover_reg_top/24.otp_ctrl_intr_test.4063355043 Apr 04 03:13:09 PM PDT 24 Apr 04 03:13:11 PM PDT 24 40221945 ps
T1205 /workspace/coverage/cover_reg_top/26.otp_ctrl_intr_test.1602396332 Apr 04 03:13:12 PM PDT 24 Apr 04 03:13:13 PM PDT 24 84287436 ps
T1206 /workspace/coverage/cover_reg_top/41.otp_ctrl_intr_test.3414705739 Apr 04 03:13:12 PM PDT 24 Apr 04 03:13:13 PM PDT 24 36434803 ps
T1207 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.2194126999 Apr 04 03:12:15 PM PDT 24 Apr 04 03:12:17 PM PDT 24 71833014 ps
T1208 /workspace/coverage/cover_reg_top/28.otp_ctrl_intr_test.114288962 Apr 04 03:13:09 PM PDT 24 Apr 04 03:13:11 PM PDT 24 68334940 ps
T341 /workspace/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.617741293 Apr 04 03:12:22 PM PDT 24 Apr 04 03:12:24 PM PDT 24 77623535 ps
T369 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.1984216223 Apr 04 03:12:22 PM PDT 24 Apr 04 03:12:32 PM PDT 24 1234605218 ps
T1209 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_walk.2886179431 Apr 04 03:12:16 PM PDT 24 Apr 04 03:12:18 PM PDT 24 76559712 ps
T319 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.908389291 Apr 04 03:12:15 PM PDT 24 Apr 04 03:12:19 PM PDT 24 207078138 ps
T286 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.3079710535 Apr 04 03:12:55 PM PDT 24 Apr 04 03:13:18 PM PDT 24 4378117144 ps
T1210 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.1748533749 Apr 04 03:12:16 PM PDT 24 Apr 04 03:12:18 PM PDT 24 79690475 ps
T345 /workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.2147816921 Apr 04 03:12:19 PM PDT 24 Apr 04 03:12:22 PM PDT 24 119391833 ps
T1211 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_errors.3406905295 Apr 04 03:12:54 PM PDT 24 Apr 04 03:13:01 PM PDT 24 1315796320 ps
T320 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.3465426993 Apr 04 03:12:26 PM PDT 24 Apr 04 03:12:29 PM PDT 24 1015147279 ps
T1212 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_rw.1525545626 Apr 04 03:12:54 PM PDT 24 Apr 04 03:12:56 PM PDT 24 51115830 ps
T1213 /workspace/coverage/cover_reg_top/40.otp_ctrl_intr_test.4249320012 Apr 04 03:13:10 PM PDT 24 Apr 04 03:13:11 PM PDT 24 49149896 ps
T1214 /workspace/coverage/cover_reg_top/21.otp_ctrl_intr_test.1619997120 Apr 04 03:13:11 PM PDT 24 Apr 04 03:13:12 PM PDT 24 37658179 ps
T1215 /workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.3900585985 Apr 04 03:13:11 PM PDT 24 Apr 04 03:13:13 PM PDT 24 42642527 ps
T372 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.132438588 Apr 04 03:12:39 PM PDT 24 Apr 04 03:13:02 PM PDT 24 3043313795 ps
T1216 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.827050446 Apr 04 03:12:11 PM PDT 24 Apr 04 03:12:23 PM PDT 24 821657680 ps
T1217 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_rw.2255670369 Apr 04 03:12:23 PM PDT 24 Apr 04 03:12:25 PM PDT 24 587833661 ps
T370 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.3958085495 Apr 04 03:12:51 PM PDT 24 Apr 04 03:13:20 PM PDT 24 18948890568 ps
T1218 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.978199639 Apr 04 03:12:55 PM PDT 24 Apr 04 03:13:14 PM PDT 24 2316675075 ps
T1219 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_rw.2944561739 Apr 04 03:12:53 PM PDT 24 Apr 04 03:12:55 PM PDT 24 122862268 ps
T1220 /workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.2677253157 Apr 04 03:13:12 PM PDT 24 Apr 04 03:13:14 PM PDT 24 76727111 ps
T346 /workspace/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.2487064212 Apr 04 03:12:23 PM PDT 24 Apr 04 03:12:25 PM PDT 24 95474546 ps
T321 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.447845059 Apr 04 03:12:18 PM PDT 24 Apr 04 03:12:24 PM PDT 24 293112405 ps
T1221 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_errors.280348675 Apr 04 03:12:18 PM PDT 24 Apr 04 03:12:24 PM PDT 24 479638868 ps
T1222 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.445557989 Apr 04 03:12:57 PM PDT 24 Apr 04 03:12:59 PM PDT 24 119882869 ps
T1223 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.4287234290 Apr 04 03:12:27 PM PDT 24 Apr 04 03:12:32 PM PDT 24 768341856 ps
T1224 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.2963287090 Apr 04 03:12:25 PM PDT 24 Apr 04 03:12:31 PM PDT 24 1195029804 ps
T1225 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.3855006658 Apr 04 03:12:57 PM PDT 24 Apr 04 03:13:07 PM PDT 24 1395263128 ps
T1226 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_errors.3092794870 Apr 04 03:12:57 PM PDT 24 Apr 04 03:13:02 PM PDT 24 291187813 ps
T1227 /workspace/coverage/cover_reg_top/10.otp_ctrl_intr_test.3591999941 Apr 04 03:12:53 PM PDT 24 Apr 04 03:12:55 PM PDT 24 153623928 ps
T1228 /workspace/coverage/cover_reg_top/3.otp_ctrl_intr_test.470254619 Apr 04 03:12:18 PM PDT 24 Apr 04 03:12:19 PM PDT 24 77514515 ps
T322 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_rw.2096881772 Apr 04 03:12:16 PM PDT 24 Apr 04 03:12:18 PM PDT 24 82325371 ps
T1229 /workspace/coverage/cover_reg_top/19.otp_ctrl_intr_test.2179163559 Apr 04 03:12:56 PM PDT 24 Apr 04 03:12:57 PM PDT 24 40066944 ps
T1230 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_errors.2318884151 Apr 04 03:12:44 PM PDT 24 Apr 04 03:12:48 PM PDT 24 178951816 ps
T1231 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.2506659898 Apr 04 03:12:34 PM PDT 24 Apr 04 03:12:38 PM PDT 24 201034724 ps
T1232 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.4264929619 Apr 04 03:12:10 PM PDT 24 Apr 04 03:12:15 PM PDT 24 254327731 ps
T1233 /workspace/coverage/cover_reg_top/36.otp_ctrl_intr_test.2587315410 Apr 04 03:13:12 PM PDT 24 Apr 04 03:13:13 PM PDT 24 48182607 ps
T1234 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_walk.1150806234 Apr 04 03:12:19 PM PDT 24 Apr 04 03:12:21 PM PDT 24 69479373 ps
T1235 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.1517015768 Apr 04 03:12:27 PM PDT 24 Apr 04 03:12:31 PM PDT 24 194659773 ps
T1236 /workspace/coverage/cover_reg_top/18.otp_ctrl_intr_test.3214102595 Apr 04 03:12:55 PM PDT 24 Apr 04 03:12:57 PM PDT 24 548796897 ps
T1237 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_errors.152607672 Apr 04 03:12:55 PM PDT 24 Apr 04 03:13:00 PM PDT 24 162772978 ps
T1238 /workspace/coverage/cover_reg_top/32.otp_ctrl_intr_test.3124851655 Apr 04 03:13:13 PM PDT 24 Apr 04 03:13:14 PM PDT 24 71259685 ps
T327 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_rw.2129578611 Apr 04 03:12:13 PM PDT 24 Apr 04 03:12:16 PM PDT 24 702432405 ps
T1239 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_walk.883450969 Apr 04 03:12:27 PM PDT 24 Apr 04 03:12:29 PM PDT 24 110559958 ps
T283 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.2369593428 Apr 04 03:12:50 PM PDT 24 Apr 04 03:13:14 PM PDT 24 4745917378 ps
T1240 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.250554814 Apr 04 03:12:10 PM PDT 24 Apr 04 03:12:11 PM PDT 24 70370358 ps
T371 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.1174501332 Apr 04 03:12:01 PM PDT 24 Apr 04 03:12:12 PM PDT 24 832090247 ps
T1241 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.2845438363 Apr 04 03:12:13 PM PDT 24 Apr 04 03:12:19 PM PDT 24 3491417872 ps
T1242 /workspace/coverage/cover_reg_top/37.otp_ctrl_intr_test.1534655282 Apr 04 03:13:09 PM PDT 24 Apr 04 03:13:10 PM PDT 24 41665984 ps
T1243 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.16438993 Apr 04 03:12:57 PM PDT 24 Apr 04 03:13:00 PM PDT 24 210586480 ps
T1244 /workspace/coverage/cover_reg_top/14.otp_ctrl_intr_test.3348482903 Apr 04 03:12:52 PM PDT 24 Apr 04 03:12:53 PM PDT 24 42821801 ps
T1245 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.4208233895 Apr 04 03:12:10 PM PDT 24 Apr 04 03:12:16 PM PDT 24 3066199325 ps
T1246 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.2429424435 Apr 04 03:12:18 PM PDT 24 Apr 04 03:12:30 PM PDT 24 2522113828 ps
T1247 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_rw.4176117396 Apr 04 03:12:54 PM PDT 24 Apr 04 03:12:55 PM PDT 24 51136502 ps
T1248 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.439945907 Apr 04 03:12:18 PM PDT 24 Apr 04 03:12:20 PM PDT 24 71020334 ps
T1249 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_errors.3609307410 Apr 04 03:12:54 PM PDT 24 Apr 04 03:12:58 PM PDT 24 84028416 ps
T1250 /workspace/coverage/cover_reg_top/17.otp_ctrl_tl_errors.4256520213 Apr 04 03:12:57 PM PDT 24 Apr 04 03:13:02 PM PDT 24 182319332 ps
T326 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_rw.2290512978 Apr 04 03:12:48 PM PDT 24 Apr 04 03:12:50 PM PDT 24 156057418 ps
T1251 /workspace/coverage/cover_reg_top/39.otp_ctrl_intr_test.1506047815 Apr 04 03:13:12 PM PDT 24 Apr 04 03:13:14 PM PDT 24 136906775 ps
T373 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.3813501403 Apr 04 03:12:35 PM PDT 24 Apr 04 03:13:00 PM PDT 24 4802319778 ps
T1252 /workspace/coverage/cover_reg_top/29.otp_ctrl_intr_test.1426700816 Apr 04 03:13:11 PM PDT 24 Apr 04 03:13:13 PM PDT 24 84269495 ps
T323 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_rw.1099620906 Apr 04 03:12:52 PM PDT 24 Apr 04 03:12:54 PM PDT 24 57696381 ps
T1253 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.1338590267 Apr 04 03:12:53 PM PDT 24 Apr 04 03:12:56 PM PDT 24 113427966 ps
T1254 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.504451709 Apr 04 03:12:37 PM PDT 24 Apr 04 03:12:39 PM PDT 24 100906338 ps
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