SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
84.44 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 18 | 1 | 17 | 94.44 |
Crosses | 72 | 13 | 59 | 81.94 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
err_code_vals | 7 | 1 | 6 | 85.71 | 100 | 1 | 1 | 0 | |
partition | 11 | 0 | 11 | 100.00 | 100 | 1 | 1 | 0 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
dai_err_code_for_all_partitions | 72 | 13 | 59 | 81.94 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 7 | 1 | 6 | 85.71 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
macro_err | 0 | 1 | 1 |
NAME | COUNT | STATUS |
illegal_err | 0 | Illegal |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | 50717 | 1 | T6 | 111 | T7 | 19 | T4 | 34 | ||||
access_err | 63569 | 1 | T1 | 26 | T2 | 234 | T3 | 60 | ||||
write_blank_err | 464 | 1 | T5 | 1 | T14 | 1 | T36 | 4 | ||||
ecc_uncorr_err | 65894 | 1 | T7 | 39 | T5 | 408 | T14 | 239 | ||||
ecc_corr_err | 1367 | 1 | T1 | 11 | T7 | 11 | T23 | 7 | ||||
no_err | 93223 | 1 | T1 | 53 | T2 | 166 | T3 | 195 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 11 | 0 | 11 | 100.00 |
NAME | COUNT | STATUS |
illegal_idx | 0 | Excluded |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
life_cycle | 674 | 1 | T5 | 5 | T14 | 2 | T13 | 10 | ||||
secret2 | 25091 | 1 | T1 | 13 | T2 | 42 | T3 | 14 | ||||
secret1 | 29023 | 1 | T1 | 5 | T2 | 34 | T3 | 20 | ||||
secret0 | 32949 | 1 | T1 | 12 | T2 | 32 | T3 | 35 | ||||
hw_cfg1 | 42974 | 1 | T1 | 14 | T2 | 29 | T3 | 9 | ||||
hw_cfg0 | 25398 | 1 | T1 | 1 | T2 | 36 | T3 | 26 | ||||
rot_creator_auth_state | 23075 | 1 | T1 | 14 | T2 | 32 | T3 | 42 | ||||
rot_creator_auth_codesign | 21236 | 1 | T1 | 6 | T2 | 57 | T3 | 27 | ||||
owner_sw_cfg | 21019 | 1 | T1 | 8 | T2 | 59 | T3 | 32 | ||||
creator_sw_cfg | 20824 | 1 | T1 | 8 | T2 | 27 | T3 | 28 | ||||
vendor_test | 32971 | 1 | T1 | 9 | T2 | 52 | T3 | 22 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL | 72 | 13 | 59 | 81.94 | 13 |
Automatically Generated Cross Bins | 72 | 13 | 59 | 81.94 | 13 |
User Defined Cross Bins | 0 | 0 | 0 |
err_code_vals | partition | COUNT | AT LEAST | NUMBER | STATUS |
[fsm_err] | [life_cycle] | 0 | 1 | 1 | |
[ecc_corr_err] | [vendor_test] | 0 | 1 | 1 | |
[macro_err] | [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] | -- | -- | 10 | |
[no_err] | [life_cycle] | 0 | 1 | 1 |
err_code_vals | partition | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | secret2 | 3490 | 1 | T65 | 128 | T149 | 269 | T339 | 141 | ||||
fsm_err | secret1 | 4674 | 1 | T212 | 264 | T256 | 133 | T214 | 197 | ||||
fsm_err | secret0 | 4189 | 1 | T108 | 52 | T205 | 123 | T340 | 220 | ||||
fsm_err | hw_cfg1 | 3713 | 1 | T341 | 265 | T184 | 74 | T342 | 266 | ||||
fsm_err | hw_cfg0 | 6250 | 1 | T13 | 469 | T220 | 367 | T183 | 69 | ||||
fsm_err | rot_creator_auth_state | 4704 | 1 | T174 | 516 | T101 | 619 | T192 | 64 | ||||
fsm_err | rot_creator_auth_codesign | 2679 | 1 | T142 | 37 | T149 | 144 | T243 | 23 | ||||
fsm_err | owner_sw_cfg | 3511 | 1 | T142 | 39 | T343 | 40 | T143 | 33 | ||||
fsm_err | creator_sw_cfg | 2724 | 1 | T4 | 34 | T241 | 20 | T269 | 275 | ||||
fsm_err | vendor_test | 14783 | 1 | T6 | 111 | T7 | 19 | T23 | 24 | ||||
access_err | life_cycle | 674 | 1 | T5 | 5 | T14 | 2 | T13 | 10 | ||||
access_err | secret2 | 11199 | 1 | T2 | 37 | T3 | 10 | T6 | 1 | ||||
access_err | secret1 | 6126 | 1 | T2 | 27 | T9 | 5 | T23 | 2 | ||||
access_err | secret0 | 4909 | 1 | T1 | 4 | T2 | 31 | T3 | 1 | ||||
access_err | hw_cfg1 | 1368 | 1 | T1 | 1 | T2 | 4 | T3 | 1 | ||||
access_err | hw_cfg0 | 2373 | 1 | T2 | 3 | T106 | 4 | T35 | 2 | ||||
access_err | rot_creator_auth_state | 6001 | 1 | T1 | 6 | T2 | 13 | T3 | 12 | ||||
access_err | rot_creator_auth_codesign | 7977 | 1 | T1 | 3 | T2 | 36 | T3 | 5 | ||||
access_err | owner_sw_cfg | 6993 | 1 | T1 | 3 | T2 | 30 | T3 | 18 | ||||
access_err | creator_sw_cfg | 8224 | 1 | T1 | 4 | T2 | 19 | T3 | 7 | ||||
access_err | vendor_test | 7725 | 1 | T1 | 5 | T2 | 34 | T3 | 6 | ||||
write_blank_err | secret2 | 15 | 1 | T13 | 2 | T97 | 2 | T226 | 1 | ||||
write_blank_err | secret1 | 26 | 1 | T36 | 1 | T344 | 1 | T238 | 1 | ||||
write_blank_err | secret0 | 46 | 1 | T13 | 1 | T65 | 1 | T130 | 1 | ||||
write_blank_err | hw_cfg1 | 94 | 1 | T5 | 1 | T14 | 1 | T232 | 1 | ||||
write_blank_err | hw_cfg0 | 12 | 1 | T65 | 1 | T128 | 2 | T345 | 1 | ||||
write_blank_err | rot_creator_auth_state | 135 | 1 | T232 | 1 | T65 | 1 | T97 | 2 | ||||
write_blank_err | rot_creator_auth_codesign | 53 | 1 | T36 | 3 | T148 | 2 | T210 | 1 | ||||
write_blank_err | owner_sw_cfg | 34 | 1 | T148 | 5 | T346 | 6 | T347 | 1 | ||||
write_blank_err | creator_sw_cfg | 19 | 1 | T232 | 1 | T238 | 1 | T345 | 1 | ||||
write_blank_err | vendor_test | 30 | 1 | T65 | 1 | T97 | 1 | T128 | 1 | ||||
ecc_uncorr_err | secret2 | 5173 | 1 | T13 | 803 | T97 | 812 | T226 | 382 | ||||
ecc_uncorr_err | secret1 | 8870 | 1 | T7 | 11 | T36 | 443 | T179 | 3 | ||||
ecc_uncorr_err | secret0 | 15334 | 1 | T13 | 476 | T65 | 118 | T130 | 175 | ||||
ecc_uncorr_err | hw_cfg1 | 26776 | 1 | T5 | 408 | T14 | 239 | T232 | 229 | ||||
ecc_uncorr_err | hw_cfg0 | 3926 | 1 | T65 | 267 | T179 | 14 | T142 | 36 | ||||
ecc_uncorr_err | rot_creator_auth_state | 2977 | 1 | T7 | 28 | T139 | 10 | T269 | 212 | ||||
ecc_uncorr_err | rot_creator_auth_codesign | 1217 | 1 | T191 | 32 | T179 | 31 | T348 | 58 | ||||
ecc_uncorr_err | owner_sw_cfg | 812 | 1 | T179 | 15 | T142 | 36 | T348 | 55 | ||||
ecc_uncorr_err | creator_sw_cfg | 809 | 1 | T191 | 45 | T142 | 65 | T348 | 59 | ||||
ecc_corr_err | secret2 | 80 | 1 | T1 | 1 | T77 | 2 | T69 | 1 | ||||
ecc_corr_err | secret1 | 104 | 1 | T1 | 2 | T7 | 2 | T179 | 1 | ||||
ecc_corr_err | secret0 | 142 | 1 | T7 | 1 | T35 | 1 | T191 | 1 | ||||
ecc_corr_err | hw_cfg1 | 286 | 1 | T1 | 5 | T7 | 1 | T35 | 8 | ||||
ecc_corr_err | hw_cfg0 | 239 | 1 | T1 | 1 | T7 | 2 | T35 | 2 | ||||
ecc_corr_err | rot_creator_auth_state | 113 | 1 | T23 | 1 | T35 | 4 | T77 | 2 | ||||
ecc_corr_err | rot_creator_auth_codesign | 102 | 1 | T23 | 4 | T35 | 1 | T77 | 1 | ||||
ecc_corr_err | owner_sw_cfg | 149 | 1 | T1 | 1 | T35 | 2 | T77 | 2 | ||||
ecc_corr_err | creator_sw_cfg | 152 | 1 | T1 | 1 | T7 | 5 | T23 | 2 | ||||
no_err | secret2 | 5134 | 1 | T1 | 12 | T2 | 5 | T3 | 4 | ||||
no_err | secret1 | 9223 | 1 | T1 | 3 | T2 | 7 | T3 | 20 | ||||
no_err | secret0 | 8329 | 1 | T1 | 8 | T2 | 1 | T3 | 34 | ||||
no_err | hw_cfg1 | 10737 | 1 | T1 | 8 | T2 | 25 | T3 | 8 | ||||
no_err | hw_cfg0 | 12598 | 1 | T2 | 33 | T3 | 26 | T6 | 5 | ||||
no_err | rot_creator_auth_state | 9145 | 1 | T1 | 8 | T2 | 19 | T3 | 30 | ||||
no_err | rot_creator_auth_codesign | 9208 | 1 | T1 | 3 | T2 | 21 | T3 | 22 | ||||
no_err | owner_sw_cfg | 9520 | 1 | T1 | 4 | T2 | 29 | T3 | 14 | ||||
no_err | creator_sw_cfg | 8896 | 1 | T1 | 3 | T2 | 8 | T3 | 21 | ||||
no_err | vendor_test | 10433 | 1 | T1 | 4 | T2 | 18 | T3 | 16 |
NAME | COUNT | STATUS |
vendor_test_ecc_uncorrectable_err | 0 | Illegal |
life_cycle_ignore | 0 | Excluded |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |