Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.97 93.85 96.65 95.79 91.89 97.14 96.19 93.28


Total test records in report: 1326
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html

T1044 /workspace/coverage/default/92.otp_ctrl_init_fail.1601072767 Apr 15 03:22:43 PM PDT 24 Apr 15 03:22:49 PM PDT 24 418387452 ps
T1045 /workspace/coverage/default/17.otp_ctrl_dai_lock.444914533 Apr 15 03:19:53 PM PDT 24 Apr 15 03:20:06 PM PDT 24 401804382 ps
T1046 /workspace/coverage/default/53.otp_ctrl_parallel_lc_esc.247610986 Apr 15 03:22:08 PM PDT 24 Apr 15 03:22:15 PM PDT 24 383630501 ps
T88 /workspace/coverage/default/211.otp_ctrl_init_fail.2888559577 Apr 15 03:23:50 PM PDT 24 Apr 15 03:23:54 PM PDT 24 241603176 ps
T1047 /workspace/coverage/default/5.otp_ctrl_alert_test.1622905262 Apr 15 03:19:07 PM PDT 24 Apr 15 03:19:10 PM PDT 24 116013845 ps
T1048 /workspace/coverage/default/63.otp_ctrl_stress_all_with_rand_reset.328833984 Apr 15 03:22:16 PM PDT 24 Apr 15 03:49:11 PM PDT 24 82007523378 ps
T1049 /workspace/coverage/default/102.otp_ctrl_parallel_lc_esc.2159864866 Apr 15 03:22:51 PM PDT 24 Apr 15 03:22:59 PM PDT 24 3684194479 ps
T1050 /workspace/coverage/default/225.otp_ctrl_init_fail.34456347 Apr 15 03:23:54 PM PDT 24 Apr 15 03:24:00 PM PDT 24 412745373 ps
T1051 /workspace/coverage/default/170.otp_ctrl_init_fail.1381459692 Apr 15 03:23:32 PM PDT 24 Apr 15 03:23:37 PM PDT 24 446244698 ps
T1052 /workspace/coverage/default/35.otp_ctrl_parallel_lc_esc.2856022273 Apr 15 03:21:03 PM PDT 24 Apr 15 03:21:11 PM PDT 24 253205655 ps
T1053 /workspace/coverage/default/42.otp_ctrl_regwen.2577006155 Apr 15 03:21:40 PM PDT 24 Apr 15 03:21:46 PM PDT 24 148716905 ps
T1054 /workspace/coverage/default/40.otp_ctrl_parallel_lc_req.812591625 Apr 15 03:21:19 PM PDT 24 Apr 15 03:21:26 PM PDT 24 272987679 ps
T60 /workspace/coverage/default/22.otp_ctrl_check_fail.1717166265 Apr 15 03:20:12 PM PDT 24 Apr 15 03:21:03 PM PDT 24 3175454636 ps
T1055 /workspace/coverage/default/98.otp_ctrl_init_fail.2900209788 Apr 15 03:22:48 PM PDT 24 Apr 15 03:22:53 PM PDT 24 326151382 ps
T1056 /workspace/coverage/default/13.otp_ctrl_parallel_key_req.2575583158 Apr 15 03:19:33 PM PDT 24 Apr 15 03:19:59 PM PDT 24 10053498037 ps
T1057 /workspace/coverage/default/19.otp_ctrl_parallel_lc_esc.323470308 Apr 15 03:20:01 PM PDT 24 Apr 15 03:20:19 PM PDT 24 936138177 ps
T1058 /workspace/coverage/default/32.otp_ctrl_regwen.3960445519 Apr 15 03:20:50 PM PDT 24 Apr 15 03:21:00 PM PDT 24 3448665047 ps
T1059 /workspace/coverage/default/3.otp_ctrl_parallel_lc_req.1088882231 Apr 15 03:19:03 PM PDT 24 Apr 15 03:19:33 PM PDT 24 9383599129 ps
T1060 /workspace/coverage/default/11.otp_ctrl_stress_all_with_rand_reset.2004684057 Apr 15 03:19:27 PM PDT 24 Apr 15 03:31:10 PM PDT 24 479722281536 ps
T1061 /workspace/coverage/default/38.otp_ctrl_dai_errs.2512987975 Apr 15 03:21:16 PM PDT 24 Apr 15 03:21:43 PM PDT 24 2194343796 ps
T1062 /workspace/coverage/default/24.otp_ctrl_alert_test.600627733 Apr 15 03:20:21 PM PDT 24 Apr 15 03:20:23 PM PDT 24 287953425 ps
T1063 /workspace/coverage/default/135.otp_ctrl_parallel_lc_esc.3549162352 Apr 15 03:23:10 PM PDT 24 Apr 15 03:23:19 PM PDT 24 398355614 ps
T1064 /workspace/coverage/default/115.otp_ctrl_init_fail.244313061 Apr 15 03:22:52 PM PDT 24 Apr 15 03:22:56 PM PDT 24 199912902 ps
T1065 /workspace/coverage/default/12.otp_ctrl_dai_lock.2952721375 Apr 15 03:19:32 PM PDT 24 Apr 15 03:19:54 PM PDT 24 3050217053 ps
T1066 /workspace/coverage/default/6.otp_ctrl_test_access.1121404892 Apr 15 03:19:14 PM PDT 24 Apr 15 03:19:23 PM PDT 24 494606942 ps
T1067 /workspace/coverage/default/2.otp_ctrl_smoke.1043975366 Apr 15 03:18:55 PM PDT 24 Apr 15 03:19:11 PM PDT 24 1018411031 ps
T1068 /workspace/coverage/default/175.otp_ctrl_init_fail.2906640848 Apr 15 03:23:36 PM PDT 24 Apr 15 03:23:45 PM PDT 24 2639925603 ps
T1069 /workspace/coverage/default/6.otp_ctrl_parallel_lc_req.1185708482 Apr 15 03:19:14 PM PDT 24 Apr 15 03:19:45 PM PDT 24 12287924302 ps
T1070 /workspace/coverage/default/9.otp_ctrl_parallel_key_req.937451397 Apr 15 03:19:20 PM PDT 24 Apr 15 03:19:55 PM PDT 24 1292923639 ps
T1071 /workspace/coverage/default/15.otp_ctrl_regwen.4233557586 Apr 15 03:19:44 PM PDT 24 Apr 15 03:19:52 PM PDT 24 686398979 ps
T1072 /workspace/coverage/default/0.otp_ctrl_parallel_key_req.3041216928 Apr 15 03:18:55 PM PDT 24 Apr 15 03:19:22 PM PDT 24 1085998710 ps
T1073 /workspace/coverage/default/4.otp_ctrl_init_fail.697248918 Apr 15 03:19:02 PM PDT 24 Apr 15 03:19:08 PM PDT 24 373815533 ps
T1074 /workspace/coverage/default/118.otp_ctrl_init_fail.3533157863 Apr 15 03:22:58 PM PDT 24 Apr 15 03:23:03 PM PDT 24 196549821 ps
T1075 /workspace/coverage/default/78.otp_ctrl_stress_all_with_rand_reset.3833376914 Apr 15 03:22:31 PM PDT 24 Apr 15 03:41:58 PM PDT 24 718151085828 ps
T1076 /workspace/coverage/default/126.otp_ctrl_init_fail.3619832923 Apr 15 03:23:01 PM PDT 24 Apr 15 03:23:06 PM PDT 24 122788634 ps
T1077 /workspace/coverage/default/25.otp_ctrl_init_fail.3942105106 Apr 15 03:20:20 PM PDT 24 Apr 15 03:20:24 PM PDT 24 230685274 ps
T1078 /workspace/coverage/default/0.otp_ctrl_alert_test.88343405 Apr 15 03:18:49 PM PDT 24 Apr 15 03:18:52 PM PDT 24 102865063 ps
T1079 /workspace/coverage/default/27.otp_ctrl_parallel_key_req.3781536992 Apr 15 03:20:34 PM PDT 24 Apr 15 03:20:53 PM PDT 24 615249309 ps
T1080 /workspace/coverage/default/37.otp_ctrl_parallel_key_req.1093860464 Apr 15 03:21:12 PM PDT 24 Apr 15 03:21:27 PM PDT 24 562369753 ps
T1081 /workspace/coverage/default/15.otp_ctrl_init_fail.659057666 Apr 15 03:19:40 PM PDT 24 Apr 15 03:19:46 PM PDT 24 2507697385 ps
T1082 /workspace/coverage/default/12.otp_ctrl_parallel_key_req.2290096063 Apr 15 03:19:28 PM PDT 24 Apr 15 03:20:08 PM PDT 24 2139485947 ps
T1083 /workspace/coverage/default/34.otp_ctrl_smoke.2769042794 Apr 15 03:21:26 PM PDT 24 Apr 15 03:21:29 PM PDT 24 109352146 ps
T1084 /workspace/coverage/default/93.otp_ctrl_init_fail.1957358071 Apr 15 03:22:44 PM PDT 24 Apr 15 03:22:49 PM PDT 24 241808197 ps
T1085 /workspace/coverage/default/9.otp_ctrl_dai_lock.579128266 Apr 15 03:19:21 PM PDT 24 Apr 15 03:19:38 PM PDT 24 721599910 ps
T1086 /workspace/coverage/default/27.otp_ctrl_smoke.3687607178 Apr 15 03:20:30 PM PDT 24 Apr 15 03:20:39 PM PDT 24 3891608403 ps
T1087 /workspace/coverage/default/156.otp_ctrl_init_fail.1368487512 Apr 15 03:23:22 PM PDT 24 Apr 15 03:23:26 PM PDT 24 176215625 ps
T1088 /workspace/coverage/default/81.otp_ctrl_stress_all_with_rand_reset.1287696520 Apr 15 03:22:35 PM PDT 24 Apr 15 04:04:20 PM PDT 24 169858571164 ps
T1089 /workspace/coverage/default/21.otp_ctrl_macro_errs.406115500 Apr 15 03:20:10 PM PDT 24 Apr 15 03:21:23 PM PDT 24 33146983253 ps
T1090 /workspace/coverage/default/78.otp_ctrl_parallel_lc_esc.2997769794 Apr 15 03:22:29 PM PDT 24 Apr 15 03:22:44 PM PDT 24 320634184 ps
T1091 /workspace/coverage/default/1.otp_ctrl_parallel_lc_req.3543015015 Apr 15 03:18:52 PM PDT 24 Apr 15 03:19:03 PM PDT 24 674287134 ps
T1092 /workspace/coverage/default/93.otp_ctrl_parallel_lc_esc.2113208358 Apr 15 03:22:43 PM PDT 24 Apr 15 03:22:50 PM PDT 24 228877599 ps
T1093 /workspace/coverage/default/40.otp_ctrl_init_fail.2686170825 Apr 15 03:21:19 PM PDT 24 Apr 15 03:21:24 PM PDT 24 224040151 ps
T1094 /workspace/coverage/default/10.otp_ctrl_stress_all.351764362 Apr 15 03:19:30 PM PDT 24 Apr 15 03:19:53 PM PDT 24 7442491841 ps
T1095 /workspace/coverage/default/34.otp_ctrl_parallel_lc_esc.3650671422 Apr 15 03:20:59 PM PDT 24 Apr 15 03:21:03 PM PDT 24 167755999 ps
T1096 /workspace/coverage/default/52.otp_ctrl_init_fail.4060742774 Apr 15 03:22:05 PM PDT 24 Apr 15 03:22:10 PM PDT 24 267224678 ps
T1097 /workspace/coverage/default/213.otp_ctrl_init_fail.2442579726 Apr 15 03:23:50 PM PDT 24 Apr 15 03:23:55 PM PDT 24 244662754 ps
T1098 /workspace/coverage/default/6.otp_ctrl_stress_all.3419747559 Apr 15 03:19:11 PM PDT 24 Apr 15 03:24:22 PM PDT 24 32786581384 ps
T1099 /workspace/coverage/default/288.otp_ctrl_init_fail.3301300312 Apr 15 03:24:13 PM PDT 24 Apr 15 03:24:18 PM PDT 24 129777269 ps
T1100 /workspace/coverage/default/40.otp_ctrl_dai_lock.840628508 Apr 15 03:21:21 PM PDT 24 Apr 15 03:21:38 PM PDT 24 481835730 ps
T1101 /workspace/coverage/default/10.otp_ctrl_dai_lock.2757514351 Apr 15 03:19:24 PM PDT 24 Apr 15 03:19:37 PM PDT 24 1239754991 ps
T1102 /workspace/coverage/default/36.otp_ctrl_dai_errs.4035661000 Apr 15 03:21:08 PM PDT 24 Apr 15 03:21:32 PM PDT 24 1373964705 ps
T1103 /workspace/coverage/default/254.otp_ctrl_init_fail.4062951167 Apr 15 03:24:07 PM PDT 24 Apr 15 03:24:11 PM PDT 24 130105023 ps
T1104 /workspace/coverage/default/61.otp_ctrl_init_fail.4230660641 Apr 15 03:22:16 PM PDT 24 Apr 15 03:22:23 PM PDT 24 162918812 ps
T1105 /workspace/coverage/default/7.otp_ctrl_smoke.2210741753 Apr 15 03:19:12 PM PDT 24 Apr 15 03:19:24 PM PDT 24 1106728413 ps
T1106 /workspace/coverage/default/176.otp_ctrl_init_fail.2182858601 Apr 15 03:23:32 PM PDT 24 Apr 15 03:23:37 PM PDT 24 673414910 ps
T1107 /workspace/coverage/default/26.otp_ctrl_parallel_lc_esc.3280946736 Apr 15 03:20:24 PM PDT 24 Apr 15 03:20:31 PM PDT 24 243162017 ps
T1108 /workspace/coverage/default/33.otp_ctrl_dai_lock.2289561668 Apr 15 03:20:53 PM PDT 24 Apr 15 03:21:17 PM PDT 24 1297820399 ps
T1109 /workspace/coverage/default/5.otp_ctrl_regwen.2276710356 Apr 15 03:19:14 PM PDT 24 Apr 15 03:19:21 PM PDT 24 239460337 ps
T1110 /workspace/coverage/default/6.otp_ctrl_check_fail.4024065258 Apr 15 03:19:14 PM PDT 24 Apr 15 03:19:36 PM PDT 24 7665718140 ps
T1111 /workspace/coverage/default/37.otp_ctrl_stress_all.171941664 Apr 15 03:21:12 PM PDT 24 Apr 15 03:23:59 PM PDT 24 92676849666 ps
T1112 /workspace/coverage/default/40.otp_ctrl_stress_all.2139521773 Apr 15 03:21:23 PM PDT 24 Apr 15 03:24:08 PM PDT 24 14806703005 ps
T1113 /workspace/coverage/default/37.otp_ctrl_regwen.1595112622 Apr 15 03:21:11 PM PDT 24 Apr 15 03:21:17 PM PDT 24 160416124 ps
T1114 /workspace/coverage/default/23.otp_ctrl_test_access.933711312 Apr 15 03:20:15 PM PDT 24 Apr 15 03:20:33 PM PDT 24 572408829 ps
T1115 /workspace/coverage/default/28.otp_ctrl_stress_all_with_rand_reset.1666998831 Apr 15 03:20:38 PM PDT 24 Apr 15 03:32:02 PM PDT 24 91923705667 ps
T1116 /workspace/coverage/default/11.otp_ctrl_regwen.225027892 Apr 15 03:19:30 PM PDT 24 Apr 15 03:19:38 PM PDT 24 254783423 ps
T1117 /workspace/coverage/default/44.otp_ctrl_stress_all.3269134513 Apr 15 03:21:42 PM PDT 24 Apr 15 03:25:29 PM PDT 24 17029326745 ps
T1118 /workspace/coverage/default/224.otp_ctrl_init_fail.387881384 Apr 15 03:23:53 PM PDT 24 Apr 15 03:24:00 PM PDT 24 1842316583 ps
T1119 /workspace/coverage/default/117.otp_ctrl_init_fail.3739791076 Apr 15 03:22:54 PM PDT 24 Apr 15 03:22:59 PM PDT 24 438914599 ps
T1120 /workspace/coverage/default/27.otp_ctrl_alert_test.2998991246 Apr 15 03:20:36 PM PDT 24 Apr 15 03:20:39 PM PDT 24 171836935 ps
T1121 /workspace/coverage/default/49.otp_ctrl_init_fail.587744038 Apr 15 03:22:00 PM PDT 24 Apr 15 03:22:06 PM PDT 24 2173524672 ps
T1122 /workspace/coverage/default/189.otp_ctrl_parallel_lc_esc.1924239697 Apr 15 03:23:42 PM PDT 24 Apr 15 03:23:58 PM PDT 24 816313372 ps
T1123 /workspace/coverage/default/8.otp_ctrl_regwen.1317170816 Apr 15 03:19:16 PM PDT 24 Apr 15 03:19:28 PM PDT 24 1258524882 ps
T1124 /workspace/coverage/default/20.otp_ctrl_check_fail.3852239314 Apr 15 03:20:05 PM PDT 24 Apr 15 03:20:24 PM PDT 24 2753687752 ps
T1125 /workspace/coverage/default/186.otp_ctrl_init_fail.3845487628 Apr 15 03:23:39 PM PDT 24 Apr 15 03:23:44 PM PDT 24 155578497 ps
T1126 /workspace/coverage/default/21.otp_ctrl_stress_all_with_rand_reset.466058014 Apr 15 03:20:07 PM PDT 24 Apr 15 03:28:40 PM PDT 24 54600268732 ps
T1127 /workspace/coverage/default/46.otp_ctrl_stress_all_with_rand_reset.1852840524 Apr 15 03:21:47 PM PDT 24 Apr 15 03:42:26 PM PDT 24 46873261747 ps
T1128 /workspace/coverage/default/147.otp_ctrl_init_fail.2439744315 Apr 15 03:23:13 PM PDT 24 Apr 15 03:23:18 PM PDT 24 205572252 ps
T1129 /workspace/coverage/default/14.otp_ctrl_parallel_lc_req.687240893 Apr 15 03:19:38 PM PDT 24 Apr 15 03:20:15 PM PDT 24 12386244167 ps
T1130 /workspace/coverage/default/12.otp_ctrl_parallel_lc_req.3625094199 Apr 15 03:19:24 PM PDT 24 Apr 15 03:19:44 PM PDT 24 971465104 ps
T1131 /workspace/coverage/default/38.otp_ctrl_parallel_lc_esc.3110538165 Apr 15 03:21:17 PM PDT 24 Apr 15 03:21:22 PM PDT 24 567737723 ps
T1132 /workspace/coverage/default/157.otp_ctrl_init_fail.1709193958 Apr 15 03:23:24 PM PDT 24 Apr 15 03:23:29 PM PDT 24 289969084 ps
T1133 /workspace/coverage/default/290.otp_ctrl_init_fail.2600009928 Apr 15 03:24:19 PM PDT 24 Apr 15 03:24:24 PM PDT 24 227429912 ps
T1134 /workspace/coverage/default/113.otp_ctrl_parallel_lc_esc.2050704856 Apr 15 03:22:52 PM PDT 24 Apr 15 03:23:17 PM PDT 24 1420508667 ps
T1135 /workspace/coverage/default/165.otp_ctrl_init_fail.1073787105 Apr 15 03:23:25 PM PDT 24 Apr 15 03:23:30 PM PDT 24 373830892 ps
T1136 /workspace/coverage/default/96.otp_ctrl_init_fail.1276612957 Apr 15 03:22:43 PM PDT 24 Apr 15 03:22:49 PM PDT 24 190853767 ps
T1137 /workspace/coverage/default/119.otp_ctrl_parallel_lc_esc.3986834635 Apr 15 03:23:00 PM PDT 24 Apr 15 03:23:04 PM PDT 24 144405734 ps
T111 /workspace/coverage/default/160.otp_ctrl_parallel_lc_esc.798838269 Apr 15 03:23:23 PM PDT 24 Apr 15 03:23:32 PM PDT 24 181002211 ps
T1138 /workspace/coverage/default/14.otp_ctrl_stress_all.1755656895 Apr 15 03:19:40 PM PDT 24 Apr 15 03:20:02 PM PDT 24 1310603629 ps
T1139 /workspace/coverage/default/16.otp_ctrl_smoke.920776625 Apr 15 03:19:51 PM PDT 24 Apr 15 03:19:59 PM PDT 24 553025021 ps
T1140 /workspace/coverage/default/79.otp_ctrl_init_fail.3863476031 Apr 15 03:22:31 PM PDT 24 Apr 15 03:22:37 PM PDT 24 520033180 ps
T1141 /workspace/coverage/default/12.otp_ctrl_test_access.2506505302 Apr 15 03:19:29 PM PDT 24 Apr 15 03:19:33 PM PDT 24 142362345 ps
T1142 /workspace/coverage/default/46.otp_ctrl_macro_errs.3306349974 Apr 15 03:21:48 PM PDT 24 Apr 15 03:22:00 PM PDT 24 4459231409 ps
T1143 /workspace/coverage/default/15.otp_ctrl_alert_test.3183712865 Apr 15 03:19:45 PM PDT 24 Apr 15 03:19:47 PM PDT 24 74615660 ps
T1144 /workspace/coverage/default/111.otp_ctrl_parallel_lc_esc.3291762523 Apr 15 03:22:51 PM PDT 24 Apr 15 03:22:59 PM PDT 24 277663409 ps
T1145 /workspace/coverage/default/215.otp_ctrl_init_fail.1364950510 Apr 15 03:23:48 PM PDT 24 Apr 15 03:23:53 PM PDT 24 1345808348 ps
T1146 /workspace/coverage/default/45.otp_ctrl_test_access.1125855193 Apr 15 03:21:45 PM PDT 24 Apr 15 03:22:06 PM PDT 24 1874391399 ps
T1147 /workspace/coverage/default/194.otp_ctrl_parallel_lc_esc.810104454 Apr 15 03:23:42 PM PDT 24 Apr 15 03:23:50 PM PDT 24 337685884 ps
T1148 /workspace/coverage/default/32.otp_ctrl_parallel_lc_req.987168934 Apr 15 03:20:52 PM PDT 24 Apr 15 03:21:18 PM PDT 24 810489417 ps
T1149 /workspace/coverage/default/4.otp_ctrl_test_access.1693510390 Apr 15 03:19:02 PM PDT 24 Apr 15 03:19:33 PM PDT 24 1382082315 ps
T1150 /workspace/coverage/default/14.otp_ctrl_alert_test.609335002 Apr 15 03:19:43 PM PDT 24 Apr 15 03:19:45 PM PDT 24 197014357 ps
T1151 /workspace/coverage/default/0.otp_ctrl_low_freq_read.2920790044 Apr 15 03:18:44 PM PDT 24 Apr 15 03:19:03 PM PDT 24 7997563312 ps
T1152 /workspace/coverage/default/85.otp_ctrl_parallel_lc_esc.2067912796 Apr 15 03:22:38 PM PDT 24 Apr 15 03:22:43 PM PDT 24 1620572606 ps
T1153 /workspace/coverage/default/20.otp_ctrl_parallel_lc_esc.1728665868 Apr 15 03:20:09 PM PDT 24 Apr 15 03:20:18 PM PDT 24 274570367 ps
T1154 /workspace/coverage/default/44.otp_ctrl_smoke.198596988 Apr 15 03:21:39 PM PDT 24 Apr 15 03:21:50 PM PDT 24 309232238 ps
T1155 /workspace/coverage/default/37.otp_ctrl_alert_test.2828770730 Apr 15 03:21:12 PM PDT 24 Apr 15 03:21:15 PM PDT 24 786848374 ps
T1156 /workspace/coverage/default/178.otp_ctrl_parallel_lc_esc.3888788366 Apr 15 03:23:34 PM PDT 24 Apr 15 03:23:37 PM PDT 24 153603645 ps
T1157 /workspace/coverage/default/15.otp_ctrl_stress_all.406039104 Apr 15 03:19:46 PM PDT 24 Apr 15 03:19:53 PM PDT 24 287161707 ps
T1158 /workspace/coverage/default/180.otp_ctrl_parallel_lc_esc.1666173035 Apr 15 03:23:35 PM PDT 24 Apr 15 03:23:50 PM PDT 24 5572314748 ps
T1159 /workspace/coverage/default/19.otp_ctrl_dai_lock.786125653 Apr 15 03:19:57 PM PDT 24 Apr 15 03:20:14 PM PDT 24 902689127 ps
T1160 /workspace/coverage/default/285.otp_ctrl_init_fail.2764475322 Apr 15 03:24:08 PM PDT 24 Apr 15 03:24:12 PM PDT 24 173797996 ps
T1161 /workspace/coverage/default/17.otp_ctrl_stress_all_with_rand_reset.1436829558 Apr 15 03:19:56 PM PDT 24 Apr 15 03:26:46 PM PDT 24 14055167995 ps
T1162 /workspace/coverage/default/264.otp_ctrl_init_fail.2783823818 Apr 15 03:24:07 PM PDT 24 Apr 15 03:24:11 PM PDT 24 377874091 ps
T1163 /workspace/coverage/default/6.otp_ctrl_macro_errs.2159445813 Apr 15 03:19:14 PM PDT 24 Apr 15 03:19:30 PM PDT 24 902497685 ps
T1164 /workspace/coverage/default/158.otp_ctrl_init_fail.358917123 Apr 15 03:23:21 PM PDT 24 Apr 15 03:23:25 PM PDT 24 171540352 ps
T1165 /workspace/coverage/default/10.otp_ctrl_test_access.2273328249 Apr 15 03:19:29 PM PDT 24 Apr 15 03:19:52 PM PDT 24 10440135423 ps
T1166 /workspace/coverage/default/48.otp_ctrl_check_fail.3697367649 Apr 15 03:21:56 PM PDT 24 Apr 15 03:22:06 PM PDT 24 305908084 ps
T1167 /workspace/coverage/default/12.otp_ctrl_stress_all.1631492494 Apr 15 03:19:30 PM PDT 24 Apr 15 03:21:14 PM PDT 24 36535056720 ps
T1168 /workspace/coverage/default/157.otp_ctrl_parallel_lc_esc.4044594034 Apr 15 03:23:23 PM PDT 24 Apr 15 03:23:29 PM PDT 24 286214329 ps
T1169 /workspace/coverage/default/18.otp_ctrl_smoke.3651749885 Apr 15 03:19:55 PM PDT 24 Apr 15 03:20:03 PM PDT 24 3885913649 ps
T1170 /workspace/coverage/default/11.otp_ctrl_dai_lock.2032636796 Apr 15 03:19:28 PM PDT 24 Apr 15 03:19:43 PM PDT 24 1376222869 ps
T1171 /workspace/coverage/default/198.otp_ctrl_parallel_lc_esc.2391186313 Apr 15 03:23:48 PM PDT 24 Apr 15 03:24:23 PM PDT 24 2379450567 ps
T1172 /workspace/coverage/default/54.otp_ctrl_init_fail.3950695362 Apr 15 03:22:06 PM PDT 24 Apr 15 03:22:11 PM PDT 24 394318353 ps
T1173 /workspace/coverage/default/95.otp_ctrl_init_fail.1674332690 Apr 15 03:22:43 PM PDT 24 Apr 15 03:22:47 PM PDT 24 112403405 ps
T1174 /workspace/coverage/default/17.otp_ctrl_stress_all.1245490098 Apr 15 03:19:59 PM PDT 24 Apr 15 03:22:09 PM PDT 24 36519654255 ps
T1175 /workspace/coverage/default/257.otp_ctrl_init_fail.1285270622 Apr 15 03:24:01 PM PDT 24 Apr 15 03:24:06 PM PDT 24 606037276 ps
T1176 /workspace/coverage/default/24.otp_ctrl_parallel_lc_esc.4080264715 Apr 15 03:20:18 PM PDT 24 Apr 15 03:20:23 PM PDT 24 378023281 ps
T1177 /workspace/coverage/default/197.otp_ctrl_init_fail.481360684 Apr 15 03:23:45 PM PDT 24 Apr 15 03:23:49 PM PDT 24 480115316 ps
T1178 /workspace/coverage/default/15.otp_ctrl_smoke.3624313033 Apr 15 03:19:41 PM PDT 24 Apr 15 03:19:48 PM PDT 24 3149655276 ps
T1179 /workspace/coverage/default/25.otp_ctrl_regwen.704148948 Apr 15 03:20:18 PM PDT 24 Apr 15 03:20:24 PM PDT 24 375102677 ps
T1180 /workspace/coverage/default/58.otp_ctrl_parallel_lc_esc.859352641 Apr 15 03:22:08 PM PDT 24 Apr 15 03:22:30 PM PDT 24 1796742627 ps
T1181 /workspace/coverage/default/28.otp_ctrl_dai_lock.316198786 Apr 15 03:20:35 PM PDT 24 Apr 15 03:20:59 PM PDT 24 2929743363 ps
T1182 /workspace/coverage/default/78.otp_ctrl_init_fail.885565253 Apr 15 03:22:35 PM PDT 24 Apr 15 03:22:39 PM PDT 24 238867030 ps
T1183 /workspace/coverage/default/3.otp_ctrl_test_access.1947585331 Apr 15 03:18:58 PM PDT 24 Apr 15 03:19:21 PM PDT 24 697065167 ps
T1184 /workspace/coverage/default/72.otp_ctrl_init_fail.2383292106 Apr 15 03:22:22 PM PDT 24 Apr 15 03:22:27 PM PDT 24 170012281 ps
T1185 /workspace/coverage/default/122.otp_ctrl_parallel_lc_esc.580424098 Apr 15 03:22:57 PM PDT 24 Apr 15 03:23:20 PM PDT 24 5212044756 ps
T1186 /workspace/coverage/default/69.otp_ctrl_parallel_lc_esc.3661727422 Apr 15 03:22:22 PM PDT 24 Apr 15 03:22:56 PM PDT 24 2774086085 ps
T229 /workspace/coverage/default/98.otp_ctrl_parallel_lc_esc.2003402638 Apr 15 03:22:46 PM PDT 24 Apr 15 03:22:52 PM PDT 24 208931856 ps
T1187 /workspace/coverage/default/64.otp_ctrl_init_fail.873337113 Apr 15 03:22:13 PM PDT 24 Apr 15 03:22:17 PM PDT 24 131885366 ps
T1188 /workspace/coverage/default/116.otp_ctrl_init_fail.3971194869 Apr 15 03:22:54 PM PDT 24 Apr 15 03:22:59 PM PDT 24 132326323 ps
T1189 /workspace/coverage/default/31.otp_ctrl_stress_all.3303762797 Apr 15 03:20:50 PM PDT 24 Apr 15 03:25:49 PM PDT 24 38977322145 ps
T1190 /workspace/coverage/default/15.otp_ctrl_dai_errs.860290186 Apr 15 03:19:48 PM PDT 24 Apr 15 03:20:09 PM PDT 24 2011981315 ps
T1191 /workspace/coverage/cover_reg_top/17.otp_ctrl_intr_test.1616928539 Apr 15 12:36:36 PM PDT 24 Apr 15 12:36:39 PM PDT 24 130993104 ps
T263 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_rw.3372654262 Apr 15 12:36:39 PM PDT 24 Apr 15 12:36:42 PM PDT 24 629222250 ps
T1192 /workspace/coverage/cover_reg_top/20.otp_ctrl_intr_test.2597077502 Apr 15 12:36:49 PM PDT 24 Apr 15 12:36:52 PM PDT 24 578438087 ps
T260 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.2763145964 Apr 15 12:36:33 PM PDT 24 Apr 15 12:37:00 PM PDT 24 19000570649 ps
T1193 /workspace/coverage/cover_reg_top/38.otp_ctrl_intr_test.1943153343 Apr 15 12:36:40 PM PDT 24 Apr 15 12:36:42 PM PDT 24 41255110 ps
T1194 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.615996250 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:45 PM PDT 24 140275776 ps
T265 /workspace/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.1637154898 Apr 15 12:36:44 PM PDT 24 Apr 15 12:36:48 PM PDT 24 63167174 ps
T264 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.2365963181 Apr 15 12:36:33 PM PDT 24 Apr 15 12:36:42 PM PDT 24 3589522263 ps
T1195 /workspace/coverage/cover_reg_top/40.otp_ctrl_intr_test.3496700007 Apr 15 12:36:44 PM PDT 24 Apr 15 12:36:47 PM PDT 24 73514128 ps
T1196 /workspace/coverage/cover_reg_top/41.otp_ctrl_intr_test.1734685629 Apr 15 12:36:46 PM PDT 24 Apr 15 12:36:50 PM PDT 24 137328990 ps
T1197 /workspace/coverage/cover_reg_top/21.otp_ctrl_intr_test.2956156709 Apr 15 12:36:43 PM PDT 24 Apr 15 12:36:47 PM PDT 24 565293018 ps
T261 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.1466138114 Apr 15 12:36:33 PM PDT 24 Apr 15 12:36:54 PM PDT 24 20481430672 ps
T365 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.491930076 Apr 15 12:36:23 PM PDT 24 Apr 15 12:36:28 PM PDT 24 1004223349 ps
T1198 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.632801876 Apr 15 12:36:46 PM PDT 24 Apr 15 12:36:51 PM PDT 24 285836485 ps
T333 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.4161748683 Apr 15 12:36:21 PM PDT 24 Apr 15 12:36:30 PM PDT 24 715599194 ps
T319 /workspace/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.1211225872 Apr 15 12:36:36 PM PDT 24 Apr 15 12:36:38 PM PDT 24 61222366 ps
T1199 /workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.673337122 Apr 15 12:36:47 PM PDT 24 Apr 15 12:36:51 PM PDT 24 528877903 ps
T320 /workspace/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.485887094 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:46 PM PDT 24 68744465 ps
T1200 /workspace/coverage/cover_reg_top/35.otp_ctrl_intr_test.1423845049 Apr 15 12:36:48 PM PDT 24 Apr 15 12:36:51 PM PDT 24 98763912 ps
T1201 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_errors.173638275 Apr 15 12:36:45 PM PDT 24 Apr 15 12:36:50 PM PDT 24 182366711 ps
T1202 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.1497114216 Apr 15 12:36:22 PM PDT 24 Apr 15 12:36:25 PM PDT 24 1566893224 ps
T1203 /workspace/coverage/cover_reg_top/31.otp_ctrl_intr_test.2664837317 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:44 PM PDT 24 86747937 ps
T1204 /workspace/coverage/cover_reg_top/9.otp_ctrl_intr_test.2611680319 Apr 15 12:36:39 PM PDT 24 Apr 15 12:36:41 PM PDT 24 75788768 ps
T1205 /workspace/coverage/cover_reg_top/44.otp_ctrl_intr_test.2826711951 Apr 15 12:36:46 PM PDT 24 Apr 15 12:36:50 PM PDT 24 68609621 ps
T1206 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_errors.1743244954 Apr 15 12:36:24 PM PDT 24 Apr 15 12:36:31 PM PDT 24 1180881144 ps
T321 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_rw.1931041880 Apr 15 12:36:37 PM PDT 24 Apr 15 12:36:39 PM PDT 24 131356463 ps
T290 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.2611273039 Apr 15 12:36:34 PM PDT 24 Apr 15 12:36:36 PM PDT 24 65389873 ps
T1207 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_errors.2270351735 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:48 PM PDT 24 239952567 ps
T1208 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_errors.3010650395 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:48 PM PDT 24 370663013 ps
T1209 /workspace/coverage/cover_reg_top/8.otp_ctrl_intr_test.1258873527 Apr 15 12:36:34 PM PDT 24 Apr 15 12:36:36 PM PDT 24 143588397 ps
T1210 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_errors.797487191 Apr 15 12:36:49 PM PDT 24 Apr 15 12:36:54 PM PDT 24 115494988 ps
T1211 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_errors.4059225243 Apr 15 12:36:45 PM PDT 24 Apr 15 12:36:52 PM PDT 24 259383938 ps
T291 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_rw.1950351812 Apr 15 12:36:44 PM PDT 24 Apr 15 12:36:47 PM PDT 24 38226033 ps
T1212 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.2642975574 Apr 15 12:36:27 PM PDT 24 Apr 15 12:36:33 PM PDT 24 264619182 ps
T322 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_rw.225095188 Apr 15 12:36:40 PM PDT 24 Apr 15 12:36:43 PM PDT 24 674141427 ps
T1213 /workspace/coverage/cover_reg_top/10.otp_ctrl_intr_test.505929813 Apr 15 12:36:41 PM PDT 24 Apr 15 12:36:44 PM PDT 24 69980275 ps
T1214 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_errors.3043838183 Apr 15 12:36:38 PM PDT 24 Apr 15 12:36:44 PM PDT 24 209103890 ps
T262 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.4126180673 Apr 15 12:36:22 PM PDT 24 Apr 15 12:36:33 PM PDT 24 739795162 ps
T1215 /workspace/coverage/cover_reg_top/17.otp_ctrl_tl_errors.3010069459 Apr 15 12:36:44 PM PDT 24 Apr 15 12:36:50 PM PDT 24 140251935 ps
T292 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.3377766465 Apr 15 12:36:22 PM PDT 24 Apr 15 12:36:27 PM PDT 24 192327864 ps
T323 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_rw.1191300429 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:46 PM PDT 24 547885672 ps
T1216 /workspace/coverage/cover_reg_top/29.otp_ctrl_intr_test.958945521 Apr 15 12:36:47 PM PDT 24 Apr 15 12:36:51 PM PDT 24 135024654 ps
T324 /workspace/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.4178497864 Apr 15 12:36:37 PM PDT 24 Apr 15 12:36:40 PM PDT 24 131142753 ps
T351 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.557078453 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:54 PM PDT 24 1229198381 ps
T1217 /workspace/coverage/cover_reg_top/19.otp_ctrl_intr_test.3788652761 Apr 15 12:36:47 PM PDT 24 Apr 15 12:36:51 PM PDT 24 38629738 ps
T325 /workspace/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.2956283480 Apr 15 12:36:32 PM PDT 24 Apr 15 12:36:37 PM PDT 24 1639006486 ps
T326 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_rw.2462897441 Apr 15 12:36:30 PM PDT 24 Apr 15 12:36:32 PM PDT 24 528980267 ps
T349 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.1280387671 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:54 PM PDT 24 2508594275 ps
T327 /workspace/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.1731760693 Apr 15 12:36:25 PM PDT 24 Apr 15 12:36:28 PM PDT 24 62868929 ps
T1218 /workspace/coverage/cover_reg_top/16.otp_ctrl_csr_rw.2880287183 Apr 15 12:36:43 PM PDT 24 Apr 15 12:36:47 PM PDT 24 574431118 ps
T293 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.2693201334 Apr 15 12:36:20 PM PDT 24 Apr 15 12:36:24 PM PDT 24 219448641 ps
T266 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.3761717834 Apr 15 12:36:27 PM PDT 24 Apr 15 12:36:51 PM PDT 24 2478117204 ps
T350 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.4016223785 Apr 15 12:36:41 PM PDT 24 Apr 15 12:37:07 PM PDT 24 2107343826 ps
T1219 /workspace/coverage/cover_reg_top/34.otp_ctrl_intr_test.1105008521 Apr 15 12:36:55 PM PDT 24 Apr 15 12:36:57 PM PDT 24 135949557 ps
T1220 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.1439285098 Apr 15 12:36:26 PM PDT 24 Apr 15 12:36:29 PM PDT 24 99947914 ps
T1221 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.3739676247 Apr 15 12:36:43 PM PDT 24 Apr 15 12:36:48 PM PDT 24 232541035 ps
T1222 /workspace/coverage/cover_reg_top/13.otp_ctrl_intr_test.1086572696 Apr 15 12:36:45 PM PDT 24 Apr 15 12:36:48 PM PDT 24 38689516 ps
T1223 /workspace/coverage/cover_reg_top/32.otp_ctrl_intr_test.17342016 Apr 15 12:36:47 PM PDT 24 Apr 15 12:36:51 PM PDT 24 141033856 ps
T355 /workspace/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.1036274844 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:53 PM PDT 24 2666841797 ps
T1224 /workspace/coverage/cover_reg_top/23.otp_ctrl_intr_test.2938276053 Apr 15 12:36:46 PM PDT 24 Apr 15 12:36:49 PM PDT 24 44140849 ps
T1225 /workspace/coverage/cover_reg_top/24.otp_ctrl_intr_test.4163679525 Apr 15 12:36:47 PM PDT 24 Apr 15 12:36:51 PM PDT 24 151703716 ps
T1226 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_errors.1759041567 Apr 15 12:36:36 PM PDT 24 Apr 15 12:36:40 PM PDT 24 372867948 ps
T1227 /workspace/coverage/cover_reg_top/4.otp_ctrl_intr_test.2414678050 Apr 15 12:36:21 PM PDT 24 Apr 15 12:36:23 PM PDT 24 146117966 ps
T304 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_rw.4080261920 Apr 15 12:36:39 PM PDT 24 Apr 15 12:36:41 PM PDT 24 73325268 ps
T1228 /workspace/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.1274020115 Apr 15 12:36:46 PM PDT 24 Apr 15 12:36:50 PM PDT 24 194206380 ps
T1229 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.3382295545 Apr 15 12:36:24 PM PDT 24 Apr 15 12:36:26 PM PDT 24 37259726 ps
T1230 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_errors.1833736504 Apr 15 12:36:41 PM PDT 24 Apr 15 12:36:46 PM PDT 24 107294076 ps
T305 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_rw.1368103319 Apr 15 12:36:39 PM PDT 24 Apr 15 12:36:41 PM PDT 24 665384681 ps
T1231 /workspace/coverage/cover_reg_top/15.otp_ctrl_intr_test.1597520482 Apr 15 12:36:45 PM PDT 24 Apr 15 12:36:49 PM PDT 24 151036234 ps
T1232 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.680687320 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:55 PM PDT 24 711004896 ps
T1233 /workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.2542532066 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:46 PM PDT 24 42068657 ps
T1234 /workspace/coverage/cover_reg_top/37.otp_ctrl_intr_test.3311339665 Apr 15 12:36:45 PM PDT 24 Apr 15 12:36:49 PM PDT 24 126783301 ps
T1235 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.52591749 Apr 15 12:36:47 PM PDT 24 Apr 15 12:36:52 PM PDT 24 217820239 ps
T1236 /workspace/coverage/cover_reg_top/25.otp_ctrl_intr_test.2561172432 Apr 15 12:36:45 PM PDT 24 Apr 15 12:36:48 PM PDT 24 42297381 ps
T1237 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.1508974594 Apr 15 12:36:46 PM PDT 24 Apr 15 12:36:51 PM PDT 24 71249073 ps
T1238 /workspace/coverage/cover_reg_top/7.otp_ctrl_intr_test.2417424544 Apr 15 12:36:39 PM PDT 24 Apr 15 12:36:41 PM PDT 24 66730731 ps
T303 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.81426943 Apr 15 12:36:20 PM PDT 24 Apr 15 12:36:24 PM PDT 24 212335866 ps
T1239 /workspace/coverage/cover_reg_top/11.otp_ctrl_intr_test.1484845776 Apr 15 12:36:38 PM PDT 24 Apr 15 12:36:40 PM PDT 24 542591643 ps
T1240 /workspace/coverage/cover_reg_top/28.otp_ctrl_intr_test.550676236 Apr 15 12:36:45 PM PDT 24 Apr 15 12:36:49 PM PDT 24 108057826 ps
T1241 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_walk.1755245479 Apr 15 12:36:20 PM PDT 24 Apr 15 12:36:23 PM PDT 24 521190364 ps
T1242 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_errors.2886461321 Apr 15 12:36:32 PM PDT 24 Apr 15 12:36:40 PM PDT 24 239842995 ps
T357 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.3358928711 Apr 15 12:36:38 PM PDT 24 Apr 15 12:36:59 PM PDT 24 2626613049 ps
T1243 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.2145589525 Apr 15 12:36:20 PM PDT 24 Apr 15 12:36:22 PM PDT 24 117956577 ps
T1244 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.1747296593 Apr 15 12:36:49 PM PDT 24 Apr 15 12:36:54 PM PDT 24 78737962 ps
T352 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.1874879202 Apr 15 12:36:53 PM PDT 24 Apr 15 12:37:16 PM PDT 24 4600166512 ps
T1245 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_rw.2779840717 Apr 15 12:36:39 PM PDT 24 Apr 15 12:36:41 PM PDT 24 115873121 ps
T1246 /workspace/coverage/cover_reg_top/26.otp_ctrl_intr_test.396566080 Apr 15 12:36:42 PM PDT 24 Apr 15 12:36:46 PM PDT 24 43116683 ps
T356 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.2110653295 Apr 15 12:36:37 PM PDT 24 Apr 15 12:36:56 PM PDT 24 1297608021 ps
T1247 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.2972704059 Apr 15 12:36:23 PM PDT 24 Apr 15 12:36:43 PM PDT 24 5510906628 ps
T318 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.3516819566 Apr 15 12:36:23 PM PDT 24 Apr 15 12:36:28 PM PDT 24 840813289 ps
T306 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_rw.1269175152 Apr 15 12:36:44 PM PDT 24 Apr 15 12:36:48 PM PDT 24 641668028 ps
T1248 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.43011016 Apr 15 12:36:43 PM PDT 24 Apr 15 12:36:48 PM PDT 24 372793101 ps
T1249 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_rw.3143109216 Apr 15 12:36:21 PM PDT 24 Apr 15 12:36:23 PM PDT 24 140085723 ps
T1250 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.1782817099 Apr 15 12:36:24 PM PDT 24 Apr 15 12:36:27 PM PDT 24 83839936 ps
T1251 /workspace/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.1576318820 Apr 15 12:36:29 PM PDT 24 Apr 15 12:36:32 PM PDT 24 97392304 ps
T1252 /workspace/coverage/cover_reg_top/3.otp_ctrl_intr_test.1404838339 Apr 15 12:36:21 PM PDT 24 Apr 15 12:36:23 PM PDT 24 584414370 ps
T1253 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.1593778125 Apr 15 12:36:38 PM PDT 24 Apr 15 12:36:42 PM PDT 24 394014142 ps
T1254 /workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.1980721529 Apr 15 12:36:28 PM PDT 24 Apr 15 12:36:30 PM PDT 24 172191687 ps
T1255 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.2978297337 Apr 15 12:36:26 PM PDT 24 Apr 15 12:36:48 PM PDT 24 10262450552 ps
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