SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
84.44 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 18 | 1 | 17 | 94.44 |
Crosses | 72 | 13 | 59 | 81.94 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
err_code_vals | 7 | 1 | 6 | 85.71 | 100 | 1 | 1 | 0 | |
partition | 11 | 0 | 11 | 100.00 | 100 | 1 | 1 | 0 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
dai_err_code_for_all_partitions | 72 | 13 | 59 | 81.94 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 7 | 1 | 6 | 85.71 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
macro_err | 0 | 1 | 1 |
NAME | COUNT | STATUS |
illegal_err | 0 | Illegal |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | 55690 | 1 | T2 | 101 | T5 | 466 | T9 | 623 | ||||
access_err | 69914 | 1 | T1 | 20 | T4 | 1 | T5 | 611 | ||||
write_blank_err | 504 | 1 | T5 | 4 | T17 | 1 | T6 | 9 | ||||
ecc_uncorr_err | 68960 | 1 | T5 | 493 | T106 | 136 | T139 | 85 | ||||
ecc_corr_err | 1521 | 1 | T5 | 1 | T106 | 15 | T42 | 2 | ||||
no_err | 98826 | 1 | T1 | 47 | T2 | 16 | T4 | 15 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 11 | 0 | 11 | 100.00 |
NAME | COUNT | STATUS |
illegal_idx | 0 | Excluded |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
life_cycle | 901 | 1 | T5 | 12 | T6 | 2 | T7 | 3 | ||||
secret2 | 27474 | 1 | T1 | 10 | T2 | 2 | T5 | 119 | ||||
secret1 | 30714 | 1 | T1 | 1 | T2 | 3 | T4 | 1 | ||||
secret0 | 42913 | 1 | T1 | 11 | T4 | 1 | T5 | 101 | ||||
hw_cfg1 | 33476 | 1 | T1 | 9 | T2 | 103 | T4 | 2 | ||||
hw_cfg0 | 26669 | 1 | T1 | 8 | T2 | 1 | T4 | 4 | ||||
rot_creator_auth_state | 25198 | 1 | T1 | 9 | T4 | 3 | T5 | 560 | ||||
rot_creator_auth_codesign | 26326 | 1 | T1 | 5 | T2 | 4 | T5 | 125 | ||||
owner_sw_cfg | 21938 | 1 | T1 | 9 | T5 | 386 | T8 | 1 | ||||
creator_sw_cfg | 22995 | 1 | T1 | 1 | T4 | 4 | T5 | 188 | ||||
vendor_test | 36811 | 1 | T1 | 4 | T2 | 4 | T4 | 1 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL | 72 | 13 | 59 | 81.94 | 13 |
Automatically Generated Cross Bins | 72 | 13 | 59 | 81.94 | 13 |
User Defined Cross Bins | 0 | 0 | 0 |
err_code_vals | partition | COUNT | AT LEAST | NUMBER | STATUS |
[fsm_err] | [life_cycle] | 0 | 1 | 1 | |
[ecc_corr_err] | [vendor_test] | 0 | 1 | 1 | |
[macro_err] | [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] | -- | -- | 10 | |
[no_err] | [life_cycle] | 0 | 1 | 1 |
err_code_vals | partition | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | secret2 | 5527 | 1 | T201 | 276 | T157 | 13 | T271 | 72 | ||||
fsm_err | secret1 | 4954 | 1 | T110 | 116 | T15 | 1 | T329 | 222 | ||||
fsm_err | secret0 | 6822 | 1 | T106 | 11 | T202 | 29 | T158 | 136 | ||||
fsm_err | hw_cfg1 | 2932 | 1 | T2 | 101 | T13 | 118 | T306 | 244 | ||||
fsm_err | hw_cfg0 | 3977 | 1 | T10 | 96 | T11 | 429 | T147 | 42 | ||||
fsm_err | rot_creator_auth_state | 2107 | 1 | T18 | 41 | T330 | 111 | T171 | 39 | ||||
fsm_err | rot_creator_auth_codesign | 4860 | 1 | T139 | 15 | T18 | 119 | T331 | 146 | ||||
fsm_err | owner_sw_cfg | 3084 | 1 | T5 | 269 | T139 | 19 | T13 | 407 | ||||
fsm_err | creator_sw_cfg | 3656 | 1 | T5 | 89 | T9 | 623 | T15 | 497 | ||||
fsm_err | vendor_test | 17771 | 1 | T5 | 108 | T139 | 23 | T38 | 64 | ||||
access_err | life_cycle | 901 | 1 | T5 | 12 | T6 | 2 | T7 | 3 | ||||
access_err | secret2 | 12168 | 1 | T1 | 10 | T5 | 88 | T10 | 7 | ||||
access_err | secret1 | 6434 | 1 | T5 | 74 | T29 | 5 | T17 | 40 | ||||
access_err | secret0 | 5260 | 1 | T5 | 70 | T10 | 1 | T29 | 3 | ||||
access_err | hw_cfg1 | 1377 | 1 | T1 | 2 | T4 | 1 | T5 | 26 | ||||
access_err | hw_cfg0 | 2537 | 1 | T1 | 1 | T5 | 31 | T29 | 1 | ||||
access_err | rot_creator_auth_state | 6789 | 1 | T1 | 2 | T5 | 63 | T39 | 5 | ||||
access_err | rot_creator_auth_codesign | 8988 | 1 | T1 | 1 | T5 | 71 | T10 | 3 | ||||
access_err | owner_sw_cfg | 7700 | 1 | T1 | 3 | T5 | 63 | T10 | 4 | ||||
access_err | creator_sw_cfg | 9284 | 1 | T5 | 57 | T39 | 7 | T42 | 2 | ||||
access_err | vendor_test | 8476 | 1 | T1 | 1 | T5 | 56 | T39 | 7 | ||||
write_blank_err | secret2 | 14 | 1 | T6 | 1 | T332 | 1 | T333 | 1 | ||||
write_blank_err | secret1 | 19 | 1 | T6 | 1 | T14 | 1 | T143 | 1 | ||||
write_blank_err | secret0 | 61 | 1 | T7 | 1 | T19 | 1 | T270 | 3 | ||||
write_blank_err | hw_cfg1 | 66 | 1 | T5 | 2 | T17 | 1 | T7 | 1 | ||||
write_blank_err | hw_cfg0 | 16 | 1 | T103 | 1 | T177 | 1 | T334 | 1 | ||||
write_blank_err | rot_creator_auth_state | 203 | 1 | T5 | 2 | T14 | 5 | T103 | 1 | ||||
write_blank_err | rot_creator_auth_codesign | 70 | 1 | T6 | 6 | T14 | 2 | T37 | 1 | ||||
write_blank_err | owner_sw_cfg | 15 | 1 | T162 | 1 | T335 | 1 | T336 | 1 | ||||
write_blank_err | creator_sw_cfg | 14 | 1 | T6 | 1 | T15 | 1 | T143 | 1 | ||||
write_blank_err | vendor_test | 26 | 1 | T270 | 2 | T328 | 3 | T275 | 1 | ||||
ecc_uncorr_err | secret2 | 4023 | 1 | T332 | 444 | T171 | 30 | T333 | 257 | ||||
ecc_uncorr_err | secret1 | 9064 | 1 | T106 | 17 | T6 | 555 | T14 | 165 | ||||
ecc_uncorr_err | secret0 | 21278 | 1 | T106 | 49 | T139 | 11 | T7 | 694 | ||||
ecc_uncorr_err | hw_cfg1 | 17110 | 1 | T5 | 59 | T17 | 341 | T162 | 303 | ||||
ecc_uncorr_err | hw_cfg0 | 6318 | 1 | T106 | 48 | T103 | 446 | T171 | 83 | ||||
ecc_uncorr_err | rot_creator_auth_state | 6893 | 1 | T5 | 434 | T163 | 52 | T328 | 279 | ||||
ecc_uncorr_err | rot_creator_auth_codesign | 2760 | 1 | T139 | 23 | T37 | 583 | T165 | 4 | ||||
ecc_uncorr_err | owner_sw_cfg | 787 | 1 | T139 | 8 | T171 | 43 | T223 | 4 | ||||
ecc_uncorr_err | creator_sw_cfg | 727 | 1 | T106 | 22 | T139 | 43 | T171 | 46 | ||||
ecc_corr_err | secret2 | 72 | 1 | T106 | 2 | T42 | 1 | T38 | 1 | ||||
ecc_corr_err | secret1 | 154 | 1 | T106 | 1 | T139 | 2 | T197 | 1 | ||||
ecc_corr_err | secret0 | 143 | 1 | T106 | 2 | T42 | 1 | T139 | 3 | ||||
ecc_corr_err | hw_cfg1 | 302 | 1 | T5 | 1 | T106 | 3 | T38 | 6 | ||||
ecc_corr_err | hw_cfg0 | 259 | 1 | T106 | 1 | T38 | 7 | T165 | 1 | ||||
ecc_corr_err | rot_creator_auth_state | 127 | 1 | T38 | 5 | T43 | 1 | T171 | 2 | ||||
ecc_corr_err | rot_creator_auth_codesign | 171 | 1 | T106 | 3 | T139 | 2 | T38 | 1 | ||||
ecc_corr_err | owner_sw_cfg | 157 | 1 | T106 | 1 | T139 | 1 | T38 | 7 | ||||
ecc_corr_err | creator_sw_cfg | 136 | 1 | T106 | 2 | T38 | 2 | T171 | 2 | ||||
no_err | secret2 | 5670 | 1 | T2 | 2 | T5 | 31 | T29 | 3 | ||||
no_err | secret1 | 10089 | 1 | T1 | 1 | T2 | 3 | T4 | 1 | ||||
no_err | secret0 | 9349 | 1 | T1 | 11 | T4 | 1 | T5 | 31 | ||||
no_err | hw_cfg1 | 11689 | 1 | T1 | 7 | T2 | 2 | T4 | 1 | ||||
no_err | hw_cfg0 | 13562 | 1 | T1 | 7 | T2 | 1 | T4 | 4 | ||||
no_err | rot_creator_auth_state | 9079 | 1 | T1 | 7 | T4 | 3 | T5 | 61 | ||||
no_err | rot_creator_auth_codesign | 9477 | 1 | T1 | 4 | T2 | 4 | T5 | 54 | ||||
no_err | owner_sw_cfg | 10195 | 1 | T1 | 6 | T5 | 54 | T8 | 1 | ||||
no_err | creator_sw_cfg | 9178 | 1 | T1 | 1 | T4 | 4 | T5 | 42 | ||||
no_err | vendor_test | 10538 | 1 | T1 | 3 | T2 | 4 | T4 | 1 |
NAME | COUNT | STATUS |
vendor_test_ecc_uncorrectable_err | 0 | Illegal |
life_cycle_ignore | 0 | Excluded |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |