Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.93 93.88 96.77 95.80 91.41 96.95 96.33 93.35


Total test records in report: 1325
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T1063 /workspace/coverage/default/37.otp_ctrl_test_access.1800228810 Apr 25 01:07:35 PM PDT 24 Apr 25 01:07:42 PM PDT 24 491841880 ps
T1064 /workspace/coverage/default/33.otp_ctrl_init_fail.3313765349 Apr 25 01:07:27 PM PDT 24 Apr 25 01:07:34 PM PDT 24 2232334913 ps
T1065 /workspace/coverage/default/54.otp_ctrl_stress_all_with_rand_reset.281945392 Apr 25 01:08:13 PM PDT 24 Apr 25 01:16:11 PM PDT 24 68695845429 ps
T1066 /workspace/coverage/default/10.otp_ctrl_smoke.2850862849 Apr 25 01:06:17 PM PDT 24 Apr 25 01:06:22 PM PDT 24 103081350 ps
T1067 /workspace/coverage/default/1.otp_ctrl_smoke.3784463582 Apr 25 01:05:41 PM PDT 24 Apr 25 01:05:46 PM PDT 24 505294192 ps
T1068 /workspace/coverage/default/5.otp_ctrl_macro_errs.3840612468 Apr 25 01:05:50 PM PDT 24 Apr 25 01:06:19 PM PDT 24 3347124958 ps
T1069 /workspace/coverage/default/8.otp_ctrl_stress_all_with_rand_reset.3196725375 Apr 25 01:06:05 PM PDT 24 Apr 25 01:17:25 PM PDT 24 27421937254 ps
T1070 /workspace/coverage/default/27.otp_ctrl_dai_lock.2607592216 Apr 25 01:07:05 PM PDT 24 Apr 25 01:07:36 PM PDT 24 5336406031 ps
T1071 /workspace/coverage/default/29.otp_ctrl_init_fail.1653637105 Apr 25 01:07:10 PM PDT 24 Apr 25 01:07:14 PM PDT 24 306210110 ps
T166 /workspace/coverage/default/102.otp_ctrl_init_fail.3371485442 Apr 25 01:08:34 PM PDT 24 Apr 25 01:08:39 PM PDT 24 492286463 ps
T1072 /workspace/coverage/default/161.otp_ctrl_parallel_lc_esc.1840480858 Apr 25 01:08:58 PM PDT 24 Apr 25 01:09:08 PM PDT 24 326516020 ps
T1073 /workspace/coverage/default/34.otp_ctrl_test_access.1156430244 Apr 25 01:07:24 PM PDT 24 Apr 25 01:07:48 PM PDT 24 1217991005 ps
T1074 /workspace/coverage/default/19.otp_ctrl_macro_errs.1560035175 Apr 25 01:06:50 PM PDT 24 Apr 25 01:07:16 PM PDT 24 12637796496 ps
T1075 /workspace/coverage/default/184.otp_ctrl_parallel_lc_esc.1325917945 Apr 25 01:09:12 PM PDT 24 Apr 25 01:09:34 PM PDT 24 1170363711 ps
T1076 /workspace/coverage/default/8.otp_ctrl_dai_lock.4033036042 Apr 25 01:06:06 PM PDT 24 Apr 25 01:06:27 PM PDT 24 952014964 ps
T1077 /workspace/coverage/default/131.otp_ctrl_init_fail.3747173374 Apr 25 01:08:45 PM PDT 24 Apr 25 01:08:51 PM PDT 24 605074306 ps
T1078 /workspace/coverage/default/6.otp_ctrl_regwen.1156014213 Apr 25 01:05:56 PM PDT 24 Apr 25 01:06:01 PM PDT 24 276769918 ps
T1079 /workspace/coverage/default/48.otp_ctrl_stress_all_with_rand_reset.3636960041 Apr 25 01:08:08 PM PDT 24 Apr 25 01:20:00 PM PDT 24 54228494540 ps
T1080 /workspace/coverage/default/30.otp_ctrl_stress_all.1676746172 Apr 25 01:07:17 PM PDT 24 Apr 25 01:09:00 PM PDT 24 5718610512 ps
T253 /workspace/coverage/default/4.otp_ctrl_stress_all.2882200809 Apr 25 01:05:43 PM PDT 24 Apr 25 01:09:24 PM PDT 24 141836605013 ps
T1081 /workspace/coverage/default/25.otp_ctrl_smoke.1037017264 Apr 25 01:06:53 PM PDT 24 Apr 25 01:07:01 PM PDT 24 173860732 ps
T1082 /workspace/coverage/default/31.otp_ctrl_regwen.1444105647 Apr 25 01:07:17 PM PDT 24 Apr 25 01:07:28 PM PDT 24 1071027002 ps
T1083 /workspace/coverage/default/25.otp_ctrl_test_access.3163499333 Apr 25 01:06:58 PM PDT 24 Apr 25 01:07:23 PM PDT 24 2826728404 ps
T1084 /workspace/coverage/default/3.otp_ctrl_dai_errs.3358451139 Apr 25 01:05:50 PM PDT 24 Apr 25 01:06:07 PM PDT 24 3535638502 ps
T1085 /workspace/coverage/default/272.otp_ctrl_init_fail.3353082104 Apr 25 01:09:25 PM PDT 24 Apr 25 01:09:32 PM PDT 24 1755073817 ps
T1086 /workspace/coverage/default/6.otp_ctrl_parallel_lc_req.127084065 Apr 25 01:05:48 PM PDT 24 Apr 25 01:06:04 PM PDT 24 6048967362 ps
T1087 /workspace/coverage/default/14.otp_ctrl_regwen.4168551217 Apr 25 01:06:26 PM PDT 24 Apr 25 01:06:37 PM PDT 24 172013586 ps
T1088 /workspace/coverage/default/265.otp_ctrl_init_fail.3750458881 Apr 25 01:09:29 PM PDT 24 Apr 25 01:09:35 PM PDT 24 574205955 ps
T1089 /workspace/coverage/default/6.otp_ctrl_background_chks.2062519892 Apr 25 01:05:47 PM PDT 24 Apr 25 01:06:20 PM PDT 24 13641114179 ps
T1090 /workspace/coverage/default/199.otp_ctrl_parallel_lc_esc.3171475590 Apr 25 01:09:18 PM PDT 24 Apr 25 01:09:29 PM PDT 24 2778331056 ps
T1091 /workspace/coverage/default/2.otp_ctrl_smoke.2783877055 Apr 25 01:05:39 PM PDT 24 Apr 25 01:06:01 PM PDT 24 1852331180 ps
T1092 /workspace/coverage/default/3.otp_ctrl_macro_errs.1747885889 Apr 25 01:05:47 PM PDT 24 Apr 25 01:06:03 PM PDT 24 1994895092 ps
T1093 /workspace/coverage/default/166.otp_ctrl_init_fail.994688922 Apr 25 01:08:58 PM PDT 24 Apr 25 01:09:04 PM PDT 24 2024941431 ps
T1094 /workspace/coverage/default/136.otp_ctrl_parallel_lc_esc.3433479572 Apr 25 01:08:53 PM PDT 24 Apr 25 01:08:59 PM PDT 24 1872250578 ps
T1095 /workspace/coverage/default/58.otp_ctrl_init_fail.239563630 Apr 25 01:08:12 PM PDT 24 Apr 25 01:08:17 PM PDT 24 378707321 ps
T1096 /workspace/coverage/default/275.otp_ctrl_init_fail.3067811705 Apr 25 01:09:27 PM PDT 24 Apr 25 01:09:33 PM PDT 24 138240120 ps
T1097 /workspace/coverage/default/215.otp_ctrl_init_fail.2866214653 Apr 25 01:09:12 PM PDT 24 Apr 25 01:09:19 PM PDT 24 104292226 ps
T1098 /workspace/coverage/default/45.otp_ctrl_stress_all.1156024054 Apr 25 01:07:58 PM PDT 24 Apr 25 01:09:22 PM PDT 24 5421108541 ps
T1099 /workspace/coverage/default/229.otp_ctrl_init_fail.2545704684 Apr 25 01:09:20 PM PDT 24 Apr 25 01:09:26 PM PDT 24 372060521 ps
T1100 /workspace/coverage/default/27.otp_ctrl_test_access.2534738857 Apr 25 01:07:14 PM PDT 24 Apr 25 01:07:26 PM PDT 24 11090006747 ps
T1101 /workspace/coverage/default/6.otp_ctrl_init_fail.3342995956 Apr 25 01:05:51 PM PDT 24 Apr 25 01:05:57 PM PDT 24 1447025018 ps
T1102 /workspace/coverage/default/208.otp_ctrl_init_fail.1668814696 Apr 25 01:09:12 PM PDT 24 Apr 25 01:09:19 PM PDT 24 311603786 ps
T1103 /workspace/coverage/default/258.otp_ctrl_init_fail.3330082642 Apr 25 01:09:29 PM PDT 24 Apr 25 01:09:35 PM PDT 24 168101429 ps
T1104 /workspace/coverage/default/280.otp_ctrl_init_fail.1935467222 Apr 25 01:09:25 PM PDT 24 Apr 25 01:09:30 PM PDT 24 486970298 ps
T1105 /workspace/coverage/default/5.otp_ctrl_check_fail.439034206 Apr 25 01:05:50 PM PDT 24 Apr 25 01:06:33 PM PDT 24 18177345889 ps
T1106 /workspace/coverage/default/49.otp_ctrl_parallel_key_req.3344829501 Apr 25 01:08:05 PM PDT 24 Apr 25 01:08:15 PM PDT 24 367578238 ps
T1107 /workspace/coverage/default/38.otp_ctrl_macro_errs.2636218267 Apr 25 01:07:34 PM PDT 24 Apr 25 01:07:46 PM PDT 24 1284905243 ps
T1108 /workspace/coverage/default/65.otp_ctrl_parallel_lc_esc.1799693004 Apr 25 01:08:19 PM PDT 24 Apr 25 01:08:29 PM PDT 24 305027431 ps
T1109 /workspace/coverage/default/109.otp_ctrl_parallel_lc_esc.3208895018 Apr 25 01:08:44 PM PDT 24 Apr 25 01:09:03 PM PDT 24 551225325 ps
T175 /workspace/coverage/default/216.otp_ctrl_init_fail.574092406 Apr 25 01:09:13 PM PDT 24 Apr 25 01:09:19 PM PDT 24 259955680 ps
T1110 /workspace/coverage/default/27.otp_ctrl_parallel_lc_esc.2343375592 Apr 25 01:07:03 PM PDT 24 Apr 25 01:07:11 PM PDT 24 2903862813 ps
T1111 /workspace/coverage/default/15.otp_ctrl_parallel_lc_req.1198118965 Apr 25 01:06:29 PM PDT 24 Apr 25 01:06:39 PM PDT 24 2070901171 ps
T1112 /workspace/coverage/default/26.otp_ctrl_dai_lock.2655426702 Apr 25 01:06:59 PM PDT 24 Apr 25 01:07:14 PM PDT 24 2957508756 ps
T1113 /workspace/coverage/default/44.otp_ctrl_parallel_lc_req.2255178663 Apr 25 01:07:54 PM PDT 24 Apr 25 01:08:36 PM PDT 24 11980273658 ps
T1114 /workspace/coverage/default/72.otp_ctrl_init_fail.607831638 Apr 25 01:08:18 PM PDT 24 Apr 25 01:08:23 PM PDT 24 140897895 ps
T1115 /workspace/coverage/default/41.otp_ctrl_macro_errs.484266332 Apr 25 01:07:41 PM PDT 24 Apr 25 01:08:13 PM PDT 24 2457456212 ps
T1116 /workspace/coverage/default/43.otp_ctrl_parallel_lc_req.3838986092 Apr 25 01:07:54 PM PDT 24 Apr 25 01:08:25 PM PDT 24 13544322536 ps
T64 /workspace/coverage/default/79.otp_ctrl_init_fail.1577519125 Apr 25 01:08:26 PM PDT 24 Apr 25 01:08:31 PM PDT 24 306763657 ps
T1117 /workspace/coverage/default/196.otp_ctrl_init_fail.3767674765 Apr 25 01:09:12 PM PDT 24 Apr 25 01:09:18 PM PDT 24 132714323 ps
T141 /workspace/coverage/default/33.otp_ctrl_check_fail.2154831329 Apr 25 01:07:22 PM PDT 24 Apr 25 01:08:03 PM PDT 24 8563188119 ps
T1118 /workspace/coverage/default/25.otp_ctrl_stress_all_with_rand_reset.2784379691 Apr 25 01:07:01 PM PDT 24 Apr 25 01:17:04 PM PDT 24 50107022341 ps
T1119 /workspace/coverage/default/29.otp_ctrl_macro_errs.4244913296 Apr 25 01:07:11 PM PDT 24 Apr 25 01:07:23 PM PDT 24 814638989 ps
T1120 /workspace/coverage/default/14.otp_ctrl_macro_errs.3221660274 Apr 25 01:06:23 PM PDT 24 Apr 25 01:06:35 PM PDT 24 873431824 ps
T1121 /workspace/coverage/default/28.otp_ctrl_parallel_key_req.1648553875 Apr 25 01:07:30 PM PDT 24 Apr 25 01:07:52 PM PDT 24 6808198257 ps
T1122 /workspace/coverage/default/4.otp_ctrl_parallel_key_req.857141763 Apr 25 01:05:44 PM PDT 24 Apr 25 01:06:00 PM PDT 24 921750870 ps
T256 /workspace/coverage/default/63.otp_ctrl_init_fail.815500987 Apr 25 01:08:20 PM PDT 24 Apr 25 01:08:26 PM PDT 24 2271641680 ps
T1123 /workspace/coverage/default/12.otp_ctrl_parallel_key_req.2800565625 Apr 25 01:06:24 PM PDT 24 Apr 25 01:06:56 PM PDT 24 788664204 ps
T176 /workspace/coverage/default/164.otp_ctrl_init_fail.3934209032 Apr 25 01:09:05 PM PDT 24 Apr 25 01:09:11 PM PDT 24 1668592304 ps
T1124 /workspace/coverage/default/241.otp_ctrl_init_fail.1528433270 Apr 25 01:09:27 PM PDT 24 Apr 25 01:09:33 PM PDT 24 389756022 ps
T1125 /workspace/coverage/default/61.otp_ctrl_stress_all_with_rand_reset.475352452 Apr 25 01:08:13 PM PDT 24 Apr 25 01:19:26 PM PDT 24 82224582886 ps
T1126 /workspace/coverage/default/81.otp_ctrl_init_fail.1434820538 Apr 25 01:08:28 PM PDT 24 Apr 25 01:08:34 PM PDT 24 443580658 ps
T1127 /workspace/coverage/default/173.otp_ctrl_init_fail.803583181 Apr 25 01:09:05 PM PDT 24 Apr 25 01:09:12 PM PDT 24 1920621556 ps
T1128 /workspace/coverage/default/221.otp_ctrl_init_fail.712974644 Apr 25 01:09:18 PM PDT 24 Apr 25 01:09:24 PM PDT 24 627404019 ps
T1129 /workspace/coverage/default/191.otp_ctrl_init_fail.3456356789 Apr 25 01:09:11 PM PDT 24 Apr 25 01:09:20 PM PDT 24 2290082112 ps
T154 /workspace/coverage/default/2.otp_ctrl_parallel_lc_esc.2444193310 Apr 25 01:05:47 PM PDT 24 Apr 25 01:06:01 PM PDT 24 5156595614 ps
T1130 /workspace/coverage/default/94.otp_ctrl_parallel_lc_esc.1595126470 Apr 25 01:08:33 PM PDT 24 Apr 25 01:08:38 PM PDT 24 109584102 ps
T1131 /workspace/coverage/default/43.otp_ctrl_alert_test.691085844 Apr 25 01:07:54 PM PDT 24 Apr 25 01:07:58 PM PDT 24 84031825 ps
T288 /workspace/coverage/default/74.otp_ctrl_stress_all_with_rand_reset.944366058 Apr 25 01:08:20 PM PDT 24 Apr 25 01:41:45 PM PDT 24 1216398177562 ps
T1132 /workspace/coverage/default/40.otp_ctrl_parallel_lc_req.351294589 Apr 25 01:07:39 PM PDT 24 Apr 25 01:08:02 PM PDT 24 8777125223 ps
T1133 /workspace/coverage/default/3.otp_ctrl_regwen.611969943 Apr 25 01:05:44 PM PDT 24 Apr 25 01:05:52 PM PDT 24 647524286 ps
T1134 /workspace/coverage/default/148.otp_ctrl_parallel_lc_esc.930574749 Apr 25 01:09:01 PM PDT 24 Apr 25 01:09:09 PM PDT 24 2005776290 ps
T1135 /workspace/coverage/default/236.otp_ctrl_init_fail.4198027463 Apr 25 01:09:17 PM PDT 24 Apr 25 01:09:25 PM PDT 24 1897323833 ps
T1136 /workspace/coverage/default/165.otp_ctrl_parallel_lc_esc.3335056090 Apr 25 01:08:58 PM PDT 24 Apr 25 01:09:14 PM PDT 24 252584138 ps
T1137 /workspace/coverage/default/224.otp_ctrl_init_fail.3611469085 Apr 25 01:09:20 PM PDT 24 Apr 25 01:09:26 PM PDT 24 371458075 ps
T1138 /workspace/coverage/default/32.otp_ctrl_alert_test.1743432687 Apr 25 01:07:25 PM PDT 24 Apr 25 01:07:27 PM PDT 24 98627520 ps
T1139 /workspace/coverage/default/38.otp_ctrl_parallel_lc_req.4063456219 Apr 25 01:07:37 PM PDT 24 Apr 25 01:07:52 PM PDT 24 3524853081 ps
T1140 /workspace/coverage/default/9.otp_ctrl_init_fail.958029345 Apr 25 01:06:05 PM PDT 24 Apr 25 01:06:10 PM PDT 24 455995901 ps
T1141 /workspace/coverage/default/23.otp_ctrl_parallel_lc_esc.2519838182 Apr 25 01:06:52 PM PDT 24 Apr 25 01:07:00 PM PDT 24 652455634 ps
T1142 /workspace/coverage/default/50.otp_ctrl_init_fail.3512845494 Apr 25 01:08:05 PM PDT 24 Apr 25 01:08:10 PM PDT 24 227398592 ps
T1143 /workspace/coverage/default/91.otp_ctrl_init_fail.3238356656 Apr 25 01:09:02 PM PDT 24 Apr 25 01:09:07 PM PDT 24 1790048693 ps
T1144 /workspace/coverage/default/249.otp_ctrl_init_fail.2916914279 Apr 25 01:09:26 PM PDT 24 Apr 25 01:09:31 PM PDT 24 507256930 ps
T1145 /workspace/coverage/default/269.otp_ctrl_init_fail.185056951 Apr 25 01:09:27 PM PDT 24 Apr 25 01:09:34 PM PDT 24 421518839 ps
T1146 /workspace/coverage/default/104.otp_ctrl_parallel_lc_esc.1235469852 Apr 25 01:08:38 PM PDT 24 Apr 25 01:08:53 PM PDT 24 415887243 ps
T1147 /workspace/coverage/default/71.otp_ctrl_stress_all_with_rand_reset.2552407690 Apr 25 01:08:22 PM PDT 24 Apr 25 01:38:25 PM PDT 24 319188565542 ps
T139 /workspace/coverage/default/3.otp_ctrl_check_fail.1162405345 Apr 25 01:05:43 PM PDT 24 Apr 25 01:05:54 PM PDT 24 636019886 ps
T1148 /workspace/coverage/default/42.otp_ctrl_smoke.567606500 Apr 25 01:07:48 PM PDT 24 Apr 25 01:07:59 PM PDT 24 7617394685 ps
T1149 /workspace/coverage/default/11.otp_ctrl_stress_all.2220458942 Apr 25 01:06:24 PM PDT 24 Apr 25 01:07:44 PM PDT 24 3842791905 ps
T1150 /workspace/coverage/default/21.otp_ctrl_smoke.2425238409 Apr 25 01:06:42 PM PDT 24 Apr 25 01:06:48 PM PDT 24 584564474 ps
T14 /workspace/coverage/default/41.otp_ctrl_stress_all.1250990187 Apr 25 01:07:57 PM PDT 24 Apr 25 01:11:44 PM PDT 24 28400437920 ps
T1151 /workspace/coverage/default/0.otp_ctrl_dai_errs.2080821376 Apr 25 01:05:33 PM PDT 24 Apr 25 01:06:04 PM PDT 24 6111313245 ps
T1152 /workspace/coverage/default/26.otp_ctrl_smoke.2799820467 Apr 25 01:06:57 PM PDT 24 Apr 25 01:07:02 PM PDT 24 228548385 ps
T1153 /workspace/coverage/default/142.otp_ctrl_init_fail.3475503536 Apr 25 01:08:56 PM PDT 24 Apr 25 01:09:01 PM PDT 24 148844317 ps
T1154 /workspace/coverage/default/4.otp_ctrl_check_fail.626844653 Apr 25 01:05:44 PM PDT 24 Apr 25 01:05:56 PM PDT 24 412398246 ps
T1155 /workspace/coverage/default/12.otp_ctrl_alert_test.1530530205 Apr 25 01:06:24 PM PDT 24 Apr 25 01:06:29 PM PDT 24 446628659 ps
T1156 /workspace/coverage/default/212.otp_ctrl_init_fail.2994303366 Apr 25 01:09:14 PM PDT 24 Apr 25 01:09:20 PM PDT 24 139261007 ps
T1157 /workspace/coverage/default/72.otp_ctrl_stress_all_with_rand_reset.1974031277 Apr 25 01:08:18 PM PDT 24 Apr 25 02:07:01 PM PDT 24 350064153775 ps
T1158 /workspace/coverage/default/48.otp_ctrl_parallel_lc_req.3824855753 Apr 25 01:08:05 PM PDT 24 Apr 25 01:08:31 PM PDT 24 856639718 ps
T1159 /workspace/coverage/default/43.otp_ctrl_parallel_key_req.3035767016 Apr 25 01:07:47 PM PDT 24 Apr 25 01:08:07 PM PDT 24 2688350232 ps
T1160 /workspace/coverage/default/209.otp_ctrl_init_fail.1539418088 Apr 25 01:09:14 PM PDT 24 Apr 25 01:09:20 PM PDT 24 163004833 ps
T1161 /workspace/coverage/default/39.otp_ctrl_stress_all.952005707 Apr 25 01:07:39 PM PDT 24 Apr 25 01:09:45 PM PDT 24 4904126820 ps
T1162 /workspace/coverage/default/34.otp_ctrl_stress_all.4120361187 Apr 25 01:07:26 PM PDT 24 Apr 25 01:10:40 PM PDT 24 119800979383 ps
T1163 /workspace/coverage/default/101.otp_ctrl_parallel_lc_esc.4184414589 Apr 25 01:08:35 PM PDT 24 Apr 25 01:08:46 PM PDT 24 773222686 ps
T1164 /workspace/coverage/default/22.otp_ctrl_stress_all.4203251805 Apr 25 01:06:48 PM PDT 24 Apr 25 01:09:56 PM PDT 24 17641206612 ps
T1165 /workspace/coverage/default/43.otp_ctrl_macro_errs.3245560521 Apr 25 01:07:52 PM PDT 24 Apr 25 01:07:59 PM PDT 24 502399601 ps
T1166 /workspace/coverage/default/25.otp_ctrl_parallel_lc_req.3027694103 Apr 25 01:06:55 PM PDT 24 Apr 25 01:07:10 PM PDT 24 888588404 ps
T1167 /workspace/coverage/default/42.otp_ctrl_regwen.3615272428 Apr 25 01:07:48 PM PDT 24 Apr 25 01:07:57 PM PDT 24 504099835 ps
T1168 /workspace/coverage/default/29.otp_ctrl_parallel_lc_req.1356688653 Apr 25 01:07:10 PM PDT 24 Apr 25 01:07:35 PM PDT 24 733825160 ps
T1169 /workspace/coverage/default/13.otp_ctrl_regwen.3031237451 Apr 25 01:06:24 PM PDT 24 Apr 25 01:06:36 PM PDT 24 608280662 ps
T1170 /workspace/coverage/default/21.otp_ctrl_check_fail.4199048858 Apr 25 01:06:40 PM PDT 24 Apr 25 01:07:03 PM PDT 24 9839676040 ps
T1171 /workspace/coverage/default/20.otp_ctrl_test_access.1040080647 Apr 25 01:06:39 PM PDT 24 Apr 25 01:07:04 PM PDT 24 9779991112 ps
T1172 /workspace/coverage/default/27.otp_ctrl_init_fail.2521803742 Apr 25 01:07:05 PM PDT 24 Apr 25 01:07:10 PM PDT 24 148778050 ps
T1173 /workspace/coverage/default/14.otp_ctrl_dai_lock.3180523537 Apr 25 01:06:24 PM PDT 24 Apr 25 01:06:59 PM PDT 24 3117301837 ps
T1174 /workspace/coverage/default/131.otp_ctrl_parallel_lc_esc.920703395 Apr 25 01:08:50 PM PDT 24 Apr 25 01:09:01 PM PDT 24 202476716 ps
T1175 /workspace/coverage/default/19.otp_ctrl_parallel_lc_esc.2803089674 Apr 25 01:06:36 PM PDT 24 Apr 25 01:06:54 PM PDT 24 2464186659 ps
T1176 /workspace/coverage/default/44.otp_ctrl_smoke.1948650205 Apr 25 01:07:52 PM PDT 24 Apr 25 01:08:08 PM PDT 24 1555542629 ps
T1177 /workspace/coverage/default/6.otp_ctrl_parallel_lc_esc.3445402396 Apr 25 01:05:53 PM PDT 24 Apr 25 01:05:59 PM PDT 24 583504894 ps
T1178 /workspace/coverage/default/36.otp_ctrl_check_fail.3910033775 Apr 25 01:07:28 PM PDT 24 Apr 25 01:07:49 PM PDT 24 8893905384 ps
T1179 /workspace/coverage/default/19.otp_ctrl_dai_errs.3141871965 Apr 25 01:06:35 PM PDT 24 Apr 25 01:07:04 PM PDT 24 12234489244 ps
T1180 /workspace/coverage/default/36.otp_ctrl_dai_errs.4076865723 Apr 25 01:07:31 PM PDT 24 Apr 25 01:07:41 PM PDT 24 205213724 ps
T290 /workspace/coverage/default/93.otp_ctrl_stress_all_with_rand_reset.2520398069 Apr 25 01:08:33 PM PDT 24 Apr 25 01:39:21 PM PDT 24 69575032883 ps
T1181 /workspace/coverage/default/46.otp_ctrl_macro_errs.2092552274 Apr 25 01:07:58 PM PDT 24 Apr 25 01:08:07 PM PDT 24 245460673 ps
T1182 /workspace/coverage/default/37.otp_ctrl_parallel_lc_req.3213498847 Apr 25 01:07:31 PM PDT 24 Apr 25 01:07:40 PM PDT 24 413994208 ps
T262 /workspace/coverage/default/88.otp_ctrl_parallel_lc_esc.3362677723 Apr 25 01:08:32 PM PDT 24 Apr 25 01:08:39 PM PDT 24 296243828 ps
T1183 /workspace/coverage/default/13.otp_ctrl_alert_test.3679915298 Apr 25 01:06:39 PM PDT 24 Apr 25 01:06:43 PM PDT 24 104515301 ps
T1184 /workspace/coverage/default/26.otp_ctrl_parallel_key_req.4629557 Apr 25 01:07:05 PM PDT 24 Apr 25 01:07:36 PM PDT 24 2483223476 ps
T1185 /workspace/coverage/default/5.otp_ctrl_stress_all.3567112939 Apr 25 01:05:49 PM PDT 24 Apr 25 01:08:40 PM PDT 24 16052625057 ps
T1186 /workspace/coverage/default/23.otp_ctrl_stress_all_with_rand_reset.3994703212 Apr 25 01:06:52 PM PDT 24 Apr 25 01:14:40 PM PDT 24 31647954305 ps
T1187 /workspace/coverage/default/23.otp_ctrl_smoke.3919696727 Apr 25 01:06:45 PM PDT 24 Apr 25 01:06:54 PM PDT 24 642123107 ps
T1188 /workspace/coverage/default/45.otp_ctrl_regwen.357238185 Apr 25 01:07:53 PM PDT 24 Apr 25 01:08:00 PM PDT 24 1656644812 ps
T1189 /workspace/coverage/default/7.otp_ctrl_background_chks.2308319877 Apr 25 01:05:55 PM PDT 24 Apr 25 01:06:02 PM PDT 24 498391919 ps
T1190 /workspace/coverage/default/52.otp_ctrl_stress_all_with_rand_reset.839188808 Apr 25 01:08:14 PM PDT 24 Apr 25 01:35:17 PM PDT 24 72406337299 ps
T1191 /workspace/coverage/default/27.otp_ctrl_regwen.1147164051 Apr 25 01:07:14 PM PDT 24 Apr 25 01:07:21 PM PDT 24 585860228 ps
T1192 /workspace/coverage/default/90.otp_ctrl_parallel_lc_esc.3613635795 Apr 25 01:08:36 PM PDT 24 Apr 25 01:08:41 PM PDT 24 188953481 ps
T1193 /workspace/coverage/default/107.otp_ctrl_init_fail.3870593757 Apr 25 01:08:44 PM PDT 24 Apr 25 01:08:50 PM PDT 24 291262970 ps
T1194 /workspace/coverage/default/10.otp_ctrl_stress_all.4041362844 Apr 25 01:06:15 PM PDT 24 Apr 25 01:06:33 PM PDT 24 1719685508 ps
T1195 /workspace/coverage/default/173.otp_ctrl_parallel_lc_esc.2137791378 Apr 25 01:09:05 PM PDT 24 Apr 25 01:09:18 PM PDT 24 803553136 ps
T1196 /workspace/coverage/default/14.otp_ctrl_smoke.2682999590 Apr 25 01:06:40 PM PDT 24 Apr 25 01:06:49 PM PDT 24 2289320466 ps
T1197 /workspace/coverage/default/5.otp_ctrl_regwen.2325144786 Apr 25 01:05:49 PM PDT 24 Apr 25 01:05:59 PM PDT 24 891068948 ps
T1198 /workspace/coverage/default/35.otp_ctrl_parallel_lc_esc.1943321882 Apr 25 01:07:32 PM PDT 24 Apr 25 01:07:39 PM PDT 24 501317373 ps
T1199 /workspace/coverage/default/31.otp_ctrl_stress_all.3614052658 Apr 25 01:07:19 PM PDT 24 Apr 25 01:11:07 PM PDT 24 35809558619 ps
T267 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.3908034666 Apr 25 12:33:47 PM PDT 24 Apr 25 12:33:54 PM PDT 24 116567943 ps
T269 /workspace/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.3281264857 Apr 25 12:33:44 PM PDT 24 Apr 25 12:33:48 PM PDT 24 1074771358 ps
T1200 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.3564028379 Apr 25 12:33:32 PM PDT 24 Apr 25 12:33:37 PM PDT 24 48066577 ps
T1201 /workspace/coverage/cover_reg_top/7.otp_ctrl_intr_test.4105375688 Apr 25 12:33:45 PM PDT 24 Apr 25 12:33:50 PM PDT 24 590474208 ps
T1202 /workspace/coverage/cover_reg_top/13.otp_ctrl_tl_errors.1232729273 Apr 25 12:33:47 PM PDT 24 Apr 25 12:33:55 PM PDT 24 314431086 ps
T1203 /workspace/coverage/cover_reg_top/22.otp_ctrl_intr_test.3589151824 Apr 25 12:34:00 PM PDT 24 Apr 25 12:34:02 PM PDT 24 78142893 ps
T270 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_rw.3749209735 Apr 25 12:33:45 PM PDT 24 Apr 25 12:33:49 PM PDT 24 601631922 ps
T1204 /workspace/coverage/cover_reg_top/19.otp_ctrl_intr_test.502601307 Apr 25 12:33:59 PM PDT 24 Apr 25 12:34:01 PM PDT 24 40936520 ps
T264 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.1683649533 Apr 25 12:33:46 PM PDT 24 Apr 25 12:33:58 PM PDT 24 608923097 ps
T1205 /workspace/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.3317428618 Apr 25 12:33:36 PM PDT 24 Apr 25 12:33:42 PM PDT 24 68560673 ps
T265 /workspace/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.2526004323 Apr 25 12:33:47 PM PDT 24 Apr 25 12:34:03 PM PDT 24 2465620603 ps
T1206 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.621148448 Apr 25 12:33:50 PM PDT 24 Apr 25 12:33:54 PM PDT 24 73068893 ps
T1207 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_mem_rw_with_rand_reset.97743988 Apr 25 12:33:32 PM PDT 24 Apr 25 12:33:39 PM PDT 24 159039072 ps
T325 /workspace/coverage/cover_reg_top/17.otp_ctrl_csr_rw.1142079419 Apr 25 12:33:56 PM PDT 24 Apr 25 12:33:58 PM PDT 24 90241756 ps
T1208 /workspace/coverage/cover_reg_top/17.otp_ctrl_intr_test.3897795396 Apr 25 12:33:50 PM PDT 24 Apr 25 12:33:54 PM PDT 24 43320189 ps
T1209 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.970221351 Apr 25 12:33:44 PM PDT 24 Apr 25 12:33:49 PM PDT 24 134985743 ps
T384 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.447739105 Apr 25 12:33:48 PM PDT 24 Apr 25 12:33:54 PM PDT 24 226319236 ps
T1210 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_rw.1093667701 Apr 25 12:33:35 PM PDT 24 Apr 25 12:33:40 PM PDT 24 121246671 ps
T1211 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_errors.237585587 Apr 25 12:33:32 PM PDT 24 Apr 25 12:33:38 PM PDT 24 196708776 ps
T1212 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.2653853794 Apr 25 12:33:36 PM PDT 24 Apr 25 12:33:44 PM PDT 24 201776410 ps
T291 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.3653455511 Apr 25 12:34:50 PM PDT 24 Apr 25 12:34:58 PM PDT 24 439964148 ps
T1213 /workspace/coverage/cover_reg_top/25.otp_ctrl_intr_test.3759466730 Apr 25 12:34:00 PM PDT 24 Apr 25 12:34:02 PM PDT 24 138585487 ps
T326 /workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.2279053639 Apr 25 12:33:30 PM PDT 24 Apr 25 12:33:35 PM PDT 24 228074580 ps
T1214 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_walk.3237725516 Apr 25 12:33:32 PM PDT 24 Apr 25 12:33:37 PM PDT 24 139373396 ps
T1215 /workspace/coverage/cover_reg_top/32.otp_ctrl_intr_test.4021748555 Apr 25 12:34:01 PM PDT 24 Apr 25 12:34:04 PM PDT 24 46447659 ps
T1216 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.4070412613 Apr 25 12:33:51 PM PDT 24 Apr 25 12:33:56 PM PDT 24 107722913 ps
T292 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.1158074552 Apr 25 12:33:29 PM PDT 24 Apr 25 12:33:33 PM PDT 24 95362437 ps
T327 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_rw.3716411388 Apr 25 12:33:44 PM PDT 24 Apr 25 12:33:48 PM PDT 24 133994331 ps
T1217 /workspace/coverage/cover_reg_top/31.otp_ctrl_intr_test.2099617761 Apr 25 12:33:57 PM PDT 24 Apr 25 12:33:59 PM PDT 24 555483924 ps
T1218 /workspace/coverage/cover_reg_top/44.otp_ctrl_intr_test.2999046531 Apr 25 12:33:59 PM PDT 24 Apr 25 12:34:01 PM PDT 24 127425875 ps
T1219 /workspace/coverage/cover_reg_top/28.otp_ctrl_intr_test.1591425765 Apr 25 12:34:04 PM PDT 24 Apr 25 12:34:07 PM PDT 24 73330921 ps
T1220 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.3498037034 Apr 25 12:33:46 PM PDT 24 Apr 25 12:33:50 PM PDT 24 215945923 ps
T295 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_rw.3455757412 Apr 25 12:33:48 PM PDT 24 Apr 25 12:33:53 PM PDT 24 42300823 ps
T1221 /workspace/coverage/cover_reg_top/14.otp_ctrl_intr_test.3100921894 Apr 25 12:33:47 PM PDT 24 Apr 25 12:33:52 PM PDT 24 573498951 ps
T328 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_rw.538511733 Apr 25 12:33:39 PM PDT 24 Apr 25 12:33:44 PM PDT 24 45959282 ps
T329 /workspace/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.3774994798 Apr 25 12:33:36 PM PDT 24 Apr 25 12:33:43 PM PDT 24 78614111 ps
T1222 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_errors.640231500 Apr 25 12:33:43 PM PDT 24 Apr 25 12:33:49 PM PDT 24 118446067 ps
T1223 /workspace/coverage/cover_reg_top/6.otp_ctrl_intr_test.2592482120 Apr 25 12:33:46 PM PDT 24 Apr 25 12:33:51 PM PDT 24 139762677 ps
T1224 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_errors.79720601 Apr 25 12:33:36 PM PDT 24 Apr 25 12:33:44 PM PDT 24 156902090 ps
T1225 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_errors.2886322532 Apr 25 12:33:48 PM PDT 24 Apr 25 12:33:55 PM PDT 24 895121072 ps
T293 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.3355075260 Apr 25 12:33:48 PM PDT 24 Apr 25 12:33:58 PM PDT 24 751033914 ps
T1226 /workspace/coverage/cover_reg_top/43.otp_ctrl_intr_test.2758702831 Apr 25 12:34:00 PM PDT 24 Apr 25 12:34:03 PM PDT 24 94316345 ps
T1227 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.1493720519 Apr 25 12:33:58 PM PDT 24 Apr 25 12:34:02 PM PDT 24 84723866 ps
T266 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.619489534 Apr 25 12:33:52 PM PDT 24 Apr 25 12:34:03 PM PDT 24 2358374658 ps
T1228 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.989130040 Apr 25 12:33:51 PM PDT 24 Apr 25 12:33:57 PM PDT 24 207877636 ps
T1229 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_errors.1825726124 Apr 25 12:33:47 PM PDT 24 Apr 25 12:33:55 PM PDT 24 463445558 ps
T1230 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.3314352569 Apr 25 12:33:46 PM PDT 24 Apr 25 12:33:52 PM PDT 24 413551548 ps
T1231 /workspace/coverage/cover_reg_top/16.otp_ctrl_tl_errors.3752986778 Apr 25 12:33:50 PM PDT 24 Apr 25 12:33:58 PM PDT 24 173976976 ps
T330 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_rw.1723918699 Apr 25 12:33:58 PM PDT 24 Apr 25 12:34:01 PM PDT 24 680331216 ps
T1232 /workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.882056254 Apr 25 12:34:06 PM PDT 24 Apr 25 12:34:10 PM PDT 24 44444086 ps
T300 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.1718997075 Apr 25 12:33:37 PM PDT 24 Apr 25 12:33:53 PM PDT 24 7526984496 ps
T331 /workspace/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.1597401826 Apr 25 12:33:47 PM PDT 24 Apr 25 12:33:55 PM PDT 24 1855298042 ps
T1233 /workspace/coverage/cover_reg_top/26.otp_ctrl_intr_test.1384765199 Apr 25 12:34:00 PM PDT 24 Apr 25 12:34:02 PM PDT 24 38781323 ps
T294 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.2929125120 Apr 25 12:33:37 PM PDT 24 Apr 25 12:33:44 PM PDT 24 93698599 ps
T1234 /workspace/coverage/cover_reg_top/20.otp_ctrl_intr_test.1185626892 Apr 25 12:33:56 PM PDT 24 Apr 25 12:33:59 PM PDT 24 44674185 ps
T301 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_rw.1064178605 Apr 25 12:33:46 PM PDT 24 Apr 25 12:33:51 PM PDT 24 606636230 ps
T302 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.1985354566 Apr 25 12:33:36 PM PDT 24 Apr 25 12:33:43 PM PDT 24 206639209 ps
T1235 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.3332180510 Apr 25 12:33:36 PM PDT 24 Apr 25 12:33:43 PM PDT 24 94228113 ps
T332 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_rw.4166260805 Apr 25 12:33:47 PM PDT 24 Apr 25 12:33:52 PM PDT 24 154511737 ps
T271 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.1638662198 Apr 25 12:33:47 PM PDT 24 Apr 25 12:34:01 PM PDT 24 10280632213 ps
T360 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.862083461 Apr 25 12:33:46 PM PDT 24 Apr 25 12:33:59 PM PDT 24 1943180306 ps
T1236 /workspace/coverage/cover_reg_top/36.otp_ctrl_intr_test.3627590583 Apr 25 12:34:00 PM PDT 24 Apr 25 12:34:03 PM PDT 24 87588165 ps
T361 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.2474844764 Apr 25 12:33:48 PM PDT 24 Apr 25 12:34:02 PM PDT 24 2448235359 ps
T333 /workspace/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.1470379183 Apr 25 12:33:53 PM PDT 24 Apr 25 12:33:56 PM PDT 24 129652364 ps
T1237 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.1528187328 Apr 25 12:33:32 PM PDT 24 Apr 25 12:33:37 PM PDT 24 83465951 ps
T334 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_rw.516821341 Apr 25 12:33:52 PM PDT 24 Apr 25 12:33:55 PM PDT 24 52371252 ps
T1238 /workspace/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.4019434143 Apr 25 12:33:59 PM PDT 24 Apr 25 12:34:03 PM PDT 24 653235099 ps
T1239 /workspace/coverage/cover_reg_top/45.otp_ctrl_intr_test.2773256054 Apr 25 12:34:07 PM PDT 24 Apr 25 12:34:11 PM PDT 24 133861620 ps
T272 /workspace/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.3028392523 Apr 25 12:33:44 PM PDT 24 Apr 25 12:34:07 PM PDT 24 3581201700 ps
T296 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.2807482836 Apr 25 12:33:49 PM PDT 24 Apr 25 12:33:53 PM PDT 24 78456098 ps
T273 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.574072627 Apr 25 12:33:37 PM PDT 24 Apr 25 12:33:58 PM PDT 24 1585081930 ps
T1240 /workspace/coverage/cover_reg_top/48.otp_ctrl_intr_test.666226890 Apr 25 12:34:05 PM PDT 24 Apr 25 12:34:08 PM PDT 24 590023522 ps
T1241 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.3480850291 Apr 25 12:33:46 PM PDT 24 Apr 25 12:33:52 PM PDT 24 137497285 ps
T1242 /workspace/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.2457175763 Apr 25 12:33:46 PM PDT 24 Apr 25 12:33:53 PM PDT 24 1241046016 ps
T297 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_rw.3697979559 Apr 25 12:33:47 PM PDT 24 Apr 25 12:33:52 PM PDT 24 45370070 ps
T1243 /workspace/coverage/cover_reg_top/16.otp_ctrl_intr_test.2081099295 Apr 25 12:33:54 PM PDT 24 Apr 25 12:33:57 PM PDT 24 549509051 ps
T1244 /workspace/coverage/cover_reg_top/11.otp_ctrl_intr_test.2231648436 Apr 25 12:33:50 PM PDT 24 Apr 25 12:33:54 PM PDT 24 42930286 ps
T1245 /workspace/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.3099868656 Apr 25 12:33:52 PM PDT 24 Apr 25 12:33:55 PM PDT 24 84890602 ps
T1246 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.377787069 Apr 25 12:33:35 PM PDT 24 Apr 25 12:33:44 PM PDT 24 452470117 ps
T1247 /workspace/coverage/cover_reg_top/30.otp_ctrl_intr_test.2457053077 Apr 25 12:34:04 PM PDT 24 Apr 25 12:34:07 PM PDT 24 145418358 ps
T1248 /workspace/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.1407976864 Apr 25 12:33:49 PM PDT 24 Apr 25 12:33:55 PM PDT 24 164691699 ps
T1249 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.3559409398 Apr 25 12:34:50 PM PDT 24 Apr 25 12:34:56 PM PDT 24 1105563345 ps
T1250 /workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.3941299928 Apr 25 12:33:56 PM PDT 24 Apr 25 12:34:00 PM PDT 24 181228427 ps
T1251 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_rw.1108931744 Apr 25 12:33:30 PM PDT 24 Apr 25 12:33:34 PM PDT 24 38120144 ps
T1252 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.425282128 Apr 25 12:33:36 PM PDT 24 Apr 25 12:33:44 PM PDT 24 880104147 ps
T1253 /workspace/coverage/cover_reg_top/9.otp_ctrl_intr_test.2584094649 Apr 25 12:33:43 PM PDT 24 Apr 25 12:33:46 PM PDT 24 46556800 ps
T1254 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_walk.1464624368 Apr 25 12:33:38 PM PDT 24 Apr 25 12:33:43 PM PDT 24 71885754 ps
T1255 /workspace/coverage/cover_reg_top/0.otp_ctrl_intr_test.2175952624 Apr 25 12:33:33 PM PDT 24 Apr 25 12:33:38 PM PDT 24 96144989 ps
T1256 /workspace/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.2540258379 Apr 25 12:33:45 PM PDT 24 Apr 25 12:33:51 PM PDT 24 1070946316 ps
T1257 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_errors.950680065 Apr 25 12:33:48 PM PDT 24 Apr 25 12:33:57 PM PDT 24 346401978 ps
T1258 /workspace/coverage/cover_reg_top/8.otp_ctrl_intr_test.3619458435 Apr 25 12:33:44 PM PDT 24 Apr 25 12:33:48 PM PDT 24 101544614 ps
T1259 /workspace/coverage/cover_reg_top/18.otp_ctrl_intr_test.1241616617 Apr 25 12:33:56 PM PDT 24 Apr 25 12:33:59 PM PDT 24 135724128 ps
T1260 /workspace/coverage/cover_reg_top/24.otp_ctrl_intr_test.529627558 Apr 25 12:33:57 PM PDT 24 Apr 25 12:34:00 PM PDT 24 42573320 ps
T1261 /workspace/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.1556659500 Apr 25 12:33:46 PM PDT 24 Apr 25 12:33:52 PM PDT 24 159356803 ps
T1262 /workspace/coverage/cover_reg_top/23.otp_ctrl_intr_test.3249567779 Apr 25 12:35:38 PM PDT 24 Apr 25 12:35:41 PM PDT 24 38166396 ps
T1263 /workspace/coverage/cover_reg_top/37.otp_ctrl_intr_test.4219425046 Apr 25 12:33:56 PM PDT 24 Apr 25 12:33:59 PM PDT 24 575437671 ps
T1264 /workspace/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.3275155021 Apr 25 12:33:35 PM PDT 24 Apr 25 12:33:41 PM PDT 24 72338514 ps
T1265 /workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.2466682737 Apr 25 12:34:03 PM PDT 24 Apr 25 12:34:06 PM PDT 24 537923373 ps
T1266 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_errors.2663402346 Apr 25 12:33:48 PM PDT 24 Apr 25 12:33:54 PM PDT 24 57883215 ps
T1267 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.2164424498 Apr 25 12:33:47 PM PDT 24 Apr 25 12:33:52 PM PDT 24 153979181 ps
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