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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.88 93.84 96.70 95.84 91.17 97.14 96.33 93.14


Total test records in report: 1324
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html

T1050 /workspace/coverage/default/157.otp_ctrl_init_fail.1851887849 Apr 28 02:05:21 PM PDT 24 Apr 28 02:05:28 PM PDT 24 1924625838 ps
T1051 /workspace/coverage/default/15.otp_ctrl_stress_all.671414605 Apr 28 01:59:02 PM PDT 24 Apr 28 02:00:35 PM PDT 24 4829765125 ps
T1052 /workspace/coverage/default/102.otp_ctrl_init_fail.2263071303 Apr 28 02:04:27 PM PDT 24 Apr 28 02:04:32 PM PDT 24 149820811 ps
T1053 /workspace/coverage/default/47.otp_ctrl_parallel_lc_req.3424177598 Apr 28 02:03:01 PM PDT 24 Apr 28 02:03:07 PM PDT 24 340950425 ps
T1054 /workspace/coverage/default/29.otp_ctrl_smoke.2490439675 Apr 28 02:00:34 PM PDT 24 Apr 28 02:00:37 PM PDT 24 96839427 ps
T1055 /workspace/coverage/default/26.otp_ctrl_dai_lock.878049089 Apr 28 02:00:22 PM PDT 24 Apr 28 02:00:42 PM PDT 24 642173728 ps
T1056 /workspace/coverage/default/43.otp_ctrl_regwen.139369271 Apr 28 02:02:19 PM PDT 24 Apr 28 02:02:24 PM PDT 24 163892122 ps
T1057 /workspace/coverage/default/29.otp_ctrl_stress_all.2067489205 Apr 28 02:00:38 PM PDT 24 Apr 28 02:02:05 PM PDT 24 7696742989 ps
T1058 /workspace/coverage/default/7.otp_ctrl_stress_all.932833495 Apr 28 01:58:01 PM PDT 24 Apr 28 01:58:33 PM PDT 24 4372619167 ps
T1059 /workspace/coverage/default/177.otp_ctrl_parallel_lc_esc.1040306189 Apr 28 02:05:43 PM PDT 24 Apr 28 02:05:53 PM PDT 24 699380346 ps
T1060 /workspace/coverage/default/1.otp_ctrl_alert_test.3386920092 Apr 28 01:57:05 PM PDT 24 Apr 28 01:57:08 PM PDT 24 713467076 ps
T1061 /workspace/coverage/default/46.otp_ctrl_dai_lock.2943300739 Apr 28 02:03:04 PM PDT 24 Apr 28 02:03:22 PM PDT 24 6854790295 ps
T239 /workspace/coverage/default/0.otp_ctrl_sec_cm.2854645592 Apr 28 01:56:57 PM PDT 24 Apr 28 01:59:43 PM PDT 24 9535419513 ps
T1062 /workspace/coverage/default/22.otp_ctrl_dai_errs.1893362804 Apr 28 01:59:47 PM PDT 24 Apr 28 02:00:19 PM PDT 24 6062857148 ps
T1063 /workspace/coverage/default/18.otp_ctrl_init_fail.1450915792 Apr 28 01:59:30 PM PDT 24 Apr 28 01:59:35 PM PDT 24 168038442 ps
T1064 /workspace/coverage/default/46.otp_ctrl_parallel_key_req.1414376703 Apr 28 02:03:00 PM PDT 24 Apr 28 02:03:07 PM PDT 24 240833862 ps
T96 /workspace/coverage/default/222.otp_ctrl_init_fail.2609803406 Apr 28 02:06:16 PM PDT 24 Apr 28 02:06:21 PM PDT 24 303286523 ps
T1065 /workspace/coverage/default/218.otp_ctrl_init_fail.3030267722 Apr 28 02:06:10 PM PDT 24 Apr 28 02:06:15 PM PDT 24 283310455 ps
T1066 /workspace/coverage/default/9.otp_ctrl_macro_errs.3141936162 Apr 28 01:58:17 PM PDT 24 Apr 28 01:58:43 PM PDT 24 1010964589 ps
T1067 /workspace/coverage/default/24.otp_ctrl_check_fail.1071142383 Apr 28 02:00:00 PM PDT 24 Apr 28 02:00:19 PM PDT 24 1483193057 ps
T1068 /workspace/coverage/default/3.otp_ctrl_alert_test.178058122 Apr 28 01:57:26 PM PDT 24 Apr 28 01:57:28 PM PDT 24 177657483 ps
T1069 /workspace/coverage/default/45.otp_ctrl_stress_all_with_rand_reset.1259240263 Apr 28 02:02:39 PM PDT 24 Apr 28 02:10:02 PM PDT 24 153883440536 ps
T1070 /workspace/coverage/default/17.otp_ctrl_test_access.2782144199 Apr 28 01:59:22 PM PDT 24 Apr 28 01:59:35 PM PDT 24 365548509 ps
T1071 /workspace/coverage/default/55.otp_ctrl_init_fail.3819478089 Apr 28 02:03:12 PM PDT 24 Apr 28 02:03:17 PM PDT 24 166238693 ps
T1072 /workspace/coverage/default/26.otp_ctrl_dai_errs.89698359 Apr 28 02:00:16 PM PDT 24 Apr 28 02:00:40 PM PDT 24 1323083611 ps
T1073 /workspace/coverage/default/5.otp_ctrl_parallel_lc_esc.3543145678 Apr 28 01:57:41 PM PDT 24 Apr 28 01:58:02 PM PDT 24 2012910973 ps
T1074 /workspace/coverage/default/48.otp_ctrl_alert_test.845883682 Apr 28 02:03:13 PM PDT 24 Apr 28 02:03:15 PM PDT 24 61893332 ps
T1075 /workspace/coverage/default/22.otp_ctrl_test_access.1314632918 Apr 28 01:59:47 PM PDT 24 Apr 28 01:59:59 PM PDT 24 1097828870 ps
T1076 /workspace/coverage/default/18.otp_ctrl_parallel_lc_req.3021165118 Apr 28 01:59:22 PM PDT 24 Apr 28 01:59:40 PM PDT 24 1381207432 ps
T1077 /workspace/coverage/default/38.otp_ctrl_dai_lock.2340171856 Apr 28 02:01:50 PM PDT 24 Apr 28 02:02:30 PM PDT 24 4479682254 ps
T97 /workspace/coverage/default/15.otp_ctrl_check_fail.2499122442 Apr 28 01:58:57 PM PDT 24 Apr 28 01:59:17 PM PDT 24 666493234 ps
T1078 /workspace/coverage/default/297.otp_ctrl_init_fail.561211129 Apr 28 02:06:47 PM PDT 24 Apr 28 02:06:52 PM PDT 24 103084685 ps
T1079 /workspace/coverage/default/87.otp_ctrl_init_fail.948388416 Apr 28 02:04:09 PM PDT 24 Apr 28 02:04:13 PM PDT 24 154874083 ps
T1080 /workspace/coverage/default/59.otp_ctrl_init_fail.1478143735 Apr 28 02:03:18 PM PDT 24 Apr 28 02:03:26 PM PDT 24 2895956069 ps
T1081 /workspace/coverage/default/30.otp_ctrl_check_fail.1766475686 Apr 28 02:00:43 PM PDT 24 Apr 28 02:01:00 PM PDT 24 809768939 ps
T1082 /workspace/coverage/default/144.otp_ctrl_parallel_lc_esc.2993620124 Apr 28 02:05:15 PM PDT 24 Apr 28 02:05:19 PM PDT 24 97460668 ps
T1083 /workspace/coverage/default/34.otp_ctrl_dai_errs.2551572280 Apr 28 02:01:10 PM PDT 24 Apr 28 02:01:32 PM PDT 24 2463782932 ps
T1084 /workspace/coverage/default/181.otp_ctrl_parallel_lc_esc.3515111095 Apr 28 02:05:49 PM PDT 24 Apr 28 02:05:55 PM PDT 24 911826835 ps
T1085 /workspace/coverage/default/217.otp_ctrl_init_fail.447658032 Apr 28 02:06:09 PM PDT 24 Apr 28 02:06:14 PM PDT 24 258190326 ps
T261 /workspace/coverage/default/134.otp_ctrl_init_fail.3562063804 Apr 28 02:04:58 PM PDT 24 Apr 28 02:05:02 PM PDT 24 455792463 ps
T1086 /workspace/coverage/default/249.otp_ctrl_init_fail.2099411576 Apr 28 02:06:29 PM PDT 24 Apr 28 02:06:33 PM PDT 24 148180083 ps
T1087 /workspace/coverage/default/121.otp_ctrl_parallel_lc_esc.1512025809 Apr 28 02:04:43 PM PDT 24 Apr 28 02:04:49 PM PDT 24 392519107 ps
T1088 /workspace/coverage/default/37.otp_ctrl_parallel_lc_req.2501086150 Apr 28 02:01:31 PM PDT 24 Apr 28 02:01:51 PM PDT 24 655623030 ps
T1089 /workspace/coverage/default/32.otp_ctrl_parallel_lc_req.2855963155 Apr 28 02:00:54 PM PDT 24 Apr 28 02:01:14 PM PDT 24 11493895555 ps
T1090 /workspace/coverage/default/98.otp_ctrl_parallel_lc_esc.3706911340 Apr 28 02:04:17 PM PDT 24 Apr 28 02:04:25 PM PDT 24 438862138 ps
T1091 /workspace/coverage/default/58.otp_ctrl_stress_all_with_rand_reset.991231398 Apr 28 02:03:18 PM PDT 24 Apr 28 02:16:31 PM PDT 24 58826678614 ps
T1092 /workspace/coverage/default/13.otp_ctrl_dai_lock.2446883287 Apr 28 01:58:40 PM PDT 24 Apr 28 01:59:17 PM PDT 24 2420663799 ps
T1093 /workspace/coverage/default/20.otp_ctrl_smoke.2880948419 Apr 28 01:59:30 PM PDT 24 Apr 28 01:59:38 PM PDT 24 945010391 ps
T1094 /workspace/coverage/default/129.otp_ctrl_parallel_lc_esc.1525439693 Apr 28 02:04:54 PM PDT 24 Apr 28 02:05:06 PM PDT 24 4304974701 ps
T1095 /workspace/coverage/default/96.otp_ctrl_stress_all_with_rand_reset.441546635 Apr 28 02:04:15 PM PDT 24 Apr 28 02:14:58 PM PDT 24 333671613973 ps
T151 /workspace/coverage/default/2.otp_ctrl_parallel_lc_esc.2993218165 Apr 28 01:57:11 PM PDT 24 Apr 28 01:57:27 PM PDT 24 513894903 ps
T1096 /workspace/coverage/default/30.otp_ctrl_regwen.1010797843 Apr 28 02:00:44 PM PDT 24 Apr 28 02:00:56 PM PDT 24 4024066478 ps
T1097 /workspace/coverage/default/20.otp_ctrl_parallel_lc_esc.1296167715 Apr 28 01:59:30 PM PDT 24 Apr 28 01:59:44 PM PDT 24 927595685 ps
T304 /workspace/coverage/default/32.otp_ctrl_stress_all_with_rand_reset.7480213 Apr 28 02:01:00 PM PDT 24 Apr 28 02:23:58 PM PDT 24 226221767650 ps
T1098 /workspace/coverage/default/29.otp_ctrl_dai_lock.3693847037 Apr 28 02:00:40 PM PDT 24 Apr 28 02:01:09 PM PDT 24 3134525152 ps
T1099 /workspace/coverage/default/20.otp_ctrl_parallel_key_req.2735977852 Apr 28 01:59:37 PM PDT 24 Apr 28 02:00:05 PM PDT 24 1140611138 ps
T1100 /workspace/coverage/default/150.otp_ctrl_parallel_lc_esc.2431847739 Apr 28 02:05:14 PM PDT 24 Apr 28 02:05:41 PM PDT 24 1270752432 ps
T1101 /workspace/coverage/default/33.otp_ctrl_alert_test.3585501276 Apr 28 02:01:10 PM PDT 24 Apr 28 02:01:12 PM PDT 24 167614568 ps
T1102 /workspace/coverage/default/58.otp_ctrl_parallel_lc_esc.3371809397 Apr 28 02:03:13 PM PDT 24 Apr 28 02:03:25 PM PDT 24 3703942836 ps
T1103 /workspace/coverage/default/12.otp_ctrl_check_fail.366494890 Apr 28 01:58:35 PM PDT 24 Apr 28 01:58:45 PM PDT 24 368005016 ps
T1104 /workspace/coverage/default/28.otp_ctrl_parallel_lc_req.452679176 Apr 28 02:00:30 PM PDT 24 Apr 28 02:00:35 PM PDT 24 2076502475 ps
T1105 /workspace/coverage/default/35.otp_ctrl_parallel_lc_req.3343839891 Apr 28 02:01:23 PM PDT 24 Apr 28 02:01:35 PM PDT 24 491592906 ps
T1106 /workspace/coverage/default/172.otp_ctrl_parallel_lc_esc.1877645734 Apr 28 02:05:37 PM PDT 24 Apr 28 02:05:46 PM PDT 24 988845946 ps
T1107 /workspace/coverage/default/105.otp_ctrl_init_fail.3553874815 Apr 28 02:04:30 PM PDT 24 Apr 28 02:04:35 PM PDT 24 119202952 ps
T1108 /workspace/coverage/default/32.otp_ctrl_dai_lock.3817073986 Apr 28 02:01:06 PM PDT 24 Apr 28 02:01:54 PM PDT 24 20992381561 ps
T1109 /workspace/coverage/default/42.otp_ctrl_regwen.1093244659 Apr 28 02:02:08 PM PDT 24 Apr 28 02:02:14 PM PDT 24 205122557 ps
T1110 /workspace/coverage/default/244.otp_ctrl_init_fail.2790755565 Apr 28 02:06:25 PM PDT 24 Apr 28 02:06:29 PM PDT 24 205153274 ps
T1111 /workspace/coverage/default/22.otp_ctrl_init_fail.1008479100 Apr 28 01:59:48 PM PDT 24 Apr 28 01:59:53 PM PDT 24 356894267 ps
T1112 /workspace/coverage/default/81.otp_ctrl_init_fail.114289828 Apr 28 02:03:58 PM PDT 24 Apr 28 02:04:03 PM PDT 24 326048653 ps
T1113 /workspace/coverage/default/202.otp_ctrl_init_fail.920656896 Apr 28 02:06:24 PM PDT 24 Apr 28 02:06:28 PM PDT 24 140021359 ps
T1114 /workspace/coverage/default/154.otp_ctrl_init_fail.2539850808 Apr 28 02:05:23 PM PDT 24 Apr 28 02:05:27 PM PDT 24 419409301 ps
T1115 /workspace/coverage/default/268.otp_ctrl_init_fail.4070937947 Apr 28 02:06:37 PM PDT 24 Apr 28 02:06:41 PM PDT 24 285562464 ps
T1116 /workspace/coverage/default/9.otp_ctrl_alert_test.1098783729 Apr 28 01:58:22 PM PDT 24 Apr 28 01:58:24 PM PDT 24 117823089 ps
T1117 /workspace/coverage/default/36.otp_ctrl_check_fail.982776292 Apr 28 02:01:27 PM PDT 24 Apr 28 02:01:42 PM PDT 24 948426738 ps
T1118 /workspace/coverage/default/21.otp_ctrl_dai_errs.3709282113 Apr 28 01:59:40 PM PDT 24 Apr 28 02:00:33 PM PDT 24 19717116509 ps
T1119 /workspace/coverage/default/3.otp_ctrl_parallel_lc_req.618241236 Apr 28 01:57:18 PM PDT 24 Apr 28 01:57:40 PM PDT 24 631222023 ps
T1120 /workspace/coverage/default/23.otp_ctrl_parallel_lc_req.1329678619 Apr 28 01:59:50 PM PDT 24 Apr 28 02:00:14 PM PDT 24 1493345661 ps
T1121 /workspace/coverage/default/35.otp_ctrl_stress_all.1094690219 Apr 28 02:01:21 PM PDT 24 Apr 28 02:02:34 PM PDT 24 5990484335 ps
T1122 /workspace/coverage/default/73.otp_ctrl_stress_all_with_rand_reset.2005477435 Apr 28 02:03:45 PM PDT 24 Apr 28 02:37:24 PM PDT 24 109394989246 ps
T1123 /workspace/coverage/default/0.otp_ctrl_test_access.3583894252 Apr 28 01:56:52 PM PDT 24 Apr 28 01:57:12 PM PDT 24 978904499 ps
T1124 /workspace/coverage/default/227.otp_ctrl_init_fail.3305142228 Apr 28 02:06:16 PM PDT 24 Apr 28 02:06:20 PM PDT 24 161499946 ps
T1125 /workspace/coverage/default/41.otp_ctrl_init_fail.1716574133 Apr 28 02:02:11 PM PDT 24 Apr 28 02:02:15 PM PDT 24 404661129 ps
T1126 /workspace/coverage/default/69.otp_ctrl_init_fail.2184125442 Apr 28 02:03:42 PM PDT 24 Apr 28 02:03:46 PM PDT 24 142831402 ps
T1127 /workspace/coverage/default/45.otp_ctrl_macro_errs.4227113948 Apr 28 02:02:29 PM PDT 24 Apr 28 02:02:55 PM PDT 24 1772493348 ps
T1128 /workspace/coverage/default/71.otp_ctrl_parallel_lc_esc.2370646552 Apr 28 02:03:44 PM PDT 24 Apr 28 02:04:06 PM PDT 24 1924389052 ps
T1129 /workspace/coverage/default/43.otp_ctrl_check_fail.1754493632 Apr 28 02:02:15 PM PDT 24 Apr 28 02:02:24 PM PDT 24 3539389261 ps
T1130 /workspace/coverage/default/281.otp_ctrl_init_fail.188035953 Apr 28 02:06:44 PM PDT 24 Apr 28 02:06:48 PM PDT 24 207227444 ps
T1131 /workspace/coverage/default/11.otp_ctrl_parallel_lc_req.2663825992 Apr 28 01:58:29 PM PDT 24 Apr 28 01:58:44 PM PDT 24 969450863 ps
T1132 /workspace/coverage/default/219.otp_ctrl_init_fail.2688097813 Apr 28 02:06:11 PM PDT 24 Apr 28 02:06:17 PM PDT 24 2653627159 ps
T1133 /workspace/coverage/default/6.otp_ctrl_macro_errs.3247605697 Apr 28 01:57:54 PM PDT 24 Apr 28 01:58:30 PM PDT 24 3334312247 ps
T1134 /workspace/coverage/default/257.otp_ctrl_init_fail.1828907882 Apr 28 02:06:29 PM PDT 24 Apr 28 02:06:35 PM PDT 24 2783805853 ps
T287 /workspace/coverage/default/13.otp_ctrl_test_access.2593943179 Apr 28 01:58:45 PM PDT 24 Apr 28 01:58:57 PM PDT 24 532392084 ps
T1135 /workspace/coverage/default/15.otp_ctrl_parallel_key_req.609863305 Apr 28 01:58:58 PM PDT 24 Apr 28 01:59:16 PM PDT 24 3128160303 ps
T1136 /workspace/coverage/default/147.otp_ctrl_parallel_lc_esc.2448965763 Apr 28 02:05:13 PM PDT 24 Apr 28 02:05:20 PM PDT 24 1040850176 ps
T1137 /workspace/coverage/default/24.otp_ctrl_stress_all_with_rand_reset.3181757872 Apr 28 02:00:02 PM PDT 24 Apr 28 02:06:03 PM PDT 24 25016461229 ps
T1138 /workspace/coverage/default/92.otp_ctrl_init_fail.4149025434 Apr 28 02:04:10 PM PDT 24 Apr 28 02:04:14 PM PDT 24 527074619 ps
T1139 /workspace/coverage/default/259.otp_ctrl_init_fail.651546213 Apr 28 02:06:29 PM PDT 24 Apr 28 02:06:34 PM PDT 24 353485721 ps
T1140 /workspace/coverage/default/161.otp_ctrl_init_fail.1839556574 Apr 28 02:05:28 PM PDT 24 Apr 28 02:05:32 PM PDT 24 121904725 ps
T1141 /workspace/coverage/default/12.otp_ctrl_stress_all.1872244488 Apr 28 01:58:35 PM PDT 24 Apr 28 02:07:37 PM PDT 24 105761470074 ps
T1142 /workspace/coverage/default/254.otp_ctrl_init_fail.980156040 Apr 28 02:06:28 PM PDT 24 Apr 28 02:06:32 PM PDT 24 296039371 ps
T1143 /workspace/coverage/default/17.otp_ctrl_dai_errs.3714546124 Apr 28 01:59:13 PM PDT 24 Apr 28 02:00:08 PM PDT 24 17513635208 ps
T1144 /workspace/coverage/default/32.otp_ctrl_test_access.2405811542 Apr 28 02:01:01 PM PDT 24 Apr 28 02:01:22 PM PDT 24 1467448703 ps
T1145 /workspace/coverage/default/231.otp_ctrl_init_fail.1767545349 Apr 28 02:06:16 PM PDT 24 Apr 28 02:06:21 PM PDT 24 446585804 ps
T1146 /workspace/coverage/default/63.otp_ctrl_stress_all_with_rand_reset.2248272926 Apr 28 02:03:29 PM PDT 24 Apr 28 02:15:40 PM PDT 24 25325083998 ps
T1147 /workspace/coverage/default/24.otp_ctrl_dai_lock.2147805876 Apr 28 01:59:57 PM PDT 24 Apr 28 02:00:43 PM PDT 24 6915641713 ps
T1148 /workspace/coverage/default/2.otp_ctrl_parallel_key_req.3298961376 Apr 28 01:57:11 PM PDT 24 Apr 28 01:57:35 PM PDT 24 2352391999 ps
T1149 /workspace/coverage/default/68.otp_ctrl_init_fail.326412930 Apr 28 02:03:43 PM PDT 24 Apr 28 02:03:47 PM PDT 24 110048870 ps
T1150 /workspace/coverage/default/159.otp_ctrl_init_fail.1969475504 Apr 28 02:05:27 PM PDT 24 Apr 28 02:05:32 PM PDT 24 323619795 ps
T1151 /workspace/coverage/default/6.otp_ctrl_init_fail.2431042705 Apr 28 01:57:46 PM PDT 24 Apr 28 01:57:50 PM PDT 24 191294015 ps
T1152 /workspace/coverage/default/9.otp_ctrl_parallel_lc_esc.2075186862 Apr 28 01:58:13 PM PDT 24 Apr 28 01:58:41 PM PDT 24 2174947510 ps
T1153 /workspace/coverage/default/13.otp_ctrl_smoke.4063461355 Apr 28 01:58:40 PM PDT 24 Apr 28 01:58:43 PM PDT 24 213253460 ps
T1154 /workspace/coverage/default/137.otp_ctrl_parallel_lc_esc.3151819919 Apr 28 02:05:03 PM PDT 24 Apr 28 02:05:13 PM PDT 24 1217283802 ps
T1155 /workspace/coverage/default/153.otp_ctrl_parallel_lc_esc.577774511 Apr 28 02:05:20 PM PDT 24 Apr 28 02:05:31 PM PDT 24 495526295 ps
T1156 /workspace/coverage/default/7.otp_ctrl_parallel_key_req.2583029660 Apr 28 01:57:52 PM PDT 24 Apr 28 01:57:58 PM PDT 24 772603871 ps
T1157 /workspace/coverage/default/122.otp_ctrl_init_fail.3230093996 Apr 28 02:04:42 PM PDT 24 Apr 28 02:04:47 PM PDT 24 321905751 ps
T336 /workspace/coverage/default/56.otp_ctrl_stress_all_with_rand_reset.3096195439 Apr 28 02:03:20 PM PDT 24 Apr 28 02:28:21 PM PDT 24 123629427805 ps
T1158 /workspace/coverage/default/151.otp_ctrl_parallel_lc_esc.2244140111 Apr 28 02:05:24 PM PDT 24 Apr 28 02:05:32 PM PDT 24 3416703969 ps
T1159 /workspace/coverage/default/45.otp_ctrl_dai_lock.2050960692 Apr 28 02:02:30 PM PDT 24 Apr 28 02:02:35 PM PDT 24 776531891 ps
T1160 /workspace/coverage/default/47.otp_ctrl_test_access.2156049026 Apr 28 02:03:03 PM PDT 24 Apr 28 02:03:07 PM PDT 24 117555971 ps
T1161 /workspace/coverage/default/30.otp_ctrl_stress_all.1406540206 Apr 28 02:00:52 PM PDT 24 Apr 28 02:02:15 PM PDT 24 9842516240 ps
T1162 /workspace/coverage/default/170.otp_ctrl_init_fail.1992643056 Apr 28 02:05:37 PM PDT 24 Apr 28 02:05:41 PM PDT 24 396803631 ps
T1163 /workspace/coverage/default/94.otp_ctrl_parallel_lc_esc.99777865 Apr 28 02:04:09 PM PDT 24 Apr 28 02:04:21 PM PDT 24 1213459415 ps
T1164 /workspace/coverage/default/19.otp_ctrl_parallel_lc_esc.1975322344 Apr 28 01:59:27 PM PDT 24 Apr 28 01:59:30 PM PDT 24 88754203 ps
T1165 /workspace/coverage/default/38.otp_ctrl_alert_test.551961212 Apr 28 02:01:44 PM PDT 24 Apr 28 02:01:46 PM PDT 24 187844526 ps
T1166 /workspace/coverage/default/38.otp_ctrl_macro_errs.3646118783 Apr 28 02:01:46 PM PDT 24 Apr 28 02:01:55 PM PDT 24 632957861 ps
T1167 /workspace/coverage/default/41.otp_ctrl_parallel_key_req.2107297106 Apr 28 02:02:00 PM PDT 24 Apr 28 02:02:28 PM PDT 24 13353986960 ps
T1168 /workspace/coverage/default/49.otp_ctrl_parallel_key_req.1472707400 Apr 28 02:03:19 PM PDT 24 Apr 28 02:03:29 PM PDT 24 394407233 ps
T1169 /workspace/coverage/default/15.otp_ctrl_dai_errs.298282544 Apr 28 01:58:58 PM PDT 24 Apr 28 01:59:11 PM PDT 24 456352790 ps
T1170 /workspace/coverage/default/45.otp_ctrl_parallel_key_req.1471882757 Apr 28 02:02:36 PM PDT 24 Apr 28 02:02:58 PM PDT 24 5956705258 ps
T1171 /workspace/coverage/default/8.otp_ctrl_stress_all.221582252 Apr 28 01:58:14 PM PDT 24 Apr 28 02:01:16 PM PDT 24 24435390618 ps
T1172 /workspace/coverage/default/25.otp_ctrl_parallel_lc_req.415418456 Apr 28 02:00:02 PM PDT 24 Apr 28 02:00:09 PM PDT 24 820244736 ps
T1173 /workspace/coverage/default/94.otp_ctrl_stress_all_with_rand_reset.1548839380 Apr 28 02:04:10 PM PDT 24 Apr 28 02:13:22 PM PDT 24 80848463556 ps
T1174 /workspace/coverage/default/40.otp_ctrl_parallel_lc_esc.2477924341 Apr 28 02:02:00 PM PDT 24 Apr 28 02:02:12 PM PDT 24 814922884 ps
T1175 /workspace/coverage/default/5.otp_ctrl_macro_errs.3518021422 Apr 28 01:57:41 PM PDT 24 Apr 28 01:58:06 PM PDT 24 1708760485 ps
T1176 /workspace/coverage/default/168.otp_ctrl_init_fail.3991700415 Apr 28 02:05:31 PM PDT 24 Apr 28 02:05:35 PM PDT 24 173700979 ps
T1177 /workspace/coverage/default/26.otp_ctrl_parallel_lc_esc.1352576714 Apr 28 02:00:22 PM PDT 24 Apr 28 02:00:27 PM PDT 24 141211374 ps
T1178 /workspace/coverage/default/68.otp_ctrl_parallel_lc_esc.2076066720 Apr 28 02:03:51 PM PDT 24 Apr 28 02:03:58 PM PDT 24 1887111768 ps
T1179 /workspace/coverage/default/40.otp_ctrl_alert_test.1228648803 Apr 28 02:02:00 PM PDT 24 Apr 28 02:02:02 PM PDT 24 78835214 ps
T1180 /workspace/coverage/default/31.otp_ctrl_dai_errs.1338402383 Apr 28 02:00:54 PM PDT 24 Apr 28 02:01:16 PM PDT 24 742323982 ps
T1181 /workspace/coverage/default/16.otp_ctrl_parallel_key_req.2722614721 Apr 28 01:59:08 PM PDT 24 Apr 28 01:59:24 PM PDT 24 1240782981 ps
T1182 /workspace/coverage/default/27.otp_ctrl_stress_all_with_rand_reset.2185917316 Apr 28 02:00:24 PM PDT 24 Apr 28 02:45:35 PM PDT 24 1399096592341 ps
T1183 /workspace/coverage/default/36.otp_ctrl_dai_errs.1104476955 Apr 28 02:01:34 PM PDT 24 Apr 28 02:01:46 PM PDT 24 265404621 ps
T1184 /workspace/coverage/default/21.otp_ctrl_parallel_lc_req.3486044891 Apr 28 01:59:39 PM PDT 24 Apr 28 01:59:52 PM PDT 24 654568698 ps
T1185 /workspace/coverage/default/10.otp_ctrl_dai_errs.833382804 Apr 28 01:58:23 PM PDT 24 Apr 28 01:58:44 PM PDT 24 1185849192 ps
T1186 /workspace/coverage/default/32.otp_ctrl_init_fail.2609777065 Apr 28 02:00:59 PM PDT 24 Apr 28 02:01:02 PM PDT 24 1194169237 ps
T1187 /workspace/coverage/default/13.otp_ctrl_stress_all_with_rand_reset.1554054433 Apr 28 01:58:45 PM PDT 24 Apr 28 02:10:08 PM PDT 24 57661764377 ps
T1188 /workspace/coverage/default/143.otp_ctrl_init_fail.3953986816 Apr 28 02:05:10 PM PDT 24 Apr 28 02:05:15 PM PDT 24 272843469 ps
T1189 /workspace/coverage/default/31.otp_ctrl_parallel_key_req.365936494 Apr 28 02:00:55 PM PDT 24 Apr 28 02:01:25 PM PDT 24 2677881855 ps
T288 /workspace/coverage/default/21.otp_ctrl_stress_all_with_rand_reset.2091909228 Apr 28 01:59:39 PM PDT 24 Apr 28 02:20:32 PM PDT 24 158855712164 ps
T1190 /workspace/coverage/default/49.otp_ctrl_check_fail.3554564976 Apr 28 02:03:13 PM PDT 24 Apr 28 02:03:22 PM PDT 24 448041838 ps
T1191 /workspace/coverage/default/2.otp_ctrl_macro_errs.4188792745 Apr 28 01:57:11 PM PDT 24 Apr 28 01:57:50 PM PDT 24 4906553720 ps
T1192 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_errors.404737216 Apr 28 03:37:30 PM PDT 24 Apr 28 03:37:35 PM PDT 24 433167362 ps
T273 /workspace/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.1556338361 Apr 28 03:37:39 PM PDT 24 Apr 28 03:37:43 PM PDT 24 132159202 ps
T266 /workspace/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.3621224276 Apr 28 03:37:41 PM PDT 24 Apr 28 03:37:53 PM PDT 24 669412115 ps
T1193 /workspace/coverage/cover_reg_top/32.otp_ctrl_intr_test.3293357304 Apr 28 03:37:45 PM PDT 24 Apr 28 03:37:47 PM PDT 24 145166043 ps
T269 /workspace/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.3466286457 Apr 28 03:37:36 PM PDT 24 Apr 28 03:37:41 PM PDT 24 109532765 ps
T270 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.2315302753 Apr 28 03:37:37 PM PDT 24 Apr 28 03:37:42 PM PDT 24 219834459 ps
T1194 /workspace/coverage/cover_reg_top/42.otp_ctrl_intr_test.2839626916 Apr 28 03:37:58 PM PDT 24 Apr 28 03:38:00 PM PDT 24 39987436 ps
T267 /workspace/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.39089365 Apr 28 03:37:29 PM PDT 24 Apr 28 03:37:50 PM PDT 24 2667607787 ps
T305 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_rw.2176355262 Apr 28 03:37:30 PM PDT 24 Apr 28 03:37:33 PM PDT 24 139896585 ps
T1195 /workspace/coverage/cover_reg_top/7.otp_ctrl_tl_errors.1354459762 Apr 28 03:37:36 PM PDT 24 Apr 28 03:37:44 PM PDT 24 69306597 ps
T1196 /workspace/coverage/cover_reg_top/36.otp_ctrl_intr_test.4115961709 Apr 28 03:37:48 PM PDT 24 Apr 28 03:37:50 PM PDT 24 76399338 ps
T1197 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_walk.1685325620 Apr 28 03:37:30 PM PDT 24 Apr 28 03:37:32 PM PDT 24 517452767 ps
T306 /workspace/coverage/cover_reg_top/9.otp_ctrl_csr_rw.1282134706 Apr 28 03:37:39 PM PDT 24 Apr 28 03:37:42 PM PDT 24 43409437 ps
T324 /workspace/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.911045425 Apr 28 03:37:46 PM PDT 24 Apr 28 03:37:50 PM PDT 24 138296717 ps
T1198 /workspace/coverage/cover_reg_top/12.otp_ctrl_tl_errors.2122097642 Apr 28 03:37:37 PM PDT 24 Apr 28 03:37:44 PM PDT 24 927862758 ps
T1199 /workspace/coverage/cover_reg_top/8.otp_ctrl_intr_test.1515650547 Apr 28 03:37:36 PM PDT 24 Apr 28 03:37:40 PM PDT 24 73599926 ps
T1200 /workspace/coverage/cover_reg_top/35.otp_ctrl_intr_test.3125250667 Apr 28 03:37:52 PM PDT 24 Apr 28 03:37:54 PM PDT 24 41968410 ps
T1201 /workspace/coverage/cover_reg_top/10.otp_ctrl_tl_errors.2467508127 Apr 28 03:37:37 PM PDT 24 Apr 28 03:37:43 PM PDT 24 86435833 ps
T1202 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_errors.525344613 Apr 28 03:37:34 PM PDT 24 Apr 28 03:37:43 PM PDT 24 2343126662 ps
T268 /workspace/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.1411793133 Apr 28 03:37:32 PM PDT 24 Apr 28 03:37:51 PM PDT 24 4587289833 ps
T325 /workspace/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.3580808628 Apr 28 03:37:36 PM PDT 24 Apr 28 03:37:41 PM PDT 24 192110455 ps
T1203 /workspace/coverage/cover_reg_top/12.otp_ctrl_intr_test.4197264417 Apr 28 03:37:39 PM PDT 24 Apr 28 03:37:42 PM PDT 24 141666166 ps
T1204 /workspace/coverage/cover_reg_top/19.otp_ctrl_tl_errors.2306665171 Apr 28 03:37:52 PM PDT 24 Apr 28 03:37:57 PM PDT 24 122753880 ps
T307 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.785699057 Apr 28 03:37:37 PM PDT 24 Apr 28 03:37:45 PM PDT 24 1198884030 ps
T1205 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.1476932712 Apr 28 03:37:39 PM PDT 24 Apr 28 03:37:44 PM PDT 24 136726409 ps
T308 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.643504213 Apr 28 03:37:27 PM PDT 24 Apr 28 03:37:29 PM PDT 24 245413271 ps
T1206 /workspace/coverage/cover_reg_top/11.otp_ctrl_tl_errors.2918402489 Apr 28 03:37:38 PM PDT 24 Apr 28 03:37:45 PM PDT 24 487515996 ps
T1207 /workspace/coverage/cover_reg_top/26.otp_ctrl_intr_test.4044853458 Apr 28 03:37:48 PM PDT 24 Apr 28 03:37:50 PM PDT 24 37610564 ps
T337 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.1480816866 Apr 28 03:37:33 PM PDT 24 Apr 28 03:37:38 PM PDT 24 375859722 ps
T326 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_rw.3483802348 Apr 28 03:37:35 PM PDT 24 Apr 28 03:37:38 PM PDT 24 48677765 ps
T327 /workspace/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.1099594897 Apr 28 03:37:30 PM PDT 24 Apr 28 03:37:34 PM PDT 24 243705751 ps
T1208 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_errors.1131643479 Apr 28 03:37:32 PM PDT 24 Apr 28 03:37:36 PM PDT 24 87988305 ps
T1209 /workspace/coverage/cover_reg_top/30.otp_ctrl_intr_test.1407012661 Apr 28 03:37:51 PM PDT 24 Apr 28 03:37:53 PM PDT 24 79765883 ps
T1210 /workspace/coverage/cover_reg_top/9.otp_ctrl_intr_test.1559715382 Apr 28 03:37:38 PM PDT 24 Apr 28 03:37:42 PM PDT 24 43512797 ps
T328 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_rw.709522477 Apr 28 03:37:33 PM PDT 24 Apr 28 03:37:36 PM PDT 24 66627027 ps
T317 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_rw.3053635580 Apr 28 03:37:28 PM PDT 24 Apr 28 03:37:31 PM PDT 24 41258901 ps
T1211 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.1485963788 Apr 28 03:37:34 PM PDT 24 Apr 28 03:37:38 PM PDT 24 77594271 ps
T329 /workspace/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.2599505357 Apr 28 03:37:52 PM PDT 24 Apr 28 03:37:56 PM PDT 24 156529657 ps
T1212 /workspace/coverage/cover_reg_top/27.otp_ctrl_intr_test.2790528139 Apr 28 03:37:49 PM PDT 24 Apr 28 03:37:51 PM PDT 24 36511727 ps
T1213 /workspace/coverage/cover_reg_top/46.otp_ctrl_intr_test.79767837 Apr 28 03:37:50 PM PDT 24 Apr 28 03:37:52 PM PDT 24 39165465 ps
T1214 /workspace/coverage/cover_reg_top/3.otp_ctrl_intr_test.946056739 Apr 28 03:37:31 PM PDT 24 Apr 28 03:37:34 PM PDT 24 154233552 ps
T1215 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.4109240004 Apr 28 03:37:30 PM PDT 24 Apr 28 03:37:40 PM PDT 24 771912162 ps
T1216 /workspace/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.1725071525 Apr 28 03:37:43 PM PDT 24 Apr 28 03:37:46 PM PDT 24 70311680 ps
T1217 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.160074966 Apr 28 03:37:30 PM PDT 24 Apr 28 03:37:35 PM PDT 24 276603101 ps
T330 /workspace/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.1211826850 Apr 28 03:37:34 PM PDT 24 Apr 28 03:37:37 PM PDT 24 67733746 ps
T318 /workspace/coverage/cover_reg_top/3.otp_ctrl_csr_rw.1654636471 Apr 28 03:37:31 PM PDT 24 Apr 28 03:37:34 PM PDT 24 107863423 ps
T1218 /workspace/coverage/cover_reg_top/14.otp_ctrl_tl_errors.57403052 Apr 28 03:37:44 PM PDT 24 Apr 28 03:37:50 PM PDT 24 625822512 ps
T1219 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.3163617117 Apr 28 03:37:32 PM PDT 24 Apr 28 03:37:45 PM PDT 24 970254474 ps
T309 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.1889509182 Apr 28 03:37:32 PM PDT 24 Apr 28 03:37:37 PM PDT 24 224081996 ps
T1220 /workspace/coverage/cover_reg_top/5.otp_ctrl_intr_test.1742405527 Apr 28 03:37:35 PM PDT 24 Apr 28 03:37:39 PM PDT 24 101184710 ps
T271 /workspace/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.2033987844 Apr 28 03:37:35 PM PDT 24 Apr 28 03:37:48 PM PDT 24 1252229477 ps
T1221 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_rw.1589274088 Apr 28 03:37:47 PM PDT 24 Apr 28 03:37:50 PM PDT 24 663002601 ps
T1222 /workspace/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.485665687 Apr 28 03:37:29 PM PDT 24 Apr 28 03:37:35 PM PDT 24 385650214 ps
T1223 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.941979227 Apr 28 03:37:40 PM PDT 24 Apr 28 03:37:43 PM PDT 24 75605166 ps
T1224 /workspace/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.1083295312 Apr 28 03:37:35 PM PDT 24 Apr 28 03:37:39 PM PDT 24 77193976 ps
T1225 /workspace/coverage/cover_reg_top/24.otp_ctrl_intr_test.1865504829 Apr 28 03:37:49 PM PDT 24 Apr 28 03:37:52 PM PDT 24 551705586 ps
T1226 /workspace/coverage/cover_reg_top/19.otp_ctrl_intr_test.2819477774 Apr 28 03:37:48 PM PDT 24 Apr 28 03:37:50 PM PDT 24 148266890 ps
T356 /workspace/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.737461774 Apr 28 03:37:37 PM PDT 24 Apr 28 03:38:00 PM PDT 24 1324802543 ps
T1227 /workspace/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.3383069800 Apr 28 03:37:53 PM PDT 24 Apr 28 03:37:56 PM PDT 24 79588064 ps
T1228 /workspace/coverage/cover_reg_top/10.otp_ctrl_csr_rw.994707533 Apr 28 03:37:42 PM PDT 24 Apr 28 03:37:44 PM PDT 24 41706272 ps
T1229 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_errors.3578890189 Apr 28 03:37:49 PM PDT 24 Apr 28 03:37:58 PM PDT 24 707854753 ps
T1230 /workspace/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.1422977304 Apr 28 03:37:37 PM PDT 24 Apr 28 03:37:42 PM PDT 24 164600175 ps
T1231 /workspace/coverage/cover_reg_top/47.otp_ctrl_intr_test.74346973 Apr 28 03:37:52 PM PDT 24 Apr 28 03:37:54 PM PDT 24 38628419 ps
T353 /workspace/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.2465876173 Apr 28 03:37:45 PM PDT 24 Apr 28 03:38:11 PM PDT 24 2307593714 ps
T1232 /workspace/coverage/cover_reg_top/12.otp_ctrl_csr_rw.174214567 Apr 28 03:37:38 PM PDT 24 Apr 28 03:37:42 PM PDT 24 44358719 ps
T1233 /workspace/coverage/cover_reg_top/1.otp_ctrl_intr_test.1291423632 Apr 28 03:37:31 PM PDT 24 Apr 28 03:37:33 PM PDT 24 75160307 ps
T1234 /workspace/coverage/cover_reg_top/18.otp_ctrl_csr_mem_rw_with_rand_reset.2565834021 Apr 28 03:37:45 PM PDT 24 Apr 28 03:37:48 PM PDT 24 1175250696 ps
T1235 /workspace/coverage/cover_reg_top/15.otp_ctrl_csr_rw.2883657360 Apr 28 03:37:42 PM PDT 24 Apr 28 03:37:45 PM PDT 24 78396473 ps
T1236 /workspace/coverage/cover_reg_top/17.otp_ctrl_intr_test.2666850405 Apr 28 03:37:45 PM PDT 24 Apr 28 03:37:47 PM PDT 24 138447497 ps
T1237 /workspace/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.4220876532 Apr 28 03:37:33 PM PDT 24 Apr 28 03:37:48 PM PDT 24 9763579130 ps
T1238 /workspace/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.1725841900 Apr 28 03:37:32 PM PDT 24 Apr 28 03:37:37 PM PDT 24 1156217552 ps
T272 /workspace/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.2855843463 Apr 28 03:37:46 PM PDT 24 Apr 28 03:37:57 PM PDT 24 996851464 ps
T357 /workspace/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.4235881466 Apr 28 03:37:31 PM PDT 24 Apr 28 03:37:52 PM PDT 24 1261225053 ps
T1239 /workspace/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.3705333131 Apr 28 03:37:29 PM PDT 24 Apr 28 03:37:31 PM PDT 24 104308914 ps
T1240 /workspace/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.3047809855 Apr 28 03:37:30 PM PDT 24 Apr 28 03:37:34 PM PDT 24 74864048 ps
T358 /workspace/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.2146926717 Apr 28 03:37:27 PM PDT 24 Apr 28 03:37:38 PM PDT 24 732900143 ps
T1241 /workspace/coverage/cover_reg_top/10.otp_ctrl_intr_test.3584273425 Apr 28 03:37:39 PM PDT 24 Apr 28 03:37:42 PM PDT 24 140659320 ps
T1242 /workspace/coverage/cover_reg_top/0.otp_ctrl_intr_test.526641271 Apr 28 03:37:29 PM PDT 24 Apr 28 03:37:32 PM PDT 24 537179037 ps
T310 /workspace/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.2920598586 Apr 28 03:37:33 PM PDT 24 Apr 28 03:37:41 PM PDT 24 382564508 ps
T1243 /workspace/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.3292291027 Apr 28 03:37:42 PM PDT 24 Apr 28 03:37:45 PM PDT 24 142044474 ps
T1244 /workspace/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.293767815 Apr 28 03:37:35 PM PDT 24 Apr 28 03:37:41 PM PDT 24 1072186489 ps
T1245 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.3309621399 Apr 28 03:37:31 PM PDT 24 Apr 28 03:37:34 PM PDT 24 69988580 ps
T311 /workspace/coverage/cover_reg_top/5.otp_ctrl_csr_rw.767627062 Apr 28 03:37:34 PM PDT 24 Apr 28 03:37:37 PM PDT 24 74674281 ps
T1246 /workspace/coverage/cover_reg_top/38.otp_ctrl_intr_test.3639609780 Apr 28 03:37:53 PM PDT 24 Apr 28 03:37:55 PM PDT 24 139936133 ps
T1247 /workspace/coverage/cover_reg_top/13.otp_ctrl_csr_rw.512856507 Apr 28 03:37:41 PM PDT 24 Apr 28 03:37:44 PM PDT 24 54954760 ps
T1248 /workspace/coverage/cover_reg_top/3.otp_ctrl_mem_walk.488573215 Apr 28 03:37:35 PM PDT 24 Apr 28 03:37:39 PM PDT 24 128261749 ps
T1249 /workspace/coverage/cover_reg_top/1.otp_ctrl_mem_walk.123071383 Apr 28 03:37:28 PM PDT 24 Apr 28 03:37:30 PM PDT 24 48025977 ps
T1250 /workspace/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.226118380 Apr 28 03:37:34 PM PDT 24 Apr 28 03:37:37 PM PDT 24 212312532 ps
T1251 /workspace/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.3230147914 Apr 28 03:37:45 PM PDT 24 Apr 28 03:37:56 PM PDT 24 660738551 ps
T1252 /workspace/coverage/cover_reg_top/45.otp_ctrl_intr_test.4215997941 Apr 28 03:37:52 PM PDT 24 Apr 28 03:37:54 PM PDT 24 93345986 ps
T1253 /workspace/coverage/cover_reg_top/7.otp_ctrl_intr_test.87685064 Apr 28 03:37:32 PM PDT 24 Apr 28 03:37:35 PM PDT 24 543354069 ps
T1254 /workspace/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.3038044444 Apr 28 03:37:33 PM PDT 24 Apr 28 03:37:37 PM PDT 24 1245465910 ps
T1255 /workspace/coverage/cover_reg_top/4.otp_ctrl_intr_test.2226298622 Apr 28 03:37:28 PM PDT 24 Apr 28 03:37:31 PM PDT 24 72051601 ps
T1256 /workspace/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.3521174938 Apr 28 03:37:28 PM PDT 24 Apr 28 03:37:32 PM PDT 24 318630078 ps
T1257 /workspace/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.4235108523 Apr 28 03:37:45 PM PDT 24 Apr 28 03:37:48 PM PDT 24 1051239086 ps
T1258 /workspace/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.3606368629 Apr 28 03:37:39 PM PDT 24 Apr 28 03:37:44 PM PDT 24 128453797 ps
T1259 /workspace/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.2127939692 Apr 28 03:37:30 PM PDT 24 Apr 28 03:37:32 PM PDT 24 502589385 ps
T1260 /workspace/coverage/cover_reg_top/13.otp_ctrl_intr_test.1156938779 Apr 28 03:37:42 PM PDT 24 Apr 28 03:37:44 PM PDT 24 42352513 ps
T1261 /workspace/coverage/cover_reg_top/39.otp_ctrl_intr_test.384252372 Apr 28 03:37:53 PM PDT 24 Apr 28 03:37:55 PM PDT 24 582832271 ps
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