Unified Coverage Report :: Group Instance : mubi8_cov_of_mubi8_cov_of_tb.dut.owner_sw_cfg_read_lock_mubi_cov_if

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	9	1	10.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
true	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

14448

1

T1

1

T2

4

T3

3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	9	1	10.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
true	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

14448

1

T1

1

T2

4

T3

3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	8	2	20.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

10283

1

T1

1

T2

2

T3

2

true

16862

1

T1

1

T2

4

T3

4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	8	2	20.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

11220

1

T1

1

T2

3

T3

2

true

16927

1

T1

1

T2

5

T3

4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	104	1			T65	2		T127	2		T130	4
others[1]	112	1			T66	4		T105	2		T127	2
others[2]	118	1			T107	4		T65	2		T102	2
others[3]	94	1			T110	2		T103	2		T104	4
others[4]	84	1			T35	2		T66	2		T127	2
others[5]	100	1			T5	2		T133	2		T181	2
others[6]	88	1			T65	4		T66	2		T133	2
others[7]	120	1			T35	2		T65	2		T104	2
false	14448	1			T1	1		T2	4		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	94	1			T26	2		T66	2		T102	2
others[1]	108	1			T66	2		T127	2		T133	4
others[2]	94	1			T66	4		T133	2		T44	2
others[3]	110	1			T26	2		T34	2		T104	2
others[4]	92	1			T65	2		T60	2		T190	4
others[5]	90	1			T13	2		T35	2		T181	2
others[6]	90	1			T102	4		T127	2		T133	2
others[7]	108	1			T101	2		T66	2		T105	2
false	14448	1			T1	1		T2	4		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	116	1			T110	2		T133	2		T98	2
others[1]	122	1			T35	4		T65	2		T76	2
others[2]	78	1			T65	2		T130	4		T400	2
others[3]	104	1			T35	2		T66	4		T105	2
others[4]	106	1			T104	2		T60	2		T133	8
others[5]	90	1			T26	2		T65	2		T98	4
others[6]	102	1			T35	2		T66	2		T120	2
others[7]	126	1			T26	2		T13	2		T101	2
false	14448	1			T1	1		T2	4		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	74	1			T5	2		T66	2		T133	2
others[1]	62	1			T35	2		T181	2		T183	2
others[2]	48	1			T66	2		T183	2		T235	2
others[3]	64	1			T181	2		T77	2		T183	4
others[4]	78	1			T35	2		T401	2		T235	4
others[5]	48	1			T65	2		T66	4		T181	2
others[6]	68	1			T35	2		T65	2		T105	2
others[7]	90	1			T65	2		T120	2		T133	2
false	14448	1			T1	1		T2	4		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	104	1			T66	2		T133	4		T183	4
others[1]	106	1			T65	2		T182	2		T98	2
others[2]	118	1			T65	2		T105	2		T133	4
others[3]	94	1			T133	2		T77	4		T147	2
others[4]	78	1			T65	2		T66	2		T105	4
others[5]	86	1			T35	2		T190	2		T195	2
others[6]	86	1			T66	2		T67	2		T76	4
others[7]	148	1			T35	2		T102	4		T104	4
false	14448	1			T1	1		T2	4		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	46	1			T104	2		T133	2		T182	2
others[1]	44	1			T26	2		T98	2		T183	2
others[2]	38	1			T76	2		T104	2		T133	2
others[3]	28	1			T100	2		T149	2		T152	2
others[4]	34	1			T283	2		T402	2		T254	2
others[5]	48	1			T102	2		T98	4		T156	2
others[6]	28	1			T76	2		T183	2		T403	2
others[7]	50	1			T34	2		T103	2		T133	2
false	14448	1			T1	1		T2	4		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	80	1			T65	2		T102	2		T127	2
others[1]	94	1			T101	2		T66	4		T103	2
others[2]	90	1			T65	4		T66	2		T76	2
others[3]	92	1			T13	2		T66	2		T133	2
others[4]	76	1			T35	2		T65	2		T66	2
others[5]	88	1			T34	4		T66	2		T105	2
others[6]	106	1			T35	2		T133	2		T98	2
others[7]	108	1			T76	2		T102	2		T133	4
false	14448	1			T1	1		T2	4		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	82	1			T65	2		T66	2		T133	2
others[1]	78	1			T65	2		T66	6		T127	2
others[2]	96	1			T65	2		T76	2		T105	2
others[3]	96	1			T65	2		T133	2		T45	2
others[4]	104	1			T104	2		T98	6		T45	2
others[5]	90	1			T35	2		T133	2		T182	2
others[6]	96	1			T65	2		T102	2		T44	2
others[7]	104	1			T107	2		T66	2		T103	2
false	14448	1			T1	1		T2	4		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	104	1			T34	2		T65	4		T104	2
others[1]	90	1			T66	2		T76	2		T133	6
others[2]	100	1			T13	2		T66	2		T102	2
others[3]	102	1			T76	2		T133	2		T182	2
others[4]	72	1			T102	2		T98	4		T190	2
others[5]	94	1			T66	2		T127	2		T133	2
others[6]	92	1			T130	4		T239	2		T404	2
others[7]	110	1			T66	2		T104	2		T105	2
false	14448	1			T1	1		T2	4		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	104	1			T76	2		T60	2		T133	2
others[1]	102	1			T26	2		T102	2		T105	2
others[2]	96	1			T66	2		T67	2		T76	2
others[3]	78	1			T66	2		T133	4		T279	2
others[4]	114	1			T65	2		T66	4		T102	2
others[5]	102	1			T104	2		T127	2		T133	2
others[6]	78	1			T34	2		T66	4		T102	2
others[7]	106	1			T102	2		T181	2		T98	2
false	14448	1			T1	1		T2	4		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	106	1			T35	2		T65	2		T66	2
others[1]	78	1			T65	4		T66	2		T181	2
others[2]	84	1			T66	2		T133	2		T98	4
others[3]	114	1			T26	2		T66	2		T103	2
others[4]	86	1			T65	2		T105	2		T127	2
others[5]	98	1			T26	2		T66	2		T103	2
others[6]	90	1			T133	2		T98	2		T190	2
others[7]	130	1			T133	2		T181	2		T182	2
false	14448	1			T1	1		T2	4		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	36	1			T11	1		T14	1		T229	1
others[1]	30	1			T11	1		T280	1		T281	1
others[2]	38	1			T6	1		T14	1		T405	1
others[3]	36	1			T6	1		T133	2		T33	2
others[4]	39	1			T6	1		T11	1		T14	1
others[5]	37	1			T6	1		T235	2		T406	1
others[6]	34	1			T6	1		T208	1		T209	1
others[7]	55	1			T406	1		T260	1		T407	2
false	14448	1			T1	1		T2	4		T3	3
true	2473	1			T5	2		T9	1		T6	6

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	44	1			T6	2		T11	1		T14	1
others[1]	33	1			T6	1		T281	1		T208	1
others[2]	35	1			T11	1		T225	2		T259	2
others[3]	38	1			T6	1		T280	2		T290	1
others[4]	34	1			T209	1		T406	1		T408	2
others[5]	32	1			T6	1		T33	1		T280	1
others[6]	41	1			T405	2		T208	1		T409	1
others[7]	48	1			T11	1		T14	2		T405	1
false	11685	1			T1	1		T2	3		T3	3
true	19338	1			T1	1		T2	5		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	98	1			T35	2		T107	2		T127	2
others[1]	102	1			T65	2		T66	2		T98	2
others[2]	98	1			T102	2		T104	2		T105	2
others[3]	110	1			T66	4		T133	4		T190	2
others[4]	132	1			T5	2		T107	2		T65	2
others[5]	84	1			T190	2		T130	2		T235	6
others[6]	72	1			T65	4		T66	2		T182	2
others[7]	124	1			T35	2		T65	2		T110	2
false	7836	1			T1	1		T2	3		T3	3
true	16982	1			T1	1		T2	5		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	82	1			T102	2		T127	2		T133	4
others[1]	76	1			T133	2		T183	2		T130	6
others[2]	104	1			T103	2		T60	2		T133	2
others[3]	108	1			T66	2		T98	2		T190	2
others[4]	122	1			T35	2		T66	2		T104	2
others[5]	106	1			T26	2		T34	2		T13	2
others[6]	84	1			T65	2		T66	4		T102	4
others[7]	104	1			T26	2		T66	2		T133	4
false	6886	1			T1	1		T2	2		T3	2
true	16728	1			T1	1		T2	4		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	108	1			T65	2		T120	2		T60	2
others[1]	86	1			T77	2		T98	2		T45	2
others[2]	134	1			T26	2		T35	2		T66	2
others[3]	116	1			T13	2		T35	2		T66	2
others[4]	104	1			T35	2		T65	2		T133	4
others[5]	88	1			T26	2		T65	2		T110	2
others[6]	94	1			T101	2		T66	4		T76	2
others[7]	114	1			T35	2		T127	2		T98	4
false	7279	1			T1	1		T2	2		T3	2
true	16745	1			T1	1		T2	4		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	30	1			T6	1		T33	1		T267	2
others[1]	29	1			T6	2		T11	1		T366	1
others[2]	45	1			T11	1		T182	2		T130	2
others[3]	32	1			T366	1		T208	1		T410	2
others[4]	31	1			T33	1		T280	1		T411	1
others[5]	28	1			T6	1		T14	3		T401	2
others[6]	35	1			T6	1		T11	1		T133	2
others[7]	57	1			T6	1		T182	2		T208	1
false	11609	1			T1	1		T2	3		T3	2
true	19294	1			T1	1		T2	5		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	68	1			T35	2		T235	2		T362	2
others[1]	68	1			T35	2		T65	2		T66	2
others[2]	56	1			T5	2		T66	2		T105	2
others[3]	58	1			T65	2		T66	2		T133	2
others[4]	62	1			T181	2		T183	2		T130	2
others[5]	76	1			T35	2		T65	2		T133	2
others[6]	66	1			T133	2		T183	2		T130	2
others[7]	78	1			T66	2		T133	2		T181	2
false	9062	1			T1	1		T2	3		T3	2
true	16967	1			T1	1		T2	5		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	27	1			T11	1		T280	1		T405	1
others[1]	20	1			T11	1		T229	1		T360	1
others[2]	37	1			T11	2		T12	1		T411	1
others[3]	28	1			T11	1		T33	1		T366	1
others[4]	46	1			T6	1		T11	1		T33	1
others[5]	33	1			T11	1		T12	1		T33	1
others[6]	18	1			T260	1		T412	1		T291	1
others[7]	40	1			T6	1		T33	2		T281	1
false	11554	1			T1	1		T2	3		T3	2
true	19272	1			T1	1		T2	5		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	132	1			T35	2		T133	4		T181	2
others[1]	70	1			T102	2		T105	2		T133	4
others[2]	114	1			T65	2		T66	2		T76	2
others[3]	82	1			T77	2		T98	4		T183	2
others[4]	100	1			T102	2		T104	2		T98	2
others[5]	108	1			T65	2		T67	2		T127	2
others[6]	130	1			T35	2		T66	2		T105	2
others[7]	84	1			T65	2		T66	2		T76	2
false	7700	1			T1	1		T2	3		T3	2
true	16897	1			T1	1		T2	5		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	41	1			T11	2		T14	1		T133	4
others[1]	32	1			T11	1		T33	3		T280	1
others[2]	35	1			T280	1		T413	2		T260	1
others[3]	38	1			T11	1		T130	2		T241	2
others[4]	32	1			T265	2		T130	2		T235	2
others[5]	36	1			T33	1		T280	1		T366	1
others[6]	33	1			T6	1		T11	1		T33	1
others[7]	31	1			T14	1		T208	1		T209	1
false	11503	1			T1	1		T2	3		T3	2
true	19247	1			T1	1		T2	5		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	38	1			T104	4		T98	2		T235	2
others[1]	30	1			T182	2		T152	2		T283	2
others[2]	46	1			T34	2		T98	2		T183	2
others[3]	46	1			T102	2		T133	4		T98	2
others[4]	40	1			T103	2		T98	2		T100	2
others[5]	30	1			T76	2		T133	2		T98	2
others[6]	40	1			T183	2		T156	2		T254	2
others[7]	46	1			T26	2		T76	2		T182	2
false	9945	1			T1	1		T2	3		T3	2
true	16943	1			T1	1		T2	5		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	100	1			T65	2		T66	4		T77	2
others[1]	92	1			T35	2		T105	2		T127	2
others[2]	106	1			T34	4		T13	2		T35	2
others[3]	62	1			T65	2		T103	2		T133	2
others[4]	98	1			T65	2		T101	2		T66	2
others[5]	82	1			T66	4		T133	4		T44	2
others[6]	96	1			T65	2		T76	2		T102	2
others[7]	98	1			T76	2		T105	2		T133	2
false	7043	1			T1	1		T2	2		T3	2
true	16738	1			T1	1		T2	4		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	94	1			T102	2		T130	4		T288	4
others[1]	72	1			T65	2		T133	4		T98	2
others[2]	102	1			T65	2		T66	2		T76	2
others[3]	108	1			T107	2		T65	4		T66	2
others[4]	76	1			T65	2		T98	2		T130	2
others[5]	86	1			T35	2		T98	2		T190	2
others[6]	98	1			T66	2		T279	2		T183	6
others[7]	110	1			T66	4		T103	2		T127	2
false	7043	1			T1	1		T2	2		T3	2
true	16738	1			T1	1		T2	4		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	98	1			T98	2		T414	2		T235	4
others[1]	98	1			T34	2		T66	2		T105	2
others[2]	86	1			T104	2		T190	2		T130	4
others[3]	90	1			T66	2		T104	2		T133	2
others[4]	86	1			T127	2		T130	2		T235	2
others[5]	90	1			T65	4		T66	2		T76	4
others[6]	92	1			T66	2		T98	2		T190	2
others[7]	124	1			T13	2		T104	2		T133	2
false	6461	1			T1	1		T2	2		T3	2
true	16726	1			T1	1		T2	4		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	96	1			T181	2		T130	4		T415	2
others[1]	108	1			T66	2		T76	4		T102	2
others[2]	86	1			T133	4		T279	2		T182	2
others[3]	102	1			T34	2		T65	2		T66	2
others[4]	88	1			T102	2		T181	2		T130	2
others[5]	104	1			T66	2		T67	2		T133	2
others[6]	104	1			T66	2		T104	2		T45	2
others[7]	92	1			T26	2		T66	4		T102	2
false	6461	1			T1	1		T2	2		T3	2
true	16726	1			T1	1		T2	4		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	72	1			T13	2		T35	4		T414	2
others[1]	70	1			T65	4		T66	2		T104	2
others[2]	82	1			T35	2		T66	2		T120	2
others[3]	82	1			T65	2		T182	2		T98	4
others[4]	70	1			T26	2		T66	2		T127	2
others[5]	70	1			T101	2		T182	2		T195	2
others[6]	66	1			T101	2		T133	2		T190	2
others[7]	86	1			T66	2		T104	2		T190	2
false	6914	1			T1	1		T2	1		T3	2
true	18166	1			T1	1		T2	4		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	50	1			T101	2		T190	2		T183	2
others[1]	72	1			T13	2		T183	2		T130	2
others[2]	66	1			T279	2		T130	4		T416	2
others[3]	64	1			T65	2		T104	2		T181	2
others[4]	86	1			T65	2		T190	2		T130	2
others[5]	62	1			T26	2		T104	2		T98	4
others[6]	66	1			T65	2		T66	2		T127	2
others[7]	52	1			T35	2		T65	2		T156	2
false	6914	1			T1	1		T2	1		T3	2
true	18166	1			T1	1		T2	4		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	41	1			T11	2		T15	1		T260	2
others[1]	28	1			T133	2		T33	1		T152	2
others[2]	35	1			T6	1		T11	2		T133	2
others[3]	39	1			T11	1		T14	1		T405	1
others[4]	30	1			T6	1		T11	1		T33	1
others[5]	20	1			T281	1		T406	1		T352	1
others[6]	49	1			T6	1		T33	2		T130	2
others[7]	33	1			T11	2		T417	2		T418	2
false	11755	1			T1	1		T2	3		T3	3
true	19366	1			T1	1		T2	5		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	94	1			T98	2		T190	2		T183	2
others[1]	90	1			T26	2		T133	2		T181	2
others[2]	90	1			T26	2		T66	2		T127	2
others[3]	86	1			T35	2		T103	2		T133	2
others[4]	124	1			T65	4		T66	2		T98	4
others[5]	104	1			T66	2		T103	2		T133	2
others[6]	80	1			T66	2		T105	2		T182	2
others[7]	118	1			T65	4		T66	2		T104	2
false	7756	1			T1	1		T2	3		T3	3
true	16933	1			T1	1		T2	5		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	27	1			T366	1		T290	1		T259	4
others[1]	34	1			T280	2		T405	1		T366	1
others[2]	30	1			T11	1		T14	2		T182	2
others[3]	50	1			T6	4		T182	2		T130	2
others[4]	29	1			T11	1		T235	2		T229	1
others[5]	47	1			T6	1		T133	2		T33	1
others[6]	33	1			T14	1		T280	1		T281	1
others[7]	37	1			T6	1		T11	1		T208	1
false	14448	1			T1	1		T2	4		T3	3
true	2483	1			T3	1		T5	2		T6	5