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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 9951 1 T1 9 T2 2 T3 13
true 16301 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10909 1 T1 11 T2 2 T3 14
true 16368 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 58 1 T14 2 T241 2 T340 2
others[1] 76 1 T3 2 T12 2 T14 2
others[2] 84 1 T12 2 T14 2 T101 2
others[3] 84 1 T14 2 T69 2 T103 2
others[4] 106 1 T14 2 T102 6 T105 2
others[5] 80 1 T12 2 T14 2 T100 2
others[6] 90 1 T3 2 T14 2 T106 2
others[7] 120 1 T3 2 T14 6 T107 2
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T12 2 T14 2 T78 4
others[1] 76 1 T34 4 T14 2 T78 2
others[2] 84 1 T109 2 T70 2 T246 2
others[3] 56 1 T3 2 T78 4 T338 2
others[4] 90 1 T1 2 T78 2 T70 2
others[5] 78 1 T1 2 T105 2 T108 2
others[6] 92 1 T14 6 T78 6 T70 4
others[7] 108 1 T34 2 T100 4 T241 2
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T14 2 T69 2 T106 2
others[1] 100 1 T14 2 T106 4 T78 4
others[2] 86 1 T14 2 T78 4 T125 2
others[3] 80 1 T14 2 T105 2 T109 2
others[4] 88 1 T3 2 T4 2 T14 2
others[5] 102 1 T14 6 T101 2 T103 2
others[6] 86 1 T12 2 T14 2 T105 2
others[7] 98 1 T103 2 T105 2 T106 2
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T14 2 T340 2 T338 2
others[1] 68 1 T12 2 T14 2 T69 2
others[2] 58 1 T129 2 T105 2 T78 6
others[3] 58 1 T103 2 T70 2 T340 2
others[4] 50 1 T34 2 T125 2 T369 2
others[5] 54 1 T12 2 T100 2 T107 2
others[6] 58 1 T14 4 T78 2 T70 2
others[7] 68 1 T109 4 T70 2 T369 2
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T34 2 T103 2 T107 2
others[1] 72 1 T106 2 T78 4 T70 4
others[2] 64 1 T102 2 T105 2 T106 2
others[3] 82 1 T4 2 T78 6 T70 4
others[4] 68 1 T4 2 T14 2 T101 2
others[5] 84 1 T14 2 T78 2 T70 2
others[6] 74 1 T14 2 T78 2 T208 2
others[7] 104 1 T14 2 T100 4 T103 2
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 32 1 T104 2 T70 2 T209 2
others[1] 28 1 T14 2 T248 2 T370 2
others[2] 56 1 T101 2 T177 2 T208 2
others[3] 34 1 T176 2 T177 2 T371 4
others[4] 48 1 T14 2 T78 2 T177 2
others[5] 26 1 T372 2 T373 2 T270 2
others[6] 34 1 T70 2 T374 2 T375 2
others[7] 44 1 T3 2 T104 2 T371 2
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T100 2 T78 6 T241 2
others[1] 72 1 T14 4 T108 2 T109 2
others[2] 92 1 T3 2 T101 2 T70 4
others[3] 78 1 T3 2 T34 2 T14 2
others[4] 80 1 T4 2 T105 2 T107 2
others[5] 80 1 T14 2 T102 2 T70 8
others[6] 86 1 T4 2 T14 4 T101 2
others[7] 94 1 T3 2 T14 4 T106 4
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T1 2 T14 2 T102 2
others[1] 90 1 T101 2 T108 2 T73 2
others[2] 68 1 T14 2 T104 2 T107 2
others[3] 72 1 T14 2 T70 2 T326 2
others[4] 104 1 T1 2 T14 2 T101 2
others[5] 76 1 T14 2 T105 2 T78 2
others[6] 94 1 T105 4 T106 2 T70 4
others[7] 108 1 T34 2 T241 4 T338 4
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T34 2 T69 2 T109 2
others[1] 90 1 T104 2 T106 2 T78 4
others[2] 94 1 T106 2 T125 2 T241 2
others[3] 92 1 T3 2 T12 2 T14 4
others[4] 82 1 T102 2 T103 2 T40 2
others[5] 86 1 T14 2 T106 2 T176 2
others[6] 90 1 T14 2 T103 2 T78 2
others[7] 88 1 T34 2 T14 6 T248 2
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T40 2 T105 2 T106 4
others[1] 84 1 T100 2 T78 2 T70 4
others[2] 66 1 T338 4 T57 2 T376 2
others[3] 74 1 T1 2 T14 2 T100 2
others[4] 88 1 T103 2 T78 2 T70 6
others[5] 70 1 T14 2 T78 2 T125 2
others[6] 82 1 T78 8 T70 2 T241 2
others[7] 110 1 T3 2 T14 4 T69 2
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T14 2 T102 2 T241 2
others[1] 108 1 T14 4 T105 2 T106 2
others[2] 94 1 T78 4 T177 2 T70 2
others[3] 86 1 T34 2 T14 2 T101 2
others[4] 82 1 T14 2 T103 2 T109 2
others[5] 92 1 T14 2 T69 2 T106 2
others[6] 90 1 T3 2 T100 2 T246 2
others[7] 118 1 T3 2 T14 8 T101 2
false 13894 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 35 1 T6 1 T7 1 T211 1
others[1] 26 1 T101 2 T105 2 T218 1
others[2] 25 1 T6 1 T65 1 T17 1
others[3] 31 1 T13 1 T65 1 T18 3
others[4] 38 1 T218 3 T246 2 T18 3
others[5] 30 1 T6 1 T7 1 T65 1
others[6] 23 1 T6 1 T16 1 T126 2
others[7] 28 1 T6 1 T7 1 T218 1
false 13894 1 T1 15 T2 5 T3 17
true 2199 1 T1 4 T2 1 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 34 1 T7 1 T218 1 T18 1
others[1] 25 1 T6 1 T7 2 T65 1
others[2] 27 1 T65 1 T218 1 T18 1
others[3] 31 1 T6 1 T13 1 T65 1
others[4] 36 1 T16 1 T78 2 T218 1
others[5] 24 1 T6 1 T101 2 T18 1
others[6] 27 1 T6 1 T17 1 T18 1
others[7] 32 1 T6 1 T105 2 T218 2
false 11355 1 T1 13 T2 2 T3 14
true 18524 1 T1 19 T2 6 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T3 2 T14 4 T102 2
others[1] 62 1 T14 2 T100 2 T102 2
others[2] 98 1 T12 2 T14 4 T70 4
others[3] 72 1 T103 2 T369 2 T233 2
others[4] 116 1 T14 2 T103 2 T40 2
others[5] 94 1 T3 2 T12 2 T14 2
others[6] 74 1 T3 2 T12 2 T69 2
others[7] 94 1 T14 6 T109 2 T78 2
false 7837 1 T1 2 T2 2 T3 1
true 16439 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T78 4 T177 2 T70 4
others[1] 102 1 T12 2 T34 2 T14 2
others[2] 70 1 T1 2 T108 2 T70 2
others[3] 84 1 T1 2 T3 2 T34 2
others[4] 66 1 T109 2 T78 4 T338 2
others[5] 58 1 T14 2 T109 2 T78 2
others[6] 92 1 T78 4 T338 2 T93 2
others[7] 102 1 T34 2 T14 6 T100 2
false 6872 1 T1 1 T2 2 T3 2
true 16190 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T69 2 T101 4 T106 2
others[1] 58 1 T14 2 T78 2 T176 2
others[2] 104 1 T14 2 T103 2 T105 2
others[3] 88 1 T4 2 T12 2 T105 2
others[4] 106 1 T14 2 T105 2 T109 2
others[5] 86 1 T14 4 T103 2 T105 2
others[6] 108 1 T14 4 T176 2 T70 4
others[7] 102 1 T3 2 T14 4 T108 2
false 7314 1 T1 2 T2 2 T3 1
true 16204 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 37 1 T6 2 T247 2 T211 1
others[1] 34 1 T65 1 T78 2 T18 2
others[2] 30 1 T14 2 T249 2 T377 1
others[3] 28 1 T6 1 T7 1 T218 1
others[4] 34 1 T5 2 T12 2 T65 1
others[5] 29 1 T13 1 T125 2 T17 1
others[6] 40 1 T218 1 T338 2 T18 1
others[7] 34 1 T6 1 T218 1 T17 2
false 11297 1 T1 13 T2 2 T3 14
true 18473 1 T1 20 T2 6 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T105 2 T70 2 T233 2
others[1] 66 1 T14 2 T100 2 T69 2
others[2] 58 1 T14 2 T129 2 T241 2
others[3] 52 1 T109 2 T340 4 T367 2
others[4] 42 1 T14 2 T105 2 T241 2
others[5] 66 1 T12 2 T14 2 T103 2
others[6] 78 1 T78 4 T70 2 T241 4
others[7] 68 1 T12 2 T34 2 T129 2
false 8979 1 T1 13 T2 2 T3 14
true 16425 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 32 1 T65 1 T218 1 T18 1
others[1] 37 1 T1 2 T6 5 T18 1
others[2] 30 1 T7 1 T18 1 T378 2
others[3] 29 1 T7 1 T124 2 T253 1
others[4] 27 1 T7 1 T218 1 T377 1
others[5] 31 1 T16 1 T17 1 T124 1
others[6] 27 1 T6 1 T65 1 T218 1
others[7] 33 1 T65 1 T218 1 T17 1
false 11236 1 T1 11 T2 2 T3 14
true 18437 1 T1 21 T2 6 T3 21


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T14 4 T78 4 T208 2
others[1] 102 1 T100 2 T105 2 T107 2
others[2] 80 1 T4 2 T14 2 T101 2
others[3] 64 1 T125 2 T70 2 T126 2
others[4] 62 1 T14 2 T78 4 T70 2
others[5] 68 1 T106 2 T78 2 T208 2
others[6] 78 1 T4 2 T102 2 T106 2
others[7] 112 1 T34 2 T100 2 T103 4
false 7815 1 T1 2 T2 2 T3 1
true 16355 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 34 1 T65 2 T106 2 T218 2
others[1] 35 1 T6 1 T218 1 T18 2
others[2] 32 1 T101 2 T107 2 T124 1
others[3] 37 1 T7 1 T125 2 T218 1
others[4] 36 1 T6 1 T7 1 T16 1
others[5] 36 1 T6 2 T7 1 T13 1
others[6] 30 1 T218 1 T338 2 T17 1
others[7] 33 1 T6 1 T65 1 T218 1
false 11191 1 T1 11 T2 2 T3 14
true 18380 1 T1 20 T2 5 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 42 1 T104 2 T78 2 T177 2
others[1] 40 1 T101 2 T177 2 T371 4
others[2] 46 1 T176 2 T70 4 T370 4
others[3] 18 1 T270 4 T379 2 T380 2
others[4] 28 1 T14 2 T104 2 T248 2
others[5] 36 1 T177 2 T209 2 T381 2
others[6] 38 1 T208 2 T372 2 T196 2
others[7] 54 1 T3 2 T14 2 T371 4
false 9779 1 T1 2 T2 2 T3 1
true 16395 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 58 1 T14 2 T106 2 T78 2
others[1] 88 1 T101 2 T107 2 T78 2
others[2] 78 1 T109 2 T125 4 T70 2
others[3] 68 1 T3 2 T14 2 T78 2
others[4] 104 1 T34 2 T14 6 T108 2
others[5] 68 1 T4 2 T14 2 T106 2
others[6] 98 1 T4 2 T14 2 T100 2
others[7] 80 1 T3 4 T14 2 T101 2
false 7036 1 T1 6 T2 2 T3 1
true 16185 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T1 2 T105 2 T70 2
others[1] 86 1 T1 2 T14 2 T105 2
others[2] 92 1 T14 2 T101 2 T105 2
others[3] 106 1 T107 2 T176 2 T70 4
others[4] 98 1 T14 2 T108 2 T78 4
others[5] 70 1 T338 4 T382 4 T247 2
others[6] 76 1 T34 2 T14 2 T102 2
others[7] 72 1 T14 2 T101 2 T105 2
false 7036 1 T1 6 T2 2 T3 1
true 16185 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T69 2 T106 2 T125 2
others[1] 84 1 T102 2 T103 2 T40 2
others[2] 108 1 T34 4 T14 4 T69 2
others[3] 84 1 T14 2 T108 2 T78 2
others[4] 78 1 T12 2 T14 2 T78 2
others[5] 78 1 T106 2 T176 2 T70 4
others[6] 96 1 T14 2 T103 2 T78 4
others[7] 88 1 T3 2 T14 4 T106 2
false 6420 1 T1 1 T2 2 T3 1
true 16180 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T14 2 T78 2 T241 2
others[1] 82 1 T103 2 T106 2 T78 2
others[2] 56 1 T78 2 T208 2 T241 2
others[3] 94 1 T103 2 T106 2 T78 2
others[4] 90 1 T14 2 T129 2 T105 2
others[5] 92 1 T1 2 T3 2 T14 2
others[6] 74 1 T69 2 T103 2 T125 2
others[7] 102 1 T14 2 T100 2 T40 2
false 6420 1 T1 1 T2 2 T3 1
true 16180 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 48 1 T105 2 T70 2 T248 2
others[1] 56 1 T14 2 T70 2 T241 2
others[2] 70 1 T3 2 T14 6 T106 2
others[3] 54 1 T14 2 T176 2 T241 2
others[4] 66 1 T14 6 T101 4 T78 2
others[5] 56 1 T3 2 T106 2 T78 2
others[6] 58 1 T14 2 T108 2 T241 2
others[7] 62 1 T241 4 T338 2 T93 2
false 6873 1 T1 2 T2 2 T3 2
true 17506 1 T1 15 T2 6 T3 18


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T3 2 T14 2 T125 2
others[1] 56 1 T12 2 T14 2 T241 2
others[2] 56 1 T101 2 T103 2 T338 2
others[3] 46 1 T78 4 T233 2 T338 2
others[4] 62 1 T1 2 T14 4 T101 2
others[5] 58 1 T14 2 T100 2 T125 2
others[6] 46 1 T34 2 T14 4 T248 2
others[7] 68 1 T14 2 T105 2 T106 2
false 6873 1 T1 2 T2 2 T3 2
true 17506 1 T1 15 T2 6 T3 18


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 25 1 T7 1 T107 2 T78 2
others[1] 39 1 T5 2 T7 1 T65 2
others[2] 28 1 T6 1 T7 2 T338 2
others[3] 38 1 T6 1 T13 1 T14 2
others[4] 35 1 T6 1 T7 2 T218 2
others[5] 37 1 T12 2 T6 2 T7 1
others[6] 36 1 T6 1 T65 1 T211 1
others[7] 28 1 T218 1 T41 2 T376 2
false 11426 1 T1 13 T2 2 T3 14
true 18561 1 T1 19 T2 5 T3 21


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T103 2 T78 2 T177 2
others[1] 78 1 T100 2 T106 2 T78 2
others[2] 98 1 T14 6 T101 2 T102 2
others[3] 94 1 T14 2 T106 4 T78 2
others[4] 74 1 T3 2 T34 2 T14 2
others[5] 84 1 T14 10 T101 2 T105 2
others[6] 106 1 T3 2 T78 2 T246 2
others[7] 116 1 T69 2 T125 2 T70 2
false 7762 1 T1 2 T2 2 T3 2
true 16394 1 T1 15 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 26 1 T7 1 T18 1 T211 1
others[1] 34 1 T6 2 T17 1 T18 1
others[2] 28 1 T78 2 T218 1 T124 1
others[3] 44 1 T218 1 T338 2 T18 2
others[4] 19 1 T12 2 T6 1 T154 2
others[5] 46 1 T65 1 T218 1 T18 1
others[6] 31 1 T5 2 T6 1 T65 1
others[7] 38 1 T13 1 T14 2 T125 2
false 13894 1 T1 15 T2 5 T3 17
true 2200 1 T1 5 T2 1 T3 6

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%