Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
84.44 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_otp_ctrl_env_0.1/otp_ctrl_env_cov.sv



Summary for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 18 1 17 94.44
Crosses 72 13 59 81.94


Variables for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
err_code_vals 7 1 6 85.71 100 1 1 0
partition 11 0 11 100.00 100 1 1 0


Crosses for Group otp_ctrl_env_pkg::otp_ctrl_env_cov::dai_err_code_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
dai_err_code_for_all_partitions 72 13 59 81.94 100 1 1 0


Summary for Variable err_code_vals

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 7 1 6 85.71


User Defined Bins for err_code_vals

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
macro_err 0 1 1


Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_err 0 Illegal


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err 54117 1 T3 255 T68 44 T9 180
access_err 64069 1 T3 8 T8 22 T6 139
write_blank_err 433 1 T3 1 T8 8 T14 1
ecc_uncorr_err 62173 1 T3 354 T8 430 T138 66
ecc_corr_err 1189 1 T138 5 T47 8 T63 10
no_err 93349 1 T2 143 T3 55 T8 71



Summary for Variable partition

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 11 0 11 100.00


User Defined Bins for partition

Excluded/Illegal bins
NAMECOUNTSTATUS
illegal_idx 0 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
life_cycle 727 1 T8 7 T14 2 T15 14
secret2 23269 1 T2 14 T8 12 T5 3
secret1 29980 1 T2 12 T3 5 T8 8
secret0 38007 1 T2 12 T3 616 T5 2
hw_cfg1 35604 1 T2 8 T3 6 T8 445
hw_cfg0 25855 1 T2 18 T3 8 T8 6
rot_creator_auth_state 22636 1 T2 17 T3 6 T8 7
rot_creator_auth_codesign 22514 1 T2 8 T3 14 T8 17
owner_sw_cfg 21660 1 T2 19 T3 4 T8 4
creator_sw_cfg 23744 1 T2 17 T3 5 T8 13
vendor_test 31334 1 T2 18 T3 9 T8 12



Summary for Cross dai_err_code_for_all_partitions

Samples crossed: err_code_vals partition
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
TOTAL 72 13 59 81.94 13
Automatically Generated Cross Bins 72 13 59 81.94 13
User Defined Cross Bins 0 0 0


Automatically Generated Cross Bins for dai_err_code_for_all_partitions

Uncovered bins
err_code_valspartitionCOUNTAT LEASTNUMBERSTATUS
[fsm_err] [life_cycle] 0 1 1
[ecc_corr_err] [vendor_test] 0 1 1
[macro_err] [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] -- -- 10
[no_err] [life_cycle] 0 1 1


Covered bins
err_code_valspartitionCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
fsm_err secret2 2611 1 T339 85 T182 17 T340 29
fsm_err secret1 6101 1 T20 4 T130 219 T200 275
fsm_err secret0 7164 1 T3 255 T341 324 T130 145
fsm_err hw_cfg1 2444 1 T342 153 T343 26 T333 256
fsm_err hw_cfg0 5327 1 T9 180 T176 244 T103 21
fsm_err rot_creator_auth_state 3925 1 T148 39 T141 34 T344 45
fsm_err rot_creator_auth_codesign 3793 1 T93 68 T227 436 T259 265
fsm_err owner_sw_cfg 4201 1 T138 35 T235 143 T82 463
fsm_err creator_sw_cfg 5183 1 T141 29 T106 72 T231 46
fsm_err vendor_test 13368 1 T68 44 T180 427 T181 322
access_err life_cycle 727 1 T8 7 T14 2 T15 14
access_err secret2 11301 1 T8 12 T6 26 T7 10
access_err secret1 5965 1 T6 24 T7 5 T19 10
access_err secret0 4903 1 T6 34 T7 9 T19 5
access_err hw_cfg1 1362 1 T3 1 T8 1 T6 4
access_err hw_cfg0 2236 1 T6 2 T7 1 T19 9
access_err rot_creator_auth_state 6195 1 T3 1 T8 2 T6 18
access_err rot_creator_auth_codesign 8265 1 T6 8 T7 6 T19 11
access_err owner_sw_cfg 7415 1 T6 3 T7 2 T19 8
access_err creator_sw_cfg 7923 1 T3 3 T6 11 T7 7
access_err vendor_test 7777 1 T3 3 T6 9 T7 5
write_blank_err secret2 11 1 T120 1 T345 1 T259 1
write_blank_err secret1 24 1 T97 1 T223 1 T177 1
write_blank_err secret0 44 1 T3 1 T15 1 T97 1
write_blank_err hw_cfg1 74 1 T8 1 T14 1 T15 2
write_blank_err hw_cfg0 14 1 T86 1 T346 1 T336 1
write_blank_err rot_creator_auth_state 139 1 T8 3 T15 2 T223 14
write_blank_err rot_creator_auth_codesign 67 1 T8 1 T223 4 T346 7
write_blank_err owner_sw_cfg 20 1 T15 2 T120 1 T272 1
write_blank_err creator_sw_cfg 13 1 T8 2 T177 1 T259 1
write_blank_err vendor_test 27 1 T8 1 T346 2 T347 4
ecc_uncorr_err secret2 4002 1 T139 10 T120 590 T345 176
ecc_uncorr_err secret1 8449 1 T139 9 T148 43 T141 25
ecc_uncorr_err secret0 16932 1 T3 354 T15 91 T141 28
ecc_uncorr_err hw_cfg1 20485 1 T8 430 T138 35 T14 573
ecc_uncorr_err hw_cfg0 5489 1 T86 253 T141 30 T189 17
ecc_uncorr_err rot_creator_auth_state 3368 1 T138 31 T141 30 T189 14
ecc_uncorr_err rot_creator_auth_codesign 800 1 T148 50 T141 25 T143 23
ecc_uncorr_err owner_sw_cfg 702 1 T143 15 T348 5 T349 75
ecc_uncorr_err creator_sw_cfg 1946 1 T183 52 T350 4 T349 66
ecc_corr_err secret2 82 1 T54 8 T141 1 T189 2
ecc_corr_err secret1 129 1 T138 1 T54 7 T141 1
ecc_corr_err secret0 146 1 T138 2 T63 3 T54 3
ecc_corr_err hw_cfg1 236 1 T47 1 T63 1 T54 3
ecc_corr_err hw_cfg0 199 1 T47 3 T63 4 T54 6
ecc_corr_err rot_creator_auth_state 90 1 T47 2 T63 1 T54 2
ecc_corr_err rot_creator_auth_codesign 109 1 T138 2 T63 1 T54 5
ecc_corr_err owner_sw_cfg 95 1 T47 1 T54 4 T22 1
ecc_corr_err creator_sw_cfg 103 1 T47 1 T54 7 T22 1
no_err secret2 5262 1 T2 14 T5 3 T6 6
no_err secret1 9312 1 T2 12 T3 5 T8 8
no_err secret0 8818 1 T2 12 T3 6 T5 2
no_err hw_cfg1 11003 1 T2 8 T3 5 T8 13
no_err hw_cfg0 12590 1 T2 18 T3 8 T8 6
no_err rot_creator_auth_state 8919 1 T2 17 T3 5 T8 2
no_err rot_creator_auth_codesign 9480 1 T2 8 T3 14 T8 16
no_err owner_sw_cfg 9227 1 T2 19 T3 4 T8 4
no_err creator_sw_cfg 8576 1 T2 17 T3 2 T8 11
no_err vendor_test 10162 1 T2 18 T3 6 T8 11


User Defined Cross Bins for dai_err_code_for_all_partitions

Excluded/Illegal bins
NAMECOUNTSTATUS
vendor_test_ecc_uncorrectable_err 0 Illegal
life_cycle_ignore 0 Excluded

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