Unified Coverage Report :: Group Instance : mubi8_cov_of_mubi8_cov_of_tb.dut.owner_sw_cfg_read_lock_mubi_cov_if

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	9	1	10.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
true	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

14707

1

T1

4

T2

4

T3

13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	9	1	10.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
true	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

14707

1

T1

4

T2

4

T3

13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	8	2	20.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

10576

1

T1

2

T2

1

T3

12

true

17093

1

T1

4

T2

4

T3

14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	8	2	20.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

11540

1

T1

2

T2

2

T3

12

true

17149

1

T1

4

T2

4

T3

14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	114	1			T92	2		T166	4		T167	2
others[1]	100	1			T98	2		T101	2		T92	4
others[2]	100	1			T10	2		T100	2		T102	2
others[3]	108	1			T97	2		T101	2		T93	4
others[4]	106	1			T99	2		T101	2		T126	2
others[5]	100	1			T99	2		T111	2		T197	2
others[6]	104	1			T10	2		T92	2		T126	4
others[7]	108	1			T98	2		T126	4		T154	2
false	14707	1			T1	4		T2	4		T3	13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	106	1			T26	2		T97	2		T101	2
others[1]	92	1			T126	4		T154	2		T168	2
others[2]	92	1			T10	2		T37	2		T99	2
others[3]	118	1			T97	4		T92	4		T126	4
others[4]	90	1			T110	2		T101	2		T92	4
others[5]	76	1			T25	2		T170	2		T210	4
others[6]	102	1			T10	2		T26	2		T37	2
others[7]	128	1			T166	2		T237	2		T358	2
false	14707	1			T1	4		T2	4		T3	13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	94	1			T92	2		T93	2		T126	4
others[1]	100	1			T92	4		T166	2		T359	2
others[2]	66	1			T101	2		T102	2		T92	4
others[3]	70	1			T10	2		T126	4		T360	2
others[4]	90	1			T10	2		T92	2		T126	2
others[5]	102	1			T25	2		T97	2		T99	2
others[6]	96	1			T100	2		T92	2		T361	2
others[7]	130	1			T10	2		T109	2		T111	2
false	14707	1			T1	4		T2	4		T3	13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	56	1			T177	2		T361	2		T50	2
others[1]	42	1			T168	2		T169	2		T362	4
others[2]	52	1			T126	2		T170	2		T237	2
others[3]	82	1			T98	2		T126	2		T358	4
others[4]	58	1			T110	2		T92	2		T126	2
others[5]	70	1			T98	2		T177	2		T361	2
others[6]	70	1			T99	4		T237	2		T177	2
others[7]	86	1			T92	4		T126	4		T210	2
false	14707	1			T1	4		T2	4		T3	13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	82	1			T100	2		T126	2		T361	4
others[1]	104	1			T10	2		T25	2		T101	2
others[2]	94	1			T92	4		T126	2		T197	2
others[3]	92	1			T92	2		T166	2		T154	2
others[4]	86	1			T210	2		T237	4		T363	2
others[5]	92	1			T99	2		T209	2		T168	2
others[6]	106	1			T97	2		T92	4		T126	4
others[7]	110	1			T98	2		T99	2		T102	2
false	14707	1			T1	4		T2	4		T3	13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	56	1			T92	2		T361	2		T364	2
others[1]	26	1			T10	2		T166	2		T210	2
others[2]	30	1			T101	4		T102	2		T166	4
others[3]	42	1			T126	2		T154	4		T155	2
others[4]	64	1			T10	2		T102	2		T126	2
others[5]	38	1			T102	2		T126	2		T365	2
others[6]	46	1			T101	2		T166	4		T126	2
others[7]	44	1			T166	2		T209	2		T361	2
false	14707	1			T1	4		T2	4		T3	13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	106	1			T37	2		T101	2		T92	2
others[1]	92	1			T26	2		T101	2		T126	2
others[2]	62	1			T93	2		T126	6		T361	2
others[3]	132	1			T99	2		T126	2		T363	2
others[4]	108	1			T98	2		T99	2		T27	2
others[5]	96	1			T100	2		T101	2		T92	4
others[6]	118	1			T37	4		T98	2		T102	2
others[7]	102	1			T97	2		T92	2		T258	2
false	14707	1			T1	4		T2	4		T3	13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	100	1			T10	2		T110	2		T92	2
others[1]	102	1			T92	2		T126	2		T169	2
others[2]	98	1			T10	4		T97	4		T99	2
others[3]	106	1			T97	2		T98	2		T92	2
others[4]	94	1			T126	2		T209	2		T366	2
others[5]	86	1			T92	4		T154	2		T210	2
others[6]	92	1			T10	2		T37	2		T92	2
others[7]	140	1			T37	2		T101	2		T92	2
false	14707	1			T1	4		T2	4		T3	13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	116	1			T101	2		T92	2		T154	2
others[1]	96	1			T10	2		T25	2		T110	2
others[2]	108	1			T37	2		T92	4		T126	2
others[3]	66	1			T99	2		T126	4		T209	2
others[4]	96	1			T92	4		T126	4		T80	2
others[5]	118	1			T101	2		T92	2		T166	2
others[6]	110	1			T10	2		T26	2		T98	2
others[7]	140	1			T97	2		T100	2		T92	4
false	14707	1			T1	4		T2	4		T3	13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	110	1			T10	2		T101	2		T126	4
others[1]	90	1			T98	2		T100	2		T92	4
others[2]	106	1			T10	2		T100	2		T92	2
others[3]	90	1			T37	2		T100	2		T102	2
others[4]	86	1			T25	2		T97	2		T154	2
others[5]	90	1			T92	6		T93	4		T126	4
others[6]	114	1			T26	2		T97	2		T99	2
others[7]	90	1			T92	6		T367	2		T177	2
false	14707	1			T1	4		T2	4		T3	13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	84	1			T33	2		T37	4		T92	2
others[1]	86	1			T126	4		T254	2		T170	4
others[2]	110	1			T10	2		T37	2		T126	2
others[3]	116	1			T99	2		T100	2		T92	2
others[4]	80	1			T98	2		T126	2		T177	2
others[5]	108	1			T92	2		T126	2		T209	2
others[6]	102	1			T97	2		T98	2		T100	2
others[7]	116	1			T110	2		T102	2		T92	4
false	14707	1			T1	4		T2	4		T3	13

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	35	1			T6	1		T191	1		T237	2
others[1]	29	1			T3	1		T257	1		T319	1
others[2]	25	1			T3	1		T6	3		T66	1
others[3]	32	1			T3	1		T66	1		T15	1
others[4]	25	1			T14	2		T67	1		T68	1
others[5]	29	1			T66	2		T93	2		T318	1
others[6]	36	1			T6	1		T14	1		T66	1
others[7]	33	1			T14	1		T68	1		T257	1
false	14707	1			T1	4		T2	4		T3	13
true	2487	1			T3	3		T10	4		T6	5

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	33	1			T3	1		T6	2		T68	1
others[1]	37	1			T6	1		T14	1		T66	1
others[2]	31	1			T3	1		T66	1		T318	1
others[3]	25	1			T6	1		T66	1		T67	1
others[4]	20	1			T66	1		T67	1		T212	1
others[5]	21	1			T6	1		T14	1		T66	1
others[6]	33	1			T212	1		T240	1		T273	1
others[7]	44	1			T3	1		T14	2		T68	1
false	11994	1			T1	3		T2	3		T3	13
true	19571	1			T1	5		T2	5		T3	16

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	100	1			T98	2		T99	2		T126	2
others[1]	108	1			T10	2		T101	4		T102	2
others[2]	86	1			T166	2		T210	2		T186	2
others[3]	130	1			T92	2		T166	2		T126	2
others[4]	82	1			T99	2		T111	2		T126	2
others[5]	76	1			T98	2		T92	2		T126	2
others[6]	128	1			T10	2		T101	2		T92	4
others[7]	130	1			T97	2		T100	2		T92	2
false	8020	1			T1	3		T2	3		T3	13
true	17211	1			T1	5		T2	5		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	112	1			T99	2		T126	4		T170	2
others[1]	92	1			T26	2		T37	2		T100	2
others[2]	102	1			T10	2		T97	2		T99	2
others[3]	82	1			T92	4		T210	2		T177	2
others[4]	120	1			T10	2		T101	2		T92	4
others[5]	108	1			T37	2		T97	2		T126	2
others[6]	62	1			T97	2		T92	2		T359	2
others[7]	126	1			T25	2		T26	2		T126	4
false	6958	1			T1	2		T2	1		T3	12
true	16974	1			T1	4		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	96	1			T10	2		T101	2		T92	4
others[1]	82	1			T10	2		T109	2		T92	4
others[2]	80	1			T111	2		T166	2		T368	2
others[3]	100	1			T100	2		T126	2		T210	2
others[4]	90	1			T10	2		T99	2		T111	2
others[5]	102	1			T25	2		T101	2		T92	2
others[6]	84	1			T100	2		T92	2		T126	2
others[7]	114	1			T97	2		T100	2		T102	2
false	7446	1			T1	2		T2	2		T3	12
true	16996	1			T1	4		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	38	1			T3	1		T66	1		T68	1
others[1]	37	1			T67	1		T68	3		T240	1
others[2]	37	1			T68	1		T257	1		T154	2
others[3]	32	1			T66	2		T67	1		T126	2
others[4]	32	1			T7	1		T68	1		T318	1
others[5]	28	1			T6	1		T14	1		T66	1
others[6]	26	1			T14	1		T67	1		T15	2
others[7]	36	1			T6	2		T68	1		T126	2
false	11922	1			T1	3		T2	2		T3	13
true	19537	1			T1	5		T2	4		T3	16

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	64	1			T126	2		T237	2		T361	2
others[1]	70	1			T98	2		T126	4		T362	2
others[2]	70	1			T98	2		T210	2		T177	4
others[3]	58	1			T92	4		T126	2		T358	2
others[4]	62	1			T99	4		T168	2		T72	2
others[5]	60	1			T110	2		T167	2		T170	2
others[6]	50	1			T92	2		T126	2		T210	2
others[7]	82	1			T169	2		T358	2		T186	6
false	9190	1			T1	3		T2	2		T3	13
true	17189	1			T1	5		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	29	1			T6	1		T14	1		T240	1
others[1]	33	1			T191	1		T369	1		T360	2
others[2]	32	1			T68	1		T15	2		T126	2
others[3]	32	1			T6	1		T191	2		T15	1
others[4]	26	1			T6	1		T15	1		T212	1
others[5]	36	1			T6	2		T67	1		T15	1
others[6]	39	1			T7	1		T191	1		T67	1
others[7]	47	1			T6	3		T191	1		T15	1
false	11863	1			T1	2		T2	2		T3	13
true	19497	1			T1	4		T2	4		T3	16

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	80	1			T25	2		T102	2		T126	2
others[1]	106	1			T10	2		T92	2		T126	8
others[2]	86	1			T92	4		T166	2		T72	2
others[3]	110	1			T209	2		T197	2		T177	2
others[4]	98	1			T166	2		T126	4		T154	2
others[5]	78	1			T97	2		T98	2		T100	2
others[6]	106	1			T92	2		T154	2		T237	2
others[7]	102	1			T99	4		T92	4		T126	2
false	7885	1			T1	2		T2	2		T3	13
true	17115	1			T1	4		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	34	1			T67	1		T68	1		T71	1
others[1]	34	1			T6	1		T15	1		T257	1
others[2]	30	1			T6	1		T7	1		T191	3
others[3]	46	1			T14	1		T97	2		T68	1
others[4]	44	1			T6	3		T92	2		T71	1
others[5]	39	1			T6	1		T7	1		T191	1
others[6]	34	1			T67	2		T257	1		T318	1
others[7]	43	1			T3	1		T7	2		T14	1
false	11828	1			T1	2		T2	2		T3	13
true	19447	1			T1	4		T2	4		T3	16

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	28	1			T209	2		T186	2		T370	2
others[1]	36	1			T101	2		T102	2		T166	2
others[2]	22	1			T166	2		T126	2		T214	4
others[3]	56	1			T101	2		T102	2		T166	4
others[4]	44	1			T102	2		T126	2		T186	2
others[5]	58	1			T209	2		T210	2		T237	2
others[6]	46	1			T10	4		T92	2		T166	4
others[7]	56	1			T101	2		T126	4		T154	2
false	10255	1			T1	2		T2	2		T3	13
true	17154	1			T1	4		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	102	1			T26	2		T92	2		T166	2
others[1]	114	1			T101	4		T92	2		T126	2
others[2]	100	1			T93	2		T126	6		T209	2
others[3]	96	1			T37	4		T99	2		T92	2
others[4]	86	1			T37	2		T126	2		T181	2
others[5]	92	1			T98	2		T100	2		T102	2
others[6]	100	1			T99	2		T27	2		T126	2
others[7]	126	1			T97	2		T98	2		T101	2
false	7160	1			T1	2		T2	2		T3	12
true	16974	1			T1	4		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	100	1			T166	2		T169	2		T368	2
others[1]	102	1			T101	2		T92	6		T126	2
others[2]	106	1			T10	2		T37	2		T97	2
others[3]	80	1			T97	2		T98	2		T99	2
others[4]	102	1			T37	2		T166	2		T154	2
others[5]	110	1			T10	2		T209	2		T169	2
others[6]	90	1			T10	2		T92	2		T126	2
others[7]	128	1			T10	2		T97	2		T110	2
false	7160	1			T1	2		T2	2		T3	12
true	16974	1			T1	4		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	86	1			T10	2		T210	2		T237	2
others[1]	118	1			T25	2		T26	2		T100	2
others[2]	106	1			T166	2		T210	4		T237	2
others[3]	84	1			T92	6		T126	2		T237	6
others[4]	124	1			T92	2		T166	2		T126	2
others[5]	120	1			T101	2		T126	6		T237	8
others[6]	82	1			T37	2		T98	2		T99	4
others[7]	130	1			T10	2		T97	2		T110	2
false	6487	1			T1	1		T2	1		T3	12
true	16975	1			T1	4		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	90	1			T100	2		T210	2		T237	2
others[1]	96	1			T26	2		T92	4		T209	2
others[2]	98	1			T25	2		T98	2		T101	2
others[3]	116	1			T10	2		T97	2		T100	2
others[4]	88	1			T97	2		T99	2		T100	2
others[5]	108	1			T10	2		T92	6		T93	2
others[6]	92	1			T37	2		T93	2		T126	2
others[7]	88	1			T92	4		T126	4		T210	4
false	6487	1			T1	1		T2	1		T3	12
true	16975	1			T1	4		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	82	1			T92	2		T93	2		T166	2
others[1]	58	1			T97	2		T166	2		T186	2
others[2]	60	1			T111	2		T100	2		T102	2
others[3]	70	1			T10	2		T92	2		T166	2
others[4]	82	1			T110	2		T102	2		T237	2
others[5]	84	1			T25	2		T99	2		T102	4
others[6]	60	1			T37	2		T371	2		T372	2
others[7]	68	1			T25	2		T126	2		T209	2
false	7020	1			T1	1		T2	1		T3	12
true	18454	1			T1	4		T2	4		T3	17

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	76	1			T92	2		T166	2		T126	4
others[1]	74	1			T92	4		T209	2		T170	2
others[2]	58	1			T92	2		T359	2		T177	2
others[3]	70	1			T10	2		T92	2		T126	2
others[4]	78	1			T99	2		T170	2		T210	2
others[5]	96	1			T10	2		T99	4		T110	2
others[6]	72	1			T101	2		T92	4		T360	2
others[7]	82	1			T102	2		T92	4		T210	2
false	7020	1			T1	1		T2	1		T3	12
true	18454	1			T1	4		T2	4		T3	17

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	42	1			T7	3		T67	2		T68	1
others[1]	41	1			T14	2		T66	1		T15	1
others[2]	33	1			T6	2		T14	1		T68	1
others[3]	38	1			T14	1		T68	1		T101	2
others[4]	40	1			T6	2		T66	1		T67	1
others[5]	26	1			T14	2		T212	1		T272	2
others[6]	24	1			T14	1		T66	1		T15	1
others[7]	47	1			T7	1		T14	1		T191	1
false	12086	1			T1	3		T2	3		T3	13
true	19661	1			T1	5		T2	5		T3	15

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	84	1			T10	2		T97	2		T166	2
others[1]	100	1			T100	2		T102	2		T92	2
others[2]	116	1			T33	2		T37	2		T92	2
others[3]	92	1			T99	2		T170	2		T358	2
others[4]	98	1			T92	2		T126	2		T167	2
others[5]	100	1			T98	2		T166	2		T126	4
others[6]	78	1			T37	4		T209	2		T154	2
others[7]	134	1			T98	2		T110	2		T100	2
false	7885	1			T1	3		T2	3		T3	13
true	17155	1			T1	5		T2	5		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	45	1			T6	1		T66	1		T67	1
others[1]	26	1			T7	1		T67	1		T15	1
others[2]	29	1			T67	1		T68	1		T318	1
others[3]	34	1			T6	1		T15	1		T126	2
others[4]	31	1			T6	1		T14	1		T68	2
others[5]	35	1			T67	1		T68	1		T318	1
others[6]	33	1			T3	1		T66	2		T68	1
others[7]	34	1			T14	1		T66	1		T68	1
false	14707	1			T1	4		T2	4		T3	13
true	2500	1			T3	3		T10	4		T6	5