dashboard | hierarchy | modlist | groups | tests | asserts

Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10250 1 T1 12 T2 3 T3 1
true 16710 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11143 1 T1 15 T2 3 T3 2
true 16768 1 T1 18 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T62 2 T107 2 T108 2
others[1] 102 1 T5 2 T15 2 T131 8
others[2] 92 1 T14 2 T15 2 T95 2
others[3] 96 1 T1 2 T62 2 T107 2
others[4] 110 1 T96 2 T97 2 T99 2
others[5] 100 1 T95 2 T131 2 T264 2
others[6] 126 1 T107 2 T96 2 T131 4
others[7] 92 1 T15 2 T111 2 T210 2
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T1 2 T104 2 T92 2
others[1] 98 1 T15 2 T107 2 T131 2
others[2] 88 1 T5 2 T106 2 T381 2
others[3] 68 1 T62 2 T91 2 T98 2
others[4] 90 1 T15 2 T104 2 T213 2
others[5] 86 1 T15 4 T92 4 T131 4
others[6] 108 1 T1 2 T5 2 T96 2
others[7] 88 1 T15 2 T95 2 T210 2
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T14 2 T15 2 T62 2
others[1] 104 1 T15 4 T99 2 T210 2
others[2] 68 1 T1 2 T105 2 T99 2
others[3] 86 1 T15 2 T92 2 T101 2
others[4] 86 1 T15 2 T98 2 T131 2
others[5] 124 1 T5 2 T95 2 T97 2
others[6] 68 1 T107 2 T96 4 T131 10
others[7] 118 1 T15 2 T98 2 T210 2
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T211 2 T212 2 T131 2
others[1] 56 1 T107 4 T382 2 T116 4
others[2] 48 1 T107 2 T210 2 T131 2
others[3] 68 1 T95 4 T97 2 T98 2
others[4] 44 1 T131 2 T383 2 T116 2
others[5] 60 1 T107 2 T210 4 T101 2
others[6] 60 1 T108 2 T210 2 T101 2
others[7] 68 1 T108 2 T98 2 T99 2
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T15 4 T95 2 T97 2
others[1] 88 1 T15 2 T91 2 T95 2
others[2] 90 1 T108 2 T98 2 T99 2
others[3] 96 1 T1 2 T15 2 T104 2
others[4] 112 1 T15 2 T108 2 T98 2
others[5] 96 1 T15 4 T104 2 T97 2
others[6] 88 1 T14 2 T131 2 T249 4
others[7] 126 1 T97 2 T381 2 T131 4
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 42 1 T96 2 T384 2 T249 2
others[1] 30 1 T15 2 T92 2 T338 2
others[2] 24 1 T104 2 T131 2 T241 2
others[3] 28 1 T15 2 T385 2 T386 2
others[4] 36 1 T15 2 T131 2 T116 4
others[5] 26 1 T5 2 T338 4 T351 2
others[6] 40 1 T15 2 T213 4 T116 2
others[7] 62 1 T1 2 T14 2 T386 4
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T15 2 T97 2 T249 4
others[1] 92 1 T96 2 T131 4 T382 2
others[2] 108 1 T14 4 T15 8 T62 2
others[3] 86 1 T98 2 T99 2 T131 4
others[4] 92 1 T15 6 T98 2 T384 2
others[5] 92 1 T14 2 T15 4 T91 2
others[6] 80 1 T15 4 T98 4 T116 4
others[7] 90 1 T381 2 T131 2 T241 2
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 116 1 T15 4 T98 2 T381 2
others[1] 92 1 T1 2 T97 2 T131 4
others[2] 100 1 T15 2 T210 2 T131 2
others[3] 68 1 T5 2 T97 2 T131 2
others[4] 94 1 T15 2 T107 2 T97 2
others[5] 108 1 T1 2 T15 2 T108 2
others[6] 78 1 T104 2 T95 2 T98 2
others[7] 92 1 T14 2 T104 2 T242 2
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T131 4 T382 2 T116 8
others[1] 72 1 T15 2 T131 2 T249 2
others[2] 84 1 T1 2 T62 2 T108 2
others[3] 96 1 T5 2 T99 2 T210 2
others[4] 72 1 T91 2 T101 2 T131 2
others[5] 64 1 T62 2 T105 2 T97 2
others[6] 76 1 T131 4 T382 4 T241 2
others[7] 88 1 T15 4 T95 4 T108 2
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T62 2 T107 2 T131 2
others[1] 86 1 T15 2 T107 2 T210 2
others[2] 80 1 T62 2 T91 2 T131 4
others[3] 94 1 T99 2 T213 2 T131 2
others[4] 96 1 T15 2 T104 2 T98 2
others[5] 90 1 T15 2 T91 2 T97 2
others[6] 112 1 T15 2 T104 2 T95 4
others[7] 98 1 T1 2 T104 2 T212 2
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T104 2 T95 4 T99 2
others[1] 106 1 T92 2 T98 2 T131 2
others[2] 80 1 T62 2 T97 2 T101 2
others[3] 72 1 T104 2 T107 2 T98 2
others[4] 86 1 T101 2 T213 2 T382 2
others[5] 92 1 T15 2 T107 2 T213 2
others[6] 92 1 T14 2 T15 2 T98 4
others[7] 122 1 T15 2 T131 6 T249 2
false 14276 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 33 1 T7 1 T31 1 T345 1
others[1] 36 1 T4 1 T7 1 T158 1
others[2] 26 1 T4 1 T7 1 T16 1
others[3] 32 1 T7 1 T345 2 T138 1
others[4] 24 1 T31 1 T354 1 T387 2
others[5] 34 1 T23 1 T16 1 T158 2
others[6] 34 1 T158 1 T381 2 T354 1
others[7] 36 1 T23 1 T31 1 T158 2
false 14276 1 T1 18 T2 3 T3 4
true 2322 1 T1 4 T4 8 T5 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T158 1 T277 1 T116 2
others[1] 35 1 T4 1 T31 2 T345 2
others[2] 42 1 T7 1 T388 2 T138 1
others[3] 32 1 T23 1 T16 1 T354 1
others[4] 23 1 T277 2 T281 1 T139 1
others[5] 29 1 T4 1 T7 1 T23 1
others[6] 26 1 T7 2 T16 1 T158 1
others[7] 39 1 T31 1 T158 2 T382 2
false 11604 1 T1 15 T2 3 T3 2
true 19013 1 T1 22 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T14 2 T95 2 T108 2
others[1] 102 1 T111 2 T95 2 T107 2
others[2] 108 1 T15 2 T62 2 T107 2
others[3] 106 1 T97 2 T99 2 T213 2
others[4] 92 1 T15 2 T62 2 T99 2
others[5] 108 1 T5 2 T15 2 T107 2
others[6] 102 1 T1 2 T96 2 T108 2
others[7] 100 1 T96 2 T98 2 T131 2
false 7842 1 T1 12 T2 3 T3 2
true 16800 1 T1 18 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T15 2 T62 2 T264 2
others[1] 78 1 T15 4 T92 2 T101 2
others[2] 78 1 T131 2 T249 2 T116 12
others[3] 100 1 T92 2 T107 2 T98 2
others[4] 100 1 T1 2 T104 2 T106 2
others[5] 74 1 T92 2 T95 2 T381 2
others[6] 110 1 T5 4 T15 2 T104 2
others[7] 104 1 T1 2 T15 2 T91 2
false 7046 1 T1 1 T2 3 T3 1
true 16592 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T15 2 T92 2 T95 2
others[1] 106 1 T96 2 T381 2 T213 2
others[2] 62 1 T15 2 T98 2 T210 2
others[3] 86 1 T107 2 T210 2 T266 2
others[4] 108 1 T1 2 T15 4 T98 2
others[5] 72 1 T96 2 T97 2 T99 4
others[6] 100 1 T5 2 T14 2 T15 2
others[7] 116 1 T15 2 T210 2 T101 2
false 7423 1 T1 9 T2 3 T3 1
true 16611 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T4 1 T16 2 T31 1
others[1] 30 1 T4 1 T7 1 T12 2
others[2] 27 1 T12 2 T31 2 T277 2
others[3] 37 1 T5 2 T16 1 T31 2
others[4] 38 1 T158 1 T279 3 T292 1
others[5] 33 1 T4 1 T23 1 T31 1
others[6] 28 1 T4 1 T31 2 T96 2
others[7] 27 1 T7 1 T345 1 T355 1
false 11544 1 T1 15 T2 3 T3 2
true 18972 1 T1 21 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T107 2 T97 2 T98 2
others[1] 50 1 T210 2 T211 2 T382 2
others[2] 64 1 T107 2 T108 2 T101 2
others[3] 52 1 T107 2 T108 2 T99 2
others[4] 62 1 T131 2 T264 2 T259 2
others[5] 54 1 T131 4 T266 2 T116 2
others[6] 60 1 T95 2 T107 2 T98 2
others[7] 62 1 T95 2 T389 2 T338 4
false 9086 1 T1 15 T2 3 T3 2
true 16804 1 T1 18 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 30 1 T4 1 T12 1 T31 1
others[1] 25 1 T7 1 T16 1 T31 3
others[2] 31 1 T4 1 T16 1 T31 1
others[3] 29 1 T7 2 T31 1 T158 1
others[4] 31 1 T12 1 T31 1 T158 1
others[5] 21 1 T4 1 T23 1 T31 1
others[6] 35 1 T4 1 T12 1 T16 1
others[7] 28 1 T4 1 T16 1 T31 1
false 11493 1 T1 15 T2 3 T3 2
true 18906 1 T1 21 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T15 4 T104 2 T98 2
others[1] 102 1 T14 2 T97 2 T131 2
others[2] 104 1 T1 2 T108 2 T99 2
others[3] 84 1 T15 2 T104 2 T99 2
others[4] 110 1 T15 4 T95 2 T98 2
others[5] 112 1 T91 2 T97 2 T382 2
others[6] 104 1 T108 2 T97 2 T98 2
others[7] 78 1 T15 4 T95 2 T131 2
false 7782 1 T1 6 T2 3 T3 2
true 16740 1 T1 18 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T4 1 T6 1 T15 2
others[1] 42 1 T4 1 T16 2 T31 1
others[2] 35 1 T16 2 T164 1 T382 2
others[3] 37 1 T4 2 T16 1 T73 1
others[4] 31 1 T31 1 T158 1 T73 1
others[5] 30 1 T4 1 T345 1 T277 2
others[6] 31 1 T4 1 T7 1 T16 1
others[7] 28 1 T7 2 T16 2 T31 1
false 11454 1 T1 15 T2 3 T3 2
true 18919 1 T1 20 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T15 2 T104 2 T96 2
others[1] 42 1 T15 2 T131 2 T266 2
others[2] 24 1 T116 2 T390 2 T351 2
others[3] 36 1 T92 2 T116 2 T338 2
others[4] 24 1 T5 2 T15 2 T131 2
others[5] 36 1 T213 4 T384 2 T385 2
others[6] 38 1 T1 2 T14 2 T116 2
others[7] 50 1 T15 2 T249 2 T385 2
false 9862 1 T1 6 T2 3 T3 2
true 16782 1 T1 18 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T131 4 T384 2 T266 2
others[1] 92 1 T14 2 T15 4 T97 2
others[2] 102 1 T14 2 T15 2 T97 2
others[3] 98 1 T15 4 T382 4 T389 2
others[4] 78 1 T14 2 T98 2 T249 4
others[5] 80 1 T15 2 T91 2 T96 2
others[6] 90 1 T15 6 T62 2 T381 2
others[7] 100 1 T15 6 T241 2 T116 4
false 7109 1 T1 4 T2 2 T3 1
true 16589 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 110 1 T1 2 T391 2 T131 2
others[1] 80 1 T15 2 T97 2 T98 2
others[2] 82 1 T5 2 T15 4 T95 2
others[3] 94 1 T107 2 T108 2 T97 2
others[4] 100 1 T1 2 T104 2 T131 6
others[5] 80 1 T98 2 T210 2 T100 2
others[6] 104 1 T15 2 T97 2 T213 2
others[7] 98 1 T14 2 T15 2 T104 2
false 7109 1 T1 4 T2 2 T3 1
true 16589 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T62 2 T131 4 T387 2
others[1] 70 1 T5 2 T91 2 T108 2
others[2] 76 1 T210 2 T213 2 T131 4
others[3] 58 1 T97 2 T264 2 T266 2
others[4] 80 1 T62 2 T95 2 T165 2
others[5] 96 1 T105 2 T108 2 T99 4
others[6] 70 1 T1 2 T15 2 T95 2
others[7] 116 1 T15 4 T97 2 T212 2
false 6458 1 T1 1 T2 2 T3 1
true 16568 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T107 4 T131 4 T389 2
others[1] 76 1 T104 2 T91 4 T97 2
others[2] 80 1 T62 2 T131 2 T249 2
others[3] 100 1 T104 2 T381 4 T131 2
others[4] 96 1 T15 2 T99 2 T131 4
others[5] 94 1 T62 2 T95 2 T97 2
others[6] 88 1 T1 2 T15 2 T104 2
others[7] 116 1 T15 4 T95 2 T108 2
false 6458 1 T1 1 T2 2 T3 1
true 16568 1 T1 18 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T15 2 T95 2 T98 2
others[1] 42 1 T264 2 T116 4 T338 2
others[2] 60 1 T107 2 T108 2 T213 2
others[3] 72 1 T15 2 T107 2 T98 2
others[4] 44 1 T15 2 T391 2 T266 4
others[5] 56 1 T15 2 T210 2 T213 2
others[6] 58 1 T131 2 T266 2 T116 2
others[7] 76 1 T15 2 T104 2 T107 2
false 6975 1 T1 4 T2 2 T3 1
true 17955 1 T1 20 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 56 1 T101 2 T387 2 T392 2
others[1] 58 1 T15 2 T210 2 T212 2
others[2] 70 1 T104 2 T387 2 T116 4
others[3] 64 1 T14 2 T15 2 T101 2
others[4] 62 1 T99 2 T266 2 T338 2
others[5] 68 1 T95 2 T213 2 T116 4
others[6] 72 1 T1 2 T131 2 T266 2
others[7] 84 1 T14 2 T95 2 T101 2
false 6975 1 T1 4 T2 2 T3 1
true 17955 1 T1 20 T2 3 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 30 1 T6 1 T148 1 T73 1
others[1] 25 1 T23 1 T12 1 T31 1
others[2] 35 1 T6 1 T16 1 T31 2
others[3] 26 1 T7 1 T31 1 T158 1
others[4] 29 1 T92 2 T73 2 T345 1
others[5] 27 1 T15 2 T12 1 T345 1
others[6] 26 1 T7 1 T16 1 T31 1
others[7] 35 1 T4 1 T16 1 T31 1
false 11681 1 T1 15 T2 3 T3 2
true 19105 1 T1 21 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 64 1 T241 2 T249 2 T383 2
others[1] 110 1 T101 2 T213 2 T382 2
others[2] 82 1 T104 2 T95 2 T107 2
others[3] 100 1 T14 2 T92 2 T99 2
others[4] 98 1 T15 6 T95 2 T387 2
others[5] 82 1 T62 2 T101 2 T131 8
others[6] 76 1 T107 2 T97 2 T98 2
others[7] 118 1 T104 2 T98 4 T212 2
false 7786 1 T1 12 T2 3 T3 2
true 16774 1 T1 18 T2 3 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 35 1 T4 1 T7 1 T16 1
others[1] 27 1 T4 1 T31 1 T73 1
others[2] 24 1 T23 1 T31 1 T345 1
others[3] 42 1 T12 3 T16 1 T158 1
others[4] 31 1 T4 2 T7 1 T12 1
others[5] 25 1 T5 2 T31 3 T345 1
others[6] 24 1 T31 1 T158 2 T345 1
others[7] 41 1 T31 2 T73 2 T249 2
false 14276 1 T1 18 T2 3 T3 4
true 2313 1 T1 3 T4 8 T5 4

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%