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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 9999 1 T1 9 T2 1 T3 11
true 16345 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10904 1 T1 9 T2 1 T3 11
true 16402 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T94 2 T65 2 T96 2
others[1] 76 1 T8 4 T96 2 T194 2
others[2] 64 1 T8 2 T361 4 T140 2
others[3] 98 1 T101 2 T64 2 T96 2
others[4] 80 1 T8 2 T64 2 T99 2
others[5] 96 1 T8 4 T96 2 T195 2
others[6] 78 1 T34 4 T64 4 T99 2
others[7] 108 1 T8 6 T101 2 T64 2
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T8 2 T96 2 T99 2
others[1] 92 1 T34 2 T64 2 T96 4
others[2] 94 1 T8 2 T50 2 T34 2
others[3] 80 1 T8 4 T94 2 T64 2
others[4] 72 1 T134 2 T325 2 T116 4
others[5] 104 1 T64 2 T194 2 T196 2
others[6] 118 1 T34 2 T64 2 T102 2
others[7] 106 1 T3 2 T64 2 T96 2
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T8 2 T64 2 T99 2
others[1] 86 1 T65 2 T96 4 T99 2
others[2] 84 1 T3 2 T8 2 T34 2
others[3] 84 1 T1 2 T8 2 T50 2
others[4] 74 1 T64 4 T194 2 T134 2
others[5] 76 1 T101 4 T64 2 T96 2
others[6] 90 1 T8 2 T64 2 T102 2
others[7] 98 1 T3 2 T192 2 T102 2
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T96 2 T134 2 T124 2
others[1] 50 1 T102 2 T193 2 T116 2
others[2] 56 1 T102 2 T89 2 T362 2
others[3] 62 1 T65 2 T96 2 T51 2
others[4] 58 1 T325 2 T363 2 T35 2
others[5] 42 1 T97 2 T194 2 T196 2
others[6] 46 1 T8 2 T96 2 T193 2
others[7] 68 1 T96 4 T325 4 T363 2
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T95 2 T101 2 T96 2
others[1] 84 1 T8 2 T64 4 T194 2
others[2] 92 1 T65 4 T192 2 T193 4
others[3] 96 1 T8 4 T64 4 T364 2
others[4] 90 1 T8 4 T34 2 T101 6
others[5] 96 1 T8 2 T50 4 T64 2
others[6] 74 1 T8 2 T50 2 T94 2
others[7] 100 1 T8 2 T94 2 T64 2
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 50 1 T8 4 T64 6 T96 2
others[1] 34 1 T34 2 T64 6 T99 4
others[2] 36 1 T50 2 T64 2 T102 2
others[3] 56 1 T95 2 T64 2 T192 2
others[4] 36 1 T64 4 T365 2 T124 2
others[5] 44 1 T282 2 T134 2 T116 4
others[6] 46 1 T34 2 T64 2 T102 2
others[7] 46 1 T8 2 T140 4 T153 4
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T3 2 T8 4 T34 2
others[1] 82 1 T98 2 T102 2 T365 2
others[2] 84 1 T8 2 T96 4 T193 2
others[3] 82 1 T64 2 T99 2 T325 2
others[4] 88 1 T34 2 T64 2 T65 2
others[5] 86 1 T95 2 T65 2 T96 2
others[6] 86 1 T1 2 T64 4 T96 2
others[7] 98 1 T8 2 T95 4 T96 2
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 70 1 T64 6 T96 2 T102 2
others[1] 86 1 T50 2 T65 2 T96 4
others[2] 88 1 T50 2 T64 2 T96 2
others[3] 64 1 T101 2 T64 2 T282 2
others[4] 78 1 T64 2 T134 2 T43 2
others[5] 68 1 T8 2 T34 2 T194 2
others[6] 112 1 T3 2 T8 6 T34 2
others[7] 126 1 T8 2 T50 2 T101 2
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T64 2 T65 2 T99 4
others[1] 104 1 T8 2 T96 2 T89 2
others[2] 88 1 T3 2 T94 2 T95 2
others[3] 68 1 T64 4 T51 2 T366 2
others[4] 98 1 T8 2 T64 2 T65 6
others[5] 66 1 T8 2 T94 2 T64 2
others[6] 92 1 T8 6 T34 2 T64 2
others[7] 108 1 T8 2 T94 2 T34 2
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T134 2 T364 2 T325 2
others[1] 88 1 T3 2 T8 2 T34 2
others[2] 94 1 T101 2 T99 2 T195 2
others[3] 70 1 T8 2 T34 2 T96 2
others[4] 76 1 T3 2 T96 2 T98 2
others[5] 76 1 T94 2 T64 2 T194 2
others[6] 82 1 T8 2 T102 2 T194 2
others[7] 90 1 T3 2 T8 2 T89 2
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T196 4 T365 2 T124 4
others[1] 80 1 T101 2 T159 2 T99 2
others[2] 74 1 T8 2 T94 2 T64 2
others[3] 88 1 T64 4 T65 2 T96 2
others[4] 86 1 T8 2 T34 4 T64 2
others[5] 86 1 T50 2 T64 4 T96 4
others[6] 102 1 T8 6 T89 2 T282 2
others[7] 138 1 T96 2 T102 2 T362 2
false 13979 1 T1 10 T2 4 T3 16


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 32 1 T12 1 T15 1 T254 1
others[1] 36 1 T64 2 T15 1 T217 1
others[2] 45 1 T6 1 T89 2 T16 1
others[3] 39 1 T15 1 T102 2 T123 1
others[4] 28 1 T15 1 T217 1 T137 1
others[5] 40 1 T6 2 T217 1 T123 1
others[6] 33 1 T13 2 T367 2 T89 2
others[7] 39 1 T6 1 T13 1 T15 1
false 13979 1 T1 10 T2 4 T3 16
true 2276 1 T1 2 T3 5 T5 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T6 1 T13 2 T15 1
others[1] 28 1 T217 1 T367 2 T203 2
others[2] 30 1 T89 2 T368 2 T116 2
others[3] 41 1 T6 1 T12 1 T217 2
others[4] 37 1 T6 1 T217 1 T123 1
others[5] 43 1 T64 2 T13 1 T15 1
others[6] 33 1 T6 1 T135 1 T17 1
others[7] 42 1 T15 3 T254 1 T17 1
false 11356 1 T1 9 T2 1 T3 12
true 18639 1 T1 12 T2 4 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 68 1 T65 2 T102 2 T69 2
others[1] 90 1 T8 2 T34 2 T64 4
others[2] 64 1 T101 4 T282 4 T364 4
others[3] 92 1 T34 2 T96 2 T99 2
others[4] 78 1 T8 4 T64 4 T96 2
others[5] 100 1 T8 2 T94 2 T192 2
others[6] 96 1 T8 8 T96 4 T99 2
others[7] 94 1 T8 2 T64 2 T96 2
false 7746 1 T1 2 T2 1 T3 12
true 16459 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T8 2 T64 2 T194 2
others[1] 96 1 T94 2 T34 2 T65 2
others[2] 62 1 T194 2 T328 2 T89 2
others[3] 110 1 T3 2 T64 2 T96 4
others[4] 96 1 T64 4 T96 2 T99 2
others[5] 102 1 T8 4 T102 4 T193 2
others[6] 110 1 T8 2 T34 2 T194 2
others[7] 82 1 T50 2 T34 2 T64 2
false 6837 1 T1 2 T2 1 T3 3
true 16221 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T1 2 T64 2 T96 2
others[1] 60 1 T34 2 T96 2 T89 2
others[2] 90 1 T8 4 T64 2 T96 2
others[3] 96 1 T3 2 T94 2 T99 2
others[4] 78 1 T3 2 T8 2 T101 2
others[5] 112 1 T101 2 T64 6 T65 2
others[6] 82 1 T8 2 T96 4 T192 2
others[7] 70 1 T50 2 T101 2 T102 2
false 7357 1 T1 2 T2 1 T3 3
true 16248 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 34 1 T193 2 T123 1 T135 1
others[1] 26 1 T123 2 T135 1 T116 2
others[2] 36 1 T15 1 T134 2 T123 1
others[3] 23 1 T6 2 T368 1 T369 1
others[4] 30 1 T6 1 T15 1 T217 1
others[5] 25 1 T100 2 T15 1 T123 1
others[6] 28 1 T6 2 T254 1 T239 1
others[7] 35 1 T135 2 T370 1 T17 1
false 11283 1 T1 9 T2 1 T3 12
true 18564 1 T1 12 T2 4 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 56 1 T51 2 T134 2 T362 2
others[1] 56 1 T196 2 T363 2 T35 2
others[2] 52 1 T96 4 T102 2 T193 2
others[3] 36 1 T325 2 T116 2 T371 2
others[4] 54 1 T96 2 T102 2 T325 2
others[5] 52 1 T65 2 T193 2 T89 2
others[6] 60 1 T96 4 T325 4 T35 2
others[7] 62 1 T8 2 T97 2 T51 2
false 9096 1 T1 9 T2 1 T3 12
true 16454 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 41 1 T16 1 T123 2 T254 2
others[1] 39 1 T15 1 T217 2 T16 1
others[2] 31 1 T15 1 T102 2 T123 1
others[3] 25 1 T6 1 T12 1 T15 1
others[4] 27 1 T96 2 T13 1 T370 1
others[5] 24 1 T6 1 T13 1 T217 1
others[6] 27 1 T13 1 T370 1 T372 2
others[7] 41 1 T100 2 T74 2 T15 1
false 11226 1 T1 9 T2 1 T3 12
true 18552 1 T1 12 T2 4 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T95 2 T64 2 T364 2
others[1] 88 1 T8 4 T64 4 T192 2
others[2] 100 1 T50 2 T64 4 T102 2
others[3] 90 1 T94 2 T65 2 T195 2
others[4] 54 1 T8 6 T101 4 T176 2
others[5] 68 1 T8 2 T34 2 T101 2
others[6] 94 1 T8 2 T50 2 T101 2
others[7] 146 1 T8 2 T50 2 T94 2
false 7641 1 T1 9 T2 1 T3 12
true 16372 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 33 1 T64 2 T123 1 T254 1
others[1] 42 1 T100 2 T15 1 T123 1
others[2] 24 1 T123 2 T146 1 T373 1
others[3] 27 1 T13 1 T15 1 T123 1
others[4] 28 1 T367 2 T137 2 T368 1
others[5] 26 1 T6 1 T123 1 T17 1
others[6] 40 1 T6 2 T135 1 T239 2
others[7] 39 1 T13 1 T15 1 T123 1
false 11186 1 T1 9 T2 1 T3 12
true 18501 1 T1 12 T2 4 T3 23


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 36 1 T282 2 T134 2 T365 2
others[1] 36 1 T50 2 T34 2 T134 6
others[2] 54 1 T8 4 T64 4 T96 2
others[3] 48 1 T64 4 T124 8 T116 2
others[4] 26 1 T8 2 T64 4 T102 2
others[5] 46 1 T34 2 T95 2 T374 2
others[6] 52 1 T64 4 T192 2 T99 4
others[7] 50 1 T64 6 T195 2 T134 2
false 9510 1 T1 2 T2 1 T3 12
true 16396 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T65 2 T193 4 T89 2
others[1] 90 1 T3 2 T34 4 T64 2
others[2] 70 1 T8 2 T365 2 T375 2
others[3] 114 1 T95 2 T64 4 T96 4
others[4] 76 1 T1 2 T8 2 T64 2
others[5] 88 1 T95 2 T96 4 T102 2
others[6] 88 1 T8 4 T64 2 T65 2
others[7] 102 1 T95 2 T64 2 T96 4
false 6956 1 T1 6 T2 1 T3 3
true 16214 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T3 2 T8 2 T64 4
others[1] 70 1 T64 2 T365 2 T366 2
others[2] 102 1 T50 2 T34 2 T96 4
others[3] 72 1 T34 2 T64 2 T96 2
others[4] 86 1 T8 4 T101 4 T65 2
others[5] 70 1 T101 2 T134 4 T116 8
others[6] 94 1 T8 2 T50 2 T64 6
others[7] 114 1 T8 2 T50 2 T96 2
false 6956 1 T1 6 T2 1 T3 3
true 16214 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T64 2 T96 2 T99 2
others[1] 66 1 T95 2 T64 2 T65 2
others[2] 96 1 T8 2 T64 2 T97 2
others[3] 104 1 T8 8 T94 2 T34 2
others[4] 76 1 T95 2 T65 2 T96 2
others[5] 62 1 T64 2 T96 2 T71 2
others[6] 102 1 T3 2 T94 2 T34 2
others[7] 108 1 T8 4 T94 2 T64 4
false 6378 1 T1 4 T2 1 T3 2
true 16218 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T3 2 T8 2 T99 2
others[1] 84 1 T3 2 T8 2 T193 2
others[2] 88 1 T8 2 T34 2 T194 2
others[3] 64 1 T3 2 T94 2 T193 2
others[4] 66 1 T8 2 T98 2 T102 4
others[5] 64 1 T101 2 T64 2 T194 2
others[6] 104 1 T101 2 T96 4 T102 2
others[7] 108 1 T34 2 T102 2 T89 4
false 6378 1 T1 4 T2 1 T3 2
true 16218 1 T1 10 T2 4 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 50 1 T376 2 T377 2 T378 2
others[1] 52 1 T193 2 T35 2 T379 2
others[2] 66 1 T193 2 T380 2 T379 2
others[3] 58 1 T64 4 T96 2 T365 2
others[4] 40 1 T8 2 T51 2 T376 2
others[5] 50 1 T64 2 T65 4 T96 2
others[6] 72 1 T34 2 T64 2 T96 2
others[7] 70 1 T8 2 T116 2 T381 2
false 6826 1 T1 3 T2 1 T3 6
true 17553 1 T1 12 T2 4 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 56 1 T3 2 T34 2 T96 4
others[1] 54 1 T8 2 T64 2 T102 2
others[2] 66 1 T8 2 T96 4 T282 2
others[3] 52 1 T193 2 T282 2 T196 2
others[4] 60 1 T51 2 T382 2 T116 2
others[5] 58 1 T116 6 T381 2 T361 2
others[6] 64 1 T8 2 T96 4 T43 2
others[7] 54 1 T325 2 T116 2 T383 2
false 6826 1 T1 3 T2 1 T3 6
true 17553 1 T1 12 T2 4 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 41 1 T13 1 T15 1 T217 1
others[1] 34 1 T217 1 T254 1 T370 1
others[2] 24 1 T254 1 T368 1 T369 1
others[3] 38 1 T195 2 T254 1 T239 2
others[4] 35 1 T13 1 T370 1 T375 2
others[5] 41 1 T6 1 T217 1 T17 2
others[6] 48 1 T6 1 T15 1 T217 1
others[7] 26 1 T12 1 T123 1 T370 1
false 11436 1 T1 9 T2 2 T3 12
true 18689 1 T1 12 T2 5 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T8 2 T64 2 T96 2
others[1] 92 1 T50 2 T94 2 T64 2
others[2] 72 1 T34 2 T196 2 T325 2
others[3] 90 1 T64 2 T65 2 T98 2
others[4] 94 1 T8 2 T34 2 T96 4
others[5] 88 1 T8 2 T101 2 T64 2
others[6] 88 1 T8 2 T64 2 T282 2
others[7] 114 1 T8 2 T64 2 T159 2
false 7701 1 T1 6 T2 2 T3 12
true 16413 1 T1 10 T2 5 T3 17


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 27 1 T15 1 T123 1 T368 1
others[1] 15 1 T374 2 T384 2 T118 1
others[2] 41 1 T6 1 T123 2 T135 1
others[3] 36 1 T6 1 T15 1 T123 1
others[4] 21 1 T370 1 T372 2 T17 1
others[5] 41 1 T100 2 T6 2 T217 1
others[6] 30 1 T6 1 T15 1 T193 2
others[7] 27 1 T135 1 T239 1 T369 1
false 13979 1 T1 10 T2 4 T3 16
true 2262 1 T1 2 T3 6 T4 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%