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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 9964 1 T1 2 T2 16 T3 7
true 16371 1 T1 4 T2 27 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10851 1 T1 3 T2 17 T3 8
true 16426 1 T1 4 T2 27 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T10 2 T67 6 T86 2
others[1] 82 1 T67 4 T86 2 T99 2
others[2] 60 1 T4 2 T67 2 T118 2
others[3] 86 1 T10 2 T101 2 T99 4
others[4] 68 1 T37 2 T67 4 T229 2
others[5] 94 1 T67 2 T118 4 T321 2
others[6] 92 1 T118 2 T202 2 T351 2
others[7] 86 1 T97 2 T118 2 T352 2
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T2 2 T4 2 T86 2
others[1] 84 1 T10 2 T67 2 T100 2
others[2] 82 1 T36 2 T98 2 T99 2
others[3] 72 1 T4 2 T67 2 T118 10
others[4] 76 1 T10 2 T101 2 T99 6
others[5] 94 1 T70 2 T101 2 T97 2
others[6] 114 1 T10 2 T4 4 T67 4
others[7] 112 1 T36 2 T67 2 T97 2
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T4 2 T66 2 T101 2
others[1] 98 1 T86 2 T101 2 T118 4
others[2] 98 1 T36 2 T86 2 T99 2
others[3] 84 1 T10 2 T67 2 T99 2
others[4] 86 1 T36 4 T97 2 T98 2
others[5] 84 1 T102 4 T352 2 T321 4
others[6] 98 1 T10 4 T67 2 T98 2
others[7] 88 1 T4 2 T37 2 T99 2
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 48 1 T118 2 T321 2 T171 2
others[1] 50 1 T4 2 T67 2 T321 2
others[2] 52 1 T67 6 T99 2 T118 2
others[3] 64 1 T67 6 T97 2 T353 2
others[4] 68 1 T102 2 T99 2 T118 4
others[5] 50 1 T10 2 T36 2 T67 2
others[6] 58 1 T10 4 T66 2 T67 4
others[7] 86 1 T4 2 T118 4 T260 2
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T101 2 T97 2 T354 2
others[1] 78 1 T9 2 T4 2 T67 2
others[2] 62 1 T67 2 T321 2 T265 2
others[3] 86 1 T4 2 T67 2 T97 4
others[4] 86 1 T67 2 T98 2 T99 2
others[5] 80 1 T99 2 T118 2 T355 2
others[6] 86 1 T4 2 T118 4 T353 2
others[7] 96 1 T4 2 T67 2 T102 4
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T99 2 T201 4 T356 2
others[1] 36 1 T321 2 T357 2 T358 2
others[2] 42 1 T67 2 T98 2 T99 2
others[3] 40 1 T200 2 T352 2 T321 2
others[4] 28 1 T4 2 T201 2 T359 2
others[5] 22 1 T99 2 T360 2 T361 2
others[6] 28 1 T118 2 T362 2 T363 2
others[7] 38 1 T9 2 T4 2 T99 2
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T4 2 T36 2 T67 2
others[1] 82 1 T10 2 T66 2 T200 2
others[2] 66 1 T67 4 T97 2 T99 2
others[3] 84 1 T99 2 T100 2 T118 2
others[4] 74 1 T67 2 T99 2 T355 2
others[5] 84 1 T4 2 T36 2 T67 4
others[6] 92 1 T37 2 T99 6 T118 4
others[7] 84 1 T10 2 T36 2 T66 2
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 110 1 T36 2 T98 2 T102 2
others[1] 94 1 T10 2 T67 4 T100 2
others[2] 92 1 T67 6 T99 4 T118 2
others[3] 88 1 T66 2 T67 2 T97 2
others[4] 68 1 T67 2 T98 2 T321 2
others[5] 66 1 T102 4 T118 4 T204 2
others[6] 106 1 T4 2 T66 2 T67 4
others[7] 112 1 T86 2 T97 2 T99 6
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T101 2 T99 2 T201 2
others[1] 70 1 T67 2 T97 2 T118 4
others[2] 112 1 T37 2 T67 4 T97 2
others[3] 98 1 T36 2 T66 2 T67 2
others[4] 82 1 T66 2 T98 4 T200 2
others[5] 94 1 T70 2 T67 4 T99 2
others[6] 108 1 T4 2 T66 2 T101 2
others[7] 110 1 T66 2 T67 2 T86 2
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T4 2 T66 2 T67 4
others[1] 84 1 T4 2 T70 2 T100 2
others[2] 82 1 T67 2 T98 2 T118 4
others[3] 120 1 T9 2 T4 4 T67 2
others[4] 82 1 T36 4 T97 2 T118 8
others[5] 96 1 T67 4 T98 2 T118 6
others[6] 64 1 T67 2 T97 2 T99 2
others[7] 120 1 T36 2 T67 4 T99 8
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T4 2 T67 2 T118 4
others[1] 72 1 T10 2 T4 2 T100 2
others[2] 88 1 T4 2 T67 6 T99 4
others[3] 88 1 T10 2 T37 2 T98 2
others[4] 86 1 T10 4 T4 2 T67 2
others[5] 66 1 T264 2 T228 2 T112 2
others[6] 96 1 T4 2 T36 4 T66 2
others[7] 126 1 T4 2 T67 4 T100 2
false 13955 1 T1 4 T2 21 T3 8


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 40 1 T4 2 T265 2 T312 2
others[1] 29 1 T66 2 T105 1 T16 1
others[2] 22 1 T105 1 T257 1 T312 1
others[3] 21 1 T105 1 T215 2 T35 1
others[4] 25 1 T14 1 T105 1 T16 1
others[5] 20 1 T13 1 T217 1 T127 2
others[6] 27 1 T35 1 T217 1 T231 2
others[7] 27 1 T14 2 T223 1 T263 1
false 13955 1 T1 4 T2 21 T3 8
true 2169 1 T2 4 T3 1 T7 1


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 35 1 T105 2 T16 1 T257 1
others[1] 27 1 T14 1 T235 1 T263 1
others[2] 29 1 T66 2 T364 1 T319 1
others[3] 20 1 T14 1 T105 1 T215 2
others[4] 22 1 T13 1 T312 2 T365 2
others[5] 17 1 T35 1 T223 1 T235 1
others[6] 30 1 T4 2 T14 1 T105 1
others[7] 31 1 T16 1 T217 1 T268 1
false 11307 1 T1 3 T2 18 T3 8
true 18525 1 T1 4 T2 31 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T10 2 T202 2 T355 2
others[1] 80 1 T67 2 T100 2 T321 2
others[2] 88 1 T67 2 T99 2 T321 2
others[3] 78 1 T4 2 T67 6 T118 2
others[4] 74 1 T101 2 T99 4 T118 2
others[5] 86 1 T37 2 T67 2 T86 2
others[6] 76 1 T10 2 T67 2 T118 4
others[7] 98 1 T67 4 T86 2 T99 2
false 7723 1 T1 3 T2 18 T3 8
true 16466 1 T1 4 T2 27 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T10 2 T4 2 T99 6
others[1] 94 1 T10 2 T4 2 T86 2
others[2] 78 1 T99 2 T100 2 T118 4
others[3] 84 1 T67 2 T102 2 T118 2
others[4] 104 1 T10 2 T70 2 T67 2
others[5] 96 1 T4 2 T67 2 T102 2
others[6] 76 1 T2 2 T36 4 T67 4
others[7] 122 1 T4 2 T101 4 T97 4
false 6767 1 T1 1 T2 5 T3 7
true 16252 1 T1 4 T2 24 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T36 2 T101 2 T118 2
others[1] 92 1 T36 2 T67 2 T354 2
others[2] 88 1 T36 2 T37 2 T97 2
others[3] 96 1 T10 2 T98 2 T99 2
others[4] 94 1 T10 4 T101 2 T102 2
others[5] 88 1 T102 2 T99 2 T118 2
others[6] 98 1 T66 2 T86 2 T99 2
others[7] 86 1 T4 4 T67 2 T86 2
false 7250 1 T1 3 T2 6 T3 8
true 16264 1 T1 4 T2 24 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 30 1 T13 1 T256 1 T126 1
others[1] 21 1 T105 1 T312 2 T113 1
others[2] 38 1 T13 1 T99 2 T223 1
others[3] 17 1 T13 1 T16 1 T268 1
others[4] 35 1 T14 1 T118 2 T16 1
others[5] 23 1 T3 1 T16 2 T312 1
others[6] 27 1 T13 1 T102 2 T312 1
others[7] 37 1 T16 1 T263 2 T312 1
false 11259 1 T1 3 T2 18 T3 8
true 18509 1 T1 4 T2 29 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T67 2 T99 4 T118 4
others[1] 70 1 T67 4 T102 2 T118 4
others[2] 54 1 T10 4 T66 2 T67 2
others[3] 70 1 T67 4 T321 2 T366 2
others[4] 56 1 T10 2 T67 4 T97 2
others[5] 60 1 T67 4 T97 2 T188 2
others[6] 50 1 T118 2 T321 2 T367 2
others[7] 72 1 T4 4 T36 2 T101 2
false 8913 1 T1 3 T2 18 T3 8
true 16466 1 T1 4 T2 27 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 29 1 T105 1 T118 2 T320 1
others[1] 31 1 T312 2 T137 1 T313 1
others[2] 33 1 T13 1 T97 2 T105 1
others[3] 33 1 T99 2 T217 1 T364 1
others[4] 39 1 T201 2 T362 2 T35 3
others[5] 25 1 T13 1 T223 1 T263 1
others[6] 32 1 T4 2 T105 1 T118 2
others[7] 45 1 T4 2 T152 2 T100 2
false 11208 1 T1 3 T2 18 T3 8
true 18458 1 T1 4 T2 30 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T9 2 T4 4 T67 2
others[1] 76 1 T97 2 T102 4 T118 2
others[2] 84 1 T67 2 T356 2 T228 2
others[3] 64 1 T99 2 T264 2 T367 2
others[4] 68 1 T200 2 T118 2 T191 2
others[5] 84 1 T4 2 T67 2 T101 2
others[6] 92 1 T4 2 T67 4 T98 2
others[7] 94 1 T97 2 T99 2 T362 2
false 7775 1 T1 3 T2 18 T3 8
true 16405 1 T1 4 T2 27 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 23 1 T4 2 T16 1 T235 1
others[1] 23 1 T105 1 T217 1 T312 1
others[2] 41 1 T16 2 T35 1 T364 1
others[3] 37 1 T13 1 T98 2 T118 2
others[4] 22 1 T97 2 T217 1 T320 1
others[5] 32 1 T223 1 T217 1 T312 1
others[6] 20 1 T14 1 T16 1 T312 1
others[7] 29 1 T105 2 T257 1 T35 1
false 11172 1 T1 3 T2 18 T3 8
true 18404 1 T1 4 T2 30 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T362 2 T264 2 T360 2
others[1] 26 1 T98 2 T200 2 T365 2
others[2] 44 1 T4 2 T202 2 T321 2
others[3] 26 1 T201 4 T264 2 T368 2
others[4] 38 1 T99 2 T321 2 T359 2
others[5] 42 1 T67 2 T99 2 T118 2
others[6] 40 1 T4 2 T99 2 T352 2
others[7] 34 1 T9 2 T99 2 T100 2
false 9697 1 T1 3 T2 18 T3 8
true 16442 1 T1 4 T2 27 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T4 2 T37 2 T66 2
others[1] 76 1 T10 4 T4 2 T66 2
others[2] 84 1 T355 2 T321 4 T52 2
others[3] 72 1 T99 2 T118 2 T366 2
others[4] 80 1 T36 2 T67 4 T200 2
others[5] 74 1 T36 2 T67 2 T97 2
others[6] 78 1 T36 2 T97 2 T321 2
others[7] 104 1 T67 2 T99 6 T100 2
false 6972 1 T1 2 T2 8 T3 8
true 16256 1 T1 4 T2 24 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 112 1 T66 2 T67 6 T86 2
others[1] 86 1 T67 2 T102 4 T118 2
others[2] 104 1 T10 2 T67 4 T97 2
others[3] 74 1 T67 2 T102 2 T352 2
others[4] 104 1 T4 2 T36 2 T97 2
others[5] 72 1 T369 4 T351 2 T112 2
others[6] 74 1 T66 2 T67 4 T99 4
others[7] 110 1 T118 2 T352 2 T369 2
false 6972 1 T1 2 T2 8 T3 8
true 16256 1 T1 4 T2 24 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T36 2 T67 4 T98 2
others[1] 104 1 T37 2 T67 2 T97 6
others[2] 100 1 T4 2 T70 2 T67 2
others[3] 68 1 T66 2 T118 2 T321 2
others[4] 66 1 T66 2 T67 2 T101 2
others[5] 110 1 T66 2 T200 2 T118 4
others[6] 126 1 T67 2 T98 2 T99 2
others[7] 102 1 T66 2 T67 2 T101 2
false 6281 1 T1 2 T2 4 T3 7
true 16243 1 T1 4 T2 24 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T4 2 T67 2 T97 2
others[1] 96 1 T36 2 T67 2 T98 2
others[2] 86 1 T36 2 T66 2 T100 2
others[3] 98 1 T9 2 T36 2 T70 2
others[4] 80 1 T4 2 T97 2 T118 8
others[5] 102 1 T4 2 T67 4 T97 2
others[6] 68 1 T67 2 T97 2 T98 2
others[7] 120 1 T4 2 T67 4 T99 2
false 6281 1 T1 2 T2 4 T3 7
true 16243 1 T1 4 T2 24 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T37 2 T86 2 T99 6
others[1] 48 1 T36 2 T67 2 T118 2
others[2] 52 1 T36 2 T67 2 T97 2
others[3] 54 1 T97 2 T366 2 T264 2
others[4] 72 1 T10 2 T99 2 T118 4
others[5] 48 1 T36 2 T67 2 T102 2
others[6] 50 1 T99 2 T200 2 T118 2
others[7] 74 1 T36 2 T321 2 T52 2
false 6817 1 T1 2 T2 6 T3 6
true 17585 1 T1 4 T2 26 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T10 2 T102 2 T359 2
others[1] 52 1 T86 2 T118 2 T355 2
others[2] 80 1 T36 2 T66 2 T99 2
others[3] 50 1 T200 2 T118 2 T370 2
others[4] 56 1 T36 2 T66 2 T99 2
others[5] 74 1 T99 4 T100 2 T118 4
others[6] 52 1 T67 2 T102 2 T118 2
others[7] 68 1 T118 2 T321 2 T265 2
false 6817 1 T1 2 T2 6 T3 6
true 17585 1 T1 4 T2 26 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 25 1 T35 2 T217 2 T364 1
others[1] 27 1 T257 1 T215 2 T223 1
others[2] 27 1 T13 1 T35 1 T263 1
others[3] 29 1 T14 2 T35 1 T126 1
others[4] 23 1 T105 1 T16 1 T312 2
others[5] 31 1 T14 2 T105 1 T263 1
others[6] 20 1 T105 1 T257 1 T217 2
others[7] 36 1 T16 1 T202 2 T312 1
false 11392 1 T1 3 T2 18 T3 8
true 18602 1 T1 4 T2 31 T3 12


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T67 4 T97 2 T118 4
others[1] 92 1 T10 2 T36 2 T37 2
others[2] 84 1 T118 4 T362 2 T265 2
others[3] 96 1 T4 2 T67 4 T98 2
others[4] 74 1 T4 2 T99 2 T264 2
others[5] 102 1 T10 2 T4 4 T66 2
others[6] 66 1 T36 2 T200 2 T201 2
others[7] 96 1 T10 4 T4 4 T67 4
false 7687 1 T1 3 T2 18 T3 8
true 16455 1 T1 4 T2 27 T3 11


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 24 1 T16 1 T265 2 T312 1
others[1] 29 1 T13 1 T102 2 T312 1
others[2] 20 1 T13 1 T14 1 T312 1
others[3] 29 1 T118 2 T16 3 T126 1
others[4] 43 1 T13 1 T105 1 T99 2
others[5] 30 1 T3 1 T13 1 T256 1
others[6] 25 1 T312 2 T367 2 T319 1
others[7] 27 1 T16 1 T235 1 T263 1
false 13955 1 T1 4 T2 21 T3 8
true 2192 1 T2 2 T3 1 T7 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%