dashboard | hierarchy | modlist | groups | tests | asserts

Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10242 1 T1 1 T2 13 T3 2
true 16710 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11099 1 T1 2 T2 15 T3 2
true 16763 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T2 2 T26 2 T63 2
others[1] 92 1 T10 4 T97 2 T104 4
others[2] 110 1 T10 4 T62 2 T93 2
others[3] 72 1 T2 2 T14 2 T209 2
others[4] 78 1 T2 2 T94 2 T96 2
others[5] 116 1 T10 4 T68 2 T210 4
others[6] 88 1 T93 2 T95 2 T104 2
others[7] 102 1 T92 2 T176 2 T209 2
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T10 2 T92 2 T14 2
others[1] 106 1 T26 2 T94 2 T95 2
others[2] 102 1 T10 2 T62 2 T63 2
others[3] 82 1 T10 4 T14 2 T87 2
others[4] 94 1 T95 2 T207 2 T209 2
others[5] 88 1 T103 2 T14 2 T95 4
others[6] 80 1 T14 2 T209 2 T210 2
others[7] 102 1 T12 2 T96 2 T46 2
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T2 2 T10 2 T14 2
others[1] 100 1 T26 2 T62 2 T63 2
others[2] 68 1 T10 4 T103 2 T94 2
others[3] 94 1 T10 2 T94 2 T210 2
others[4] 122 1 T10 4 T93 2 T95 2
others[5] 80 1 T14 4 T96 2 T207 2
others[6] 90 1 T209 2 T210 2 T248 2
others[7] 114 1 T383 2 T52 2 T209 2
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T10 2 T208 2 T209 2
others[1] 46 1 T104 2 T205 2 T384 2
others[2] 44 1 T10 2 T210 2 T285 2
others[3] 58 1 T2 4 T211 2 T130 2
others[4] 48 1 T63 2 T253 2 T285 2
others[5] 68 1 T63 2 T104 2 T205 2
others[6] 54 1 T63 2 T14 2 T130 2
others[7] 78 1 T208 4 T210 2 T251 2
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T2 2 T96 4 T205 2
others[1] 86 1 T2 2 T10 4 T63 2
others[2] 106 1 T97 2 T172 2 T209 4
others[3] 78 1 T2 2 T93 2 T94 2
others[4] 106 1 T10 6 T14 2 T96 2
others[5] 98 1 T10 2 T14 4 T176 2
others[6] 106 1 T26 2 T94 2 T96 8
others[7] 102 1 T103 2 T14 2 T95 2
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 36 1 T92 2 T93 2 T209 4
others[1] 48 1 T26 2 T92 2 T93 2
others[2] 38 1 T207 2 T248 2 T285 2
others[3] 44 1 T10 2 T93 2 T14 2
others[4] 38 1 T10 2 T385 2 T285 2
others[5] 48 1 T94 2 T96 2 T383 2
others[6] 48 1 T92 2 T209 2 T130 4
others[7] 46 1 T209 4 T385 2 T248 2
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T10 4 T94 2 T96 2
others[1] 78 1 T10 4 T12 2 T14 2
others[2] 92 1 T10 2 T97 2 T104 2
others[3] 106 1 T95 2 T46 2 T386 2
others[4] 94 1 T63 2 T94 2 T96 2
others[5] 86 1 T10 4 T96 2 T176 2
others[6] 96 1 T10 2 T93 2 T52 2
others[7] 112 1 T93 2 T14 4 T383 2
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T46 2 T386 2 T384 2
others[1] 76 1 T95 2 T248 2 T254 2
others[2] 96 1 T2 2 T10 2 T94 2
others[3] 120 1 T10 2 T92 4 T62 2
others[4] 76 1 T92 2 T94 2 T95 4
others[5] 86 1 T2 2 T14 2 T383 2
others[6] 78 1 T2 2 T14 2 T209 6
others[7] 102 1 T14 2 T87 2 T209 4
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T14 2 T172 2 T176 2
others[1] 82 1 T93 2 T14 2 T96 2
others[2] 96 1 T93 2 T14 2 T209 4
others[3] 100 1 T87 4 T210 4 T130 2
others[4] 100 1 T92 2 T95 2 T209 2
others[5] 100 1 T10 4 T26 2 T92 2
others[6] 92 1 T2 2 T26 2 T14 4
others[7] 88 1 T94 2 T96 2 T97 2
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 70 1 T2 2 T130 2 T387 2
others[1] 92 1 T95 2 T97 2 T130 4
others[2] 92 1 T10 2 T14 2 T95 2
others[3] 86 1 T96 4 T209 4 T210 2
others[4] 104 1 T63 4 T93 4 T94 2
others[5] 94 1 T26 2 T92 2 T96 2
others[6] 90 1 T10 2 T26 2 T210 2
others[7] 112 1 T2 2 T383 2 T209 4
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T386 2 T209 6 T210 4
others[1] 88 1 T10 2 T172 2 T207 2
others[2] 114 1 T2 2 T10 2 T26 2
others[3] 90 1 T14 2 T130 4 T285 6
others[4] 76 1 T96 2 T210 4 T248 2
others[5] 112 1 T2 2 T92 2 T94 2
others[6] 84 1 T104 2 T209 2 T385 2
others[7] 114 1 T10 2 T14 2 T96 2
false 14269 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 45 1 T4 1 T13 1 T104 2
others[1] 32 1 T118 1 T243 1 T17 1
others[2] 46 1 T2 2 T132 1 T206 2
others[3] 40 1 T7 1 T15 1 T132 1
others[4] 51 1 T10 2 T7 1 T15 2
others[5] 48 1 T4 2 T15 1 T132 1
others[6] 42 1 T4 1 T7 1 T13 1
others[7] 51 1 T4 3 T15 1 T283 1
false 14269 1 T1 4 T2 17 T3 4
true 2389 1 T2 5 T4 5 T10 18


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 41 1 T7 1 T15 1 T221 1
others[1] 46 1 T15 1 T206 1 T388 2
others[2] 47 1 T4 1 T7 1 T15 1
others[3] 37 1 T4 3 T206 1 T118 1
others[4] 49 1 T2 2 T132 1 T125 1
others[5] 43 1 T10 2 T13 1 T15 1
others[6] 39 1 T4 1 T7 1 T13 1
others[7] 53 1 T4 2 T15 1 T34 1
false 11579 1 T1 3 T2 15 T3 3
true 19073 1 T1 5 T2 22 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T2 2 T95 2 T96 2
others[1] 92 1 T10 2 T93 2 T95 2
others[2] 84 1 T92 2 T98 2 T207 2
others[3] 76 1 T10 4 T14 2 T383 2
others[4] 108 1 T63 2 T386 2 T209 2
others[5] 80 1 T2 2 T10 2 T311 2
others[6] 108 1 T2 2 T62 2 T95 2
others[7] 116 1 T10 4 T26 2 T93 2
false 7791 1 T1 3 T2 1 T3 3
true 16809 1 T1 5 T2 17 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T10 2 T14 2 T210 2
others[1] 100 1 T10 2 T62 2 T14 2
others[2] 74 1 T10 2 T104 2 T383 2
others[3] 94 1 T10 2 T96 2 T207 2
others[4] 108 1 T26 2 T14 4 T95 2
others[5] 68 1 T63 2 T96 2 T383 2
others[6] 80 1 T385 2 T130 6 T69 2
others[7] 132 1 T12 2 T92 2 T103 2
false 6901 1 T1 1 T2 3 T3 2
true 16575 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T10 2 T63 2 T103 2
others[1] 90 1 T10 2 T26 2 T97 2
others[2] 112 1 T10 2 T94 2 T209 2
others[3] 98 1 T14 2 T95 2 T172 2
others[4] 94 1 T2 2 T96 2 T104 2
others[5] 78 1 T10 4 T103 2 T96 2
others[6] 66 1 T62 2 T94 2 T386 2
others[7] 120 1 T10 2 T93 2 T14 2
false 7264 1 T1 2 T2 1 T3 2
true 16591 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 33 1 T4 1 T7 1 T13 2
others[1] 44 1 T4 1 T13 1 T15 1
others[2] 43 1 T15 1 T14 2 T210 2
others[3] 32 1 T4 1 T206 1 T243 2
others[4] 51 1 T4 1 T7 1 T243 1
others[5] 34 1 T4 1 T7 1 T16 1
others[6] 33 1 T4 1 T7 1 T283 2
others[7] 53 1 T4 1 T7 2 T15 2
false 11520 1 T1 3 T2 15 T3 3
true 19068 1 T1 5 T2 23 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T2 2 T14 2 T205 2
others[1] 52 1 T208 2 T253 2 T285 2
others[2] 48 1 T208 2 T130 2 T389 2
others[3] 62 1 T10 2 T209 2 T211 2
others[4] 66 1 T2 2 T63 2 T104 2
others[5] 32 1 T63 2 T390 2 T391 2
others[6] 62 1 T104 2 T130 2 T326 2
others[7] 52 1 T10 2 T63 2 T210 2
false 9238 1 T1 3 T2 1 T3 3
true 16816 1 T1 5 T2 17 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 41 1 T7 1 T15 1 T34 1
others[1] 35 1 T248 2 T328 1 T313 2
others[2] 41 1 T4 2 T7 1 T206 1
others[3] 53 1 T4 1 T15 2 T283 2
others[4] 52 1 T4 1 T7 1 T13 1
others[5] 46 1 T7 3 T325 2 T328 3
others[6] 44 1 T4 2 T206 1 T118 1
others[7] 37 1 T13 1 T15 1 T132 1
false 11469 1 T1 3 T2 15 T3 3
true 19048 1 T1 5 T2 23 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T95 2 T205 2 T209 6
others[1] 92 1 T2 2 T10 2 T26 2
others[2] 108 1 T10 6 T95 2 T96 2
others[3] 90 1 T2 2 T63 2 T14 2
others[4] 80 1 T2 2 T10 2 T14 2
others[5] 84 1 T14 2 T96 2 T97 2
others[6] 82 1 T94 2 T207 2 T68 2
others[7] 138 1 T10 2 T96 6 T172 4
false 7693 1 T1 3 T2 1 T3 3
true 16720 1 T1 5 T2 17 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 45 1 T4 1 T16 1 T34 1
others[1] 39 1 T4 1 T7 3 T16 1
others[2] 38 1 T4 1 T13 1 T15 1
others[3] 44 1 T4 3 T15 1 T283 2
others[4] 39 1 T4 3 T97 2 T18 1
others[5] 44 1 T4 1 T7 1 T34 1
others[6] 46 1 T7 1 T118 1 T17 1
others[7] 60 1 T99 2 T13 1 T15 1
false 11425 1 T1 3 T2 15 T3 2
true 19021 1 T1 5 T2 24 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T26 2 T209 2 T130 4
others[1] 34 1 T94 2 T14 2 T130 2
others[2] 54 1 T93 2 T96 2 T97 2
others[3] 32 1 T209 2 T385 2 T392 2
others[4] 40 1 T103 2 T95 2 T210 2
others[5] 48 1 T10 2 T92 4 T93 2
others[6] 40 1 T383 2 T385 4 T248 2
others[7] 60 1 T10 2 T92 2 T93 2
false 9662 1 T1 3 T2 15 T3 2
true 16775 1 T1 5 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T10 4 T93 2 T94 2
others[1] 94 1 T96 2 T97 2 T209 2
others[2] 80 1 T10 4 T95 2 T96 2
others[3] 78 1 T93 2 T46 2 T209 4
others[4] 92 1 T10 2 T12 2 T14 2
others[5] 116 1 T10 6 T94 2 T97 2
others[6] 86 1 T63 2 T14 4 T52 2
others[7] 122 1 T96 2 T176 2 T52 2
false 6990 1 T1 1 T2 4 T3 2
true 16561 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T63 2 T385 2 T130 2
others[1] 74 1 T2 2 T87 2 T209 2
others[2] 94 1 T2 2 T209 4 T251 2
others[3] 74 1 T2 2 T209 4 T248 2
others[4] 98 1 T92 2 T95 2 T104 2
others[5] 78 1 T92 2 T62 2 T94 4
others[6] 80 1 T95 2 T208 2 T209 2
others[7] 122 1 T10 4 T92 2 T14 4
false 6990 1 T1 1 T2 4 T3 2
true 16561 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T14 2 T172 2 T385 2
others[1] 76 1 T68 2 T210 2 T248 2
others[2] 112 1 T93 2 T96 2 T209 4
others[3] 104 1 T92 4 T96 2 T97 2
others[4] 80 1 T26 2 T14 2 T176 2
others[5] 80 1 T14 2 T52 2 T87 2
others[6] 94 1 T2 2 T94 2 T96 2
others[7] 120 1 T10 4 T26 2 T93 2
false 6408 1 T1 1 T2 1 T3 1
true 16565 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 74 1 T63 2 T93 2 T96 2
others[1] 100 1 T14 2 T130 2 T186 2
others[2] 92 1 T10 2 T92 2 T95 2
others[3] 94 1 T94 2 T95 2 T96 2
others[4] 100 1 T10 2 T63 2 T14 2
others[5] 70 1 T2 2 T26 2 T93 2
others[6] 118 1 T26 2 T96 2 T52 2
others[7] 92 1 T2 2 T96 2 T172 2
false 6408 1 T1 1 T2 1 T3 1
true 16565 1 T1 4 T2 17 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T93 2 T94 2 T176 2
others[1] 72 1 T12 2 T103 2 T68 2
others[2] 58 1 T386 2 T210 2 T289 2
others[3] 60 1 T92 2 T207 2 T87 2
others[4] 40 1 T26 2 T14 2 T130 4
others[5] 60 1 T92 2 T209 2 T211 2
others[6] 72 1 T383 2 T209 2 T210 2
others[7] 64 1 T93 2 T14 2 T95 4
false 6836 1 T1 1 T2 2 T3 1
true 17908 1 T1 4 T2 18 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 60 1 T92 2 T95 2 T96 2
others[1] 78 1 T63 2 T103 2 T14 4
others[2] 70 1 T10 2 T93 2 T176 4
others[3] 56 1 T10 2 T95 2 T172 2
others[4] 58 1 T2 2 T96 2 T104 2
others[5] 64 1 T10 2 T63 2 T98 2
others[6] 48 1 T130 2 T285 2 T257 2
others[7] 92 1 T10 2 T98 2 T209 4
false 6836 1 T1 1 T2 2 T3 1
true 17908 1 T1 4 T2 18 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T4 1 T15 1 T14 2
others[1] 36 1 T4 1 T132 2 T34 1
others[2] 43 1 T4 1 T118 1 T18 1
others[3] 25 1 T221 1 T313 1 T316 1
others[4] 43 1 T4 2 T7 1 T118 1
others[5] 40 1 T13 1 T132 1 T206 1
others[6] 44 1 T4 2 T13 2 T15 2
others[7] 49 1 T4 4 T16 1 T125 1
false 11658 1 T1 3 T2 15 T3 3
true 19165 1 T1 5 T2 22 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 132 1 T96 4 T209 4 T285 8
others[1] 102 1 T209 2 T384 2 T285 6
others[2] 94 1 T10 2 T14 4 T96 2
others[3] 72 1 T2 2 T92 2 T94 2
others[4] 104 1 T10 2 T207 2 T208 2
others[5] 70 1 T2 2 T209 4 T248 2
others[6] 94 1 T26 2 T383 2 T210 4
others[7] 110 1 T10 2 T96 2 T104 2
false 7764 1 T1 3 T2 1 T3 3
true 16773 1 T1 5 T2 17 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T4 1 T7 3 T125 1
others[1] 42 1 T4 2 T7 1 T13 1
others[2] 39 1 T4 2 T15 1 T16 1
others[3] 36 1 T7 1 T15 1 T243 1
others[4] 22 1 T4 1 T283 1 T388 1
others[5] 48 1 T4 1 T7 1 T118 1
others[6] 40 1 T13 2 T34 1 T206 2
others[7] 45 1 T15 1 T388 1 T342 1
false 14269 1 T1 4 T2 17 T3 4
true 2415 1 T2 6 T4 5 T10 17

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%