Unified Coverage Report :: Group Instance : mubi8_cov_of_mubi8_cov_of_tb.dut.owner_sw_cfg_read_lock_mubi_cov_if

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	9	1	10.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
true	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

14981

1

T1

1

T2

4

T3

14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	9	1	10.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
true	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

14981

1

T1

1

T2

4

T3

14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	8	2	20.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

10764

1

T1

1

T2

2

T3

10

true

17463

1

T1

1

T2

4

T3

14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	8	2	20.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

11707

1

T1

1

T2

3

T3

10

true

17505

1

T1

1

T2

5

T3

14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	108	1			T11	2		T87	2		T121	4
others[1]	98	1			T15	2		T92	2		T95	2
others[2]	110	1			T10	2		T11	2		T89	2
others[3]	82	1			T95	2		T48	2		T122	2
others[4]	108	1			T117	2		T92	2		T94	2
others[5]	110	1			T91	2		T95	2		T122	4
others[6]	114	1			T91	2		T121	2		T122	2
others[7]	110	1			T88	2		T94	2		T122	2
false	14981	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	90	1			T10	2		T88	2		T89	2
others[1]	80	1			T95	4		T108	2		T121	4
others[2]	94	1			T89	2		T121	6		T377	2
others[3]	120	1			T11	2		T93	4		T122	2
others[4]	114	1			T15	2		T91	2		T92	2
others[5]	98	1			T3	2		T90	2		T121	4
others[6]	122	1			T3	2		T87	2		T93	2
others[7]	122	1			T91	2		T95	2		T121	4
false	14981	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	78	1			T91	2		T95	2		T121	4
others[1]	100	1			T87	2		T48	2		T121	2
others[2]	74	1			T122	2		T188	2		T264	4
others[3]	104	1			T3	2		T121	2		T377	2
others[4]	86	1			T93	2		T108	2		T121	4
others[5]	96	1			T10	2		T48	2		T121	2
others[6]	104	1			T108	4		T121	4		T217	2
others[7]	128	1			T91	2		T93	2		T96	2
false	14981	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	54	1			T260	2		T185	2		T378	2
others[1]	70	1			T109	2		T122	4		T217	2
others[2]	94	1			T122	4		T217	2		T264	2
others[3]	74	1			T263	2		T66	2		T185	2
others[4]	64	1			T93	2		T108	2		T122	2
others[5]	64	1			T109	2		T122	2		T379	2
others[6]	72	1			T108	2		T121	2		T177	2
others[7]	76	1			T88	4		T121	4		T176	4
false	14981	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	96	1			T93	2		T121	4		T122	4
others[1]	112	1			T90	2		T95	2		T108	2
others[2]	114	1			T88	2		T90	2		T121	6
others[3]	100	1			T92	2		T121	4		T122	2
others[4]	88	1			T10	2		T89	2		T93	2
others[5]	84	1			T10	2		T11	2		T117	4
others[6]	110	1			T88	2		T89	2		T58	2
others[7]	122	1			T91	2		T108	2		T121	2
false	14981	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	48	1			T11	2		T216	2		T217	2
others[1]	40	1			T90	2		T94	2		T215	2
others[2]	32	1			T215	2		T217	4		T260	2
others[3]	28	1			T121	2		T122	4		T260	2
others[4]	26	1			T92	2		T122	2		T216	2
others[5]	32	1			T218	2		T380	6		T381	6
others[6]	42	1			T218	2		T380	2		T261	4
others[7]	42	1			T92	2		T121	2		T122	2
false	14981	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	116	1			T89	2		T90	6		T91	2
others[1]	112	1			T88	2		T122	2		T216	4
others[2]	92	1			T10	2		T87	2		T92	2
others[3]	120	1			T10	2		T90	2		T92	2
others[4]	102	1			T3	2		T94	2		T109	2
others[5]	94	1			T10	2		T217	2		T382	2
others[6]	94	1			T121	8		T216	2		T177	2
others[7]	90	1			T121	4		T379	2		T217	4
false	14981	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	118	1			T10	2		T88	2		T90	2
others[1]	94	1			T95	2		T121	2		T377	2
others[2]	84	1			T88	2		T121	2		T216	2
others[3]	86	1			T89	2		T117	2		T108	2
others[4]	100	1			T15	2		T121	2		T263	2
others[5]	114	1			T11	2		T121	2		T122	6
others[6]	118	1			T88	2		T95	2		T122	2
others[7]	120	1			T90	2		T92	2		T48	2
false	14981	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	114	1			T94	2		T121	2		T122	4
others[1]	82	1			T91	2		T92	2		T121	2
others[2]	76	1			T94	2		T122	2		T217	4
others[3]	108	1			T90	2		T121	4		T216	2
others[4]	94	1			T88	2		T121	4		T122	2
others[5]	84	1			T10	2		T92	2		T93	2
others[6]	86	1			T121	2		T122	4		T217	2
others[7]	118	1			T3	2		T15	2		T90	2
false	14981	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	96	1			T121	4		T122	2		T216	2
others[1]	120	1			T3	2		T10	2		T88	2
others[2]	106	1			T91	2		T93	2		T121	2
others[3]	94	1			T92	2		T121	4		T215	2
others[4]	82	1			T89	2		T58	2		T92	4
others[5]	80	1			T11	2		T122	4		T216	2
others[6]	86	1			T93	2		T122	2		T216	2
others[7]	104	1			T11	2		T108	2		T216	2
false	14981	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	124	1			T108	4		T121	2		T122	6
others[1]	98	1			T11	2		T88	2		T58	2
others[2]	98	1			T88	2		T117	2		T69	2
others[3]	98	1			T94	2		T108	2		T121	2
others[4]	94	1			T92	2		T122	2		T177	2
others[5]	80	1			T95	2		T264	2		T263	2
others[6]	94	1			T88	2		T121	2		T122	2
others[7]	116	1			T109	2		T122	4		T216	2
false	14981	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	39	1			T6	1		T14	1		T235	1
others[1]	37	1			T6	1		T7	1		T334	1
others[2]	41	1			T4	1		T14	1		T223	1
others[3]	41	1			T235	1		T121	2		T263	2
others[4]	43	1			T4	1		T10	2		T7	1
others[5]	34	1			T4	1		T7	1		T16	1
others[6]	36	1			T6	1		T14	2		T235	1
others[7]	47	1			T4	1		T14	1		T223	3
false	14981	1			T1	1		T2	4		T3	14
true	2476	1			T3	3		T4	5		T10	8

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	40	1			T4	1		T16	1		T235	1
others[1]	39	1			T4	1		T122	2		T337	1
others[2]	32	1			T223	2		T122	2		T17	1
others[3]	36	1			T7	2		T14	3		T223	1
others[4]	55	1			T4	1		T10	2		T6	1
others[5]	28	1			T235	2		T337	1		T338	1
others[6]	33	1			T6	1		T16	1		T14	2
others[7]	55	1			T4	1		T6	1		T7	1
false	12195	1			T1	1		T2	3		T3	10
true	19918	1			T1	1		T2	5		T3	17

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	100	1			T11	2		T91	2		T48	2
others[1]	92	1			T91	2		T117	2		T92	2
others[2]	90	1			T15	2		T89	2		T92	2
others[3]	84	1			T10	2		T95	2		T122	2
others[4]	138	1			T94	4		T216	4		T217	2
others[5]	122	1			T11	2		T95	2		T121	6
others[6]	100	1			T87	2		T95	2		T109	2
others[7]	114	1			T88	2		T108	2		T122	2
false	8112	1			T1	1		T2	3		T3	10
true	17565	1			T1	1		T2	5		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	128	1			T93	2		T121	6		T177	2
others[1]	82	1			T89	2		T93	2		T109	2
others[2]	98	1			T10	2		T11	2		T108	2
others[3]	114	1			T95	2		T121	6		T122	2
others[4]	114	1			T3	2		T93	2		T121	2
others[5]	108	1			T88	2		T121	2		T122	2
others[6]	98	1			T3	2		T87	2		T89	2
others[7]	98	1			T15	2		T90	2		T91	2
false	7211	1			T1	1		T2	2		T3	3
true	17338	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	100	1			T3	2		T95	2		T108	2
others[1]	70	1			T10	2		T93	2		T108	2
others[2]	96	1			T96	2		T122	4		T215	2
others[3]	84	1			T93	2		T95	2		T122	4
others[4]	104	1			T48	2		T108	4		T121	2
others[5]	94	1			T87	2		T91	4		T121	2
others[6]	118	1			T121	8		T122	6		T382	2
others[7]	104	1			T48	2		T121	6		T215	2
false	7737	1			T1	1		T2	3		T3	3
true	17365	1			T1	1		T2	5		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	28	1			T4	1		T217	2		T258	2
others[1]	39	1			T7	1		T223	1		T17	1
others[2]	39	1			T16	1		T235	1		T17	2
others[3]	45	1			T337	1		T66	2		T17	2
others[4]	46	1			T6	1		T14	4		T235	1
others[5]	44	1			T90	2		T220	2		T223	1
others[6]	39	1			T4	1		T88	4		T14	1
others[7]	45	1			T90	2		T7	1		T268	1
false	12135	1			T1	1		T2	3		T3	10
true	19920	1			T1	1		T2	5		T3	16

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	80	1			T88	2		T108	4		T122	2
others[1]	48	1			T109	4		T121	2		T263	4
others[2]	76	1			T122	2		T176	2		T382	2
others[3]	88	1			T121	2		T122	2		T379	2
others[4]	58	1			T138	2		T217	2		T263	2
others[5]	68	1			T88	2		T122	4		T177	2
others[6]	72	1			T122	2		T176	2		T188	2
others[7]	78	1			T93	2		T121	2		T263	2
false	9368	1			T1	1		T2	3		T3	7
true	17558	1			T1	1		T2	5		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	28	1			T16	1		T14	1		T217	2
others[1]	52	1			T4	4		T10	2		T7	1
others[2]	53	1			T223	1		T235	1		T122	2
others[3]	43	1			T14	1		T187	1		T223	4
others[4]	42	1			T4	1		T6	1		T345	2
others[5]	40	1			T4	1		T16	1		T187	1
others[6]	53	1			T16	1		T223	2		T235	1
others[7]	45	1			T4	1		T88	2		T14	2
false	12082	1			T1	1		T2	3		T3	10
true	19896	1			T1	1		T2	5		T3	16

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	102	1			T117	2		T93	2		T108	2
others[1]	122	1			T117	2		T95	2		T109	2
others[2]	84	1			T93	2		T121	2		T216	4
others[3]	98	1			T10	2		T89	4		T91	2
others[4]	96	1			T88	2		T108	2		T121	4
others[5]	96	1			T121	4		T122	2		T263	2
others[6]	120	1			T11	2		T88	2		T90	4
others[7]	108	1			T10	2		T58	2		T121	4
false	8056	1			T1	1		T2	3		T3	8
true	17483	1			T1	1		T2	5		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	48	1			T4	2		T64	1		T223	1
others[1]	32	1			T337	1		T258	1		T290	1
others[2]	44	1			T14	1		T223	1		T235	1
others[3]	34	1			T4	1		T90	2		T14	1
others[4]	42	1			T64	1		T14	1		T122	2
others[5]	42	1			T4	1		T14	1		T337	1
others[6]	36	1			T4	1		T14	1		T333	1
others[7]	42	1			T14	2		T337	1		T333	1
false	12027	1			T1	1		T2	3		T3	10
true	19878	1			T1	1		T2	5		T3	17

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	50	1			T92	2		T94	2		T215	2
others[1]	24	1			T122	2		T217	4		T380	2
others[2]	36	1			T216	2		T218	6		T260	2
others[3]	48	1			T11	2		T122	4		T216	2
others[4]	40	1			T92	2		T121	2		T215	2
others[5]	22	1			T122	2		T260	2		T383	2
others[6]	38	1			T216	2		T263	2		T260	2
others[7]	32	1			T90	2		T121	2		T217	2
false	10451	1			T1	1		T2	3		T3	10
true	17530	1			T1	1		T2	5		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	120	1			T10	2		T90	2		T92	2
others[1]	84	1			T176	2		T217	6		T382	2
others[2]	76	1			T87	2		T90	2		T121	6
others[3]	124	1			T88	2		T121	2		T122	4
others[4]	94	1			T3	2		T91	2		T121	2
others[5]	108	1			T10	4		T89	2		T95	2
others[6]	76	1			T94	2		T121	2		T217	2
others[7]	138	1			T90	4		T92	4		T108	2
false	7391	1			T1	1		T2	2		T3	3
true	17336	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	112	1			T88	2		T121	2		T122	2
others[1]	104	1			T10	2		T121	2		T122	2
others[2]	100	1			T92	2		T95	2		T122	6
others[3]	88	1			T88	2		T216	2		T260	6
others[4]	96	1			T89	2		T108	2		T121	2
others[5]	106	1			T11	2		T95	2		T108	2
others[6]	126	1			T15	2		T90	4		T121	2
others[7]	102	1			T88	2		T117	2		T92	2
false	7391	1			T1	1		T2	2		T3	3
true	17336	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	104	1			T122	2		T379	2		T260	6
others[1]	98	1			T94	2		T121	4		T122	4
others[2]	114	1			T95	2		T121	2		T122	2
others[3]	90	1			T88	2		T92	2		T93	2
others[4]	102	1			T121	2		T122	2		T216	2
others[5]	66	1			T10	2		T91	2		T121	2
others[6]	86	1			T15	2		T90	4		T94	2
others[7]	102	1			T3	2		T92	2		T93	2
false	6699	1			T1	1		T2	1		T3	2
true	17325	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	84	1			T121	4		T122	2		T217	4
others[1]	100	1			T92	2		T121	2		T122	4
others[2]	84	1			T91	2		T108	2		T121	4
others[3]	98	1			T11	2		T88	2		T58	2
others[4]	86	1			T3	2		T89	2		T122	4
others[5]	92	1			T92	2		T93	2		T121	2
others[6]	88	1			T122	4		T215	2		T216	2
others[7]	136	1			T10	2		T11	2		T93	2
false	6699	1			T1	1		T2	1		T3	2
true	17325	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	48	1			T121	2		T122	2		T185	2
others[1]	70	1			T11	2		T108	2		T122	4
others[2]	70	1			T88	2		T109	2		T121	4
others[3]	86	1			T94	2		T377	2		T217	2
others[4]	64	1			T108	2		T177	2		T217	4
others[5]	52	1			T88	2		T94	2		T122	2
others[6]	88	1			T89	2		T91	2		T108	2
others[7]	100	1			T10	2		T108	2		T121	2
false	7168	1			T1	1		T2	1		T3	2
true	18876	1			T1	1		T2	4		T3	15

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	74	1			T88	2		T93	2		T384	2
others[1]	70	1			T117	2		T93	2		T121	2
others[2]	78	1			T91	2		T108	2		T122	2
others[3]	68	1			T3	2		T89	2		T48	2
others[4]	74	1			T10	4		T94	2		T121	2
others[5]	52	1			T121	2		T122	2		T217	2
others[6]	74	1			T91	2		T94	2		T177	2
others[7]	94	1			T95	2		T108	2		T121	4
false	7168	1			T1	1		T2	1		T3	2
true	18876	1			T1	1		T2	4		T3	15

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	45	1			T4	1		T16	1		T223	1
others[1]	37	1			T4	1		T235	1		T333	1
others[2]	56	1			T64	1		T14	2		T223	2
others[3]	34	1			T16	1		T268	1		T333	1
others[4]	41	1			T14	1		T333	1		T384	2
others[5]	54	1			T4	2		T88	2		T7	1
others[6]	48	1			T223	1		T333	1		T17	1
others[7]	54	1			T4	1		T223	1		T268	1
false	12280	1			T1	1		T2	3		T3	10
true	20032	1			T1	1		T2	5		T3	15

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	116	1			T11	2		T88	2		T121	2
others[1]	98	1			T88	2		T69	2		T92	2
others[2]	94	1			T108	2		T122	6		T264	2
others[3]	96	1			T108	2		T121	2		T122	2
others[4]	92	1			T94	2		T122	2		T263	2
others[5]	104	1			T88	2		T117	2		T109	2
others[6]	86	1			T58	2		T92	2		T122	6
others[7]	116	1			T94	2		T121	2		T122	2
false	8186	1			T1	1		T2	2		T3	7
true	17534	1			T1	1		T2	4		T3	14

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	52	1			T90	2		T7	2		T16	1
others[1]	43	1			T4	1		T88	2		T333	1
others[2]	28	1			T14	2		T334	1		T258	2
others[3]	31	1			T6	1		T334	1		T232	1
others[4]	34	1			T90	2		T14	1		T223	2
others[5]	51	1			T4	1		T14	1		T220	2
others[6]	53	1			T88	2		T94	2		T268	1
others[7]	32	1			T235	1		T17	2		T258	2
false	14981	1			T1	1		T2	4		T3	14
true	2516	1			T3	2		T4	5		T10	7