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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10389 1 T1 2 T2 6 T3 14
true 16912 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11304 1 T1 2 T2 6 T3 16
true 16963 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T10 2 T125 2 T174 2
others[1] 92 1 T10 2 T102 2 T97 4
others[2] 92 1 T97 2 T68 6 T125 2
others[3] 104 1 T97 2 T68 4 T172 2
others[4] 98 1 T10 2 T91 2 T92 2
others[5] 60 1 T102 2 T174 2 T378 2
others[6] 82 1 T32 2 T174 2 T378 4
others[7] 118 1 T10 4 T103 2 T68 4
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T10 2 T99 2 T105 2
others[1] 88 1 T3 2 T68 2 T98 2
others[2] 90 1 T3 2 T175 2 T378 6
others[3] 92 1 T68 2 T99 2 T125 2
others[4] 112 1 T94 2 T68 2 T105 2
others[5] 100 1 T68 2 T125 2 T174 2
others[6] 96 1 T103 2 T96 2 T97 2
others[7] 100 1 T3 2 T97 2 T202 4
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T102 2 T125 2 T172 2
others[1] 82 1 T3 2 T10 2 T97 2
others[2] 114 1 T10 2 T104 2 T96 2
others[3] 88 1 T93 2 T68 2 T105 2
others[4] 66 1 T3 2 T32 2 T174 2
others[5] 100 1 T96 2 T68 2 T105 2
others[6] 90 1 T10 4 T62 2 T98 2
others[7] 112 1 T10 4 T11 2 T93 2
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 52 1 T3 2 T10 2 T68 2
others[1] 48 1 T10 2 T91 2 T103 2
others[2] 50 1 T125 2 T378 4 T66 2
others[3] 74 1 T103 2 T62 2 T98 2
others[4] 86 1 T103 4 T68 2 T105 2
others[5] 68 1 T93 2 T105 2 T202 2
others[6] 38 1 T98 2 T402 2 T287 2
others[7] 86 1 T10 2 T93 2 T98 2
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T10 2 T103 2 T202 2
others[1] 84 1 T68 2 T125 2 T239 2
others[2] 104 1 T31 2 T68 2 T99 2
others[3] 76 1 T10 2 T104 4 T125 2
others[4] 72 1 T11 2 T68 2 T99 2
others[5] 78 1 T10 2 T96 2 T68 2
others[6] 100 1 T93 2 T68 2 T32 2
others[7] 114 1 T10 2 T91 2 T93 2
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 34 1 T96 2 T97 4 T372 2
others[1] 32 1 T31 2 T92 2 T174 2
others[2] 50 1 T99 2 T125 2 T378 2
others[3] 32 1 T104 2 T96 2 T125 2
others[4] 38 1 T31 2 T96 2 T68 2
others[5] 34 1 T10 4 T92 2 T125 2
others[6] 38 1 T125 4 T378 2 T372 2
others[7] 32 1 T11 2 T99 2 T125 2
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 86 1 T3 2 T97 2 T68 2
others[1] 104 1 T3 2 T10 2 T97 2
others[2] 84 1 T93 2 T68 2 T99 2
others[3] 116 1 T3 2 T97 2 T68 2
others[4] 112 1 T96 2 T125 2 T175 2
others[5] 84 1 T68 2 T125 4 T173 2
others[6] 104 1 T10 2 T91 2 T95 2
others[7] 116 1 T93 2 T96 2 T68 6
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T93 2 T95 2 T103 2
others[1] 86 1 T97 2 T98 2 T125 4
others[2] 82 1 T125 2 T174 4 T175 2
others[3] 106 1 T103 2 T105 2 T32 2
others[4] 106 1 T3 2 T10 4 T105 2
others[5] 96 1 T3 2 T96 2 T68 2
others[6] 104 1 T91 2 T93 2 T105 2
others[7] 90 1 T31 2 T97 2 T68 2
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 110 1 T31 2 T97 2 T105 2
others[1] 90 1 T10 2 T92 2 T94 2
others[2] 86 1 T98 2 T174 2 T378 2
others[3] 102 1 T10 2 T92 2 T97 4
others[4] 106 1 T93 2 T94 2 T68 2
others[5] 100 1 T91 2 T125 2 T174 4
others[6] 96 1 T104 2 T68 2 T239 2
others[7] 110 1 T10 4 T68 2 T99 6
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T92 2 T68 2 T174 2
others[1] 110 1 T10 2 T93 2 T94 2
others[2] 92 1 T3 4 T104 2 T68 2
others[3] 64 1 T96 2 T68 2 T202 2
others[4] 84 1 T91 2 T97 2 T99 2
others[5] 92 1 T125 4 T175 2 T378 2
others[6] 108 1 T10 2 T96 2 T97 2
others[7] 98 1 T10 2 T96 2 T68 4
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T102 2 T97 2 T202 2
others[1] 86 1 T96 2 T97 2 T68 4
others[2] 72 1 T103 2 T68 4 T99 2
others[3] 126 1 T10 2 T104 2 T97 2
others[4] 86 1 T10 2 T31 2 T95 2
others[5] 102 1 T3 2 T93 2 T98 2
others[6] 92 1 T68 2 T125 2 T378 2
others[7] 142 1 T10 2 T96 2 T97 2
false 14476 1 T1 4 T2 6 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 37 1 T4 1 T6 1 T13 1
others[1] 29 1 T97 2 T280 1 T174 2
others[2] 23 1 T4 1 T279 1 T403 1
others[3] 33 1 T58 1 T68 2 T63 1
others[4] 39 1 T2 1 T4 2 T12 1
others[5] 25 1 T58 2 T99 2 T404 2
others[6] 25 1 T13 1 T58 2 T68 2
others[7] 45 1 T2 2 T3 2 T12 2
false 14476 1 T1 4 T2 6 T3 20
true 2431 1 T2 2 T3 10 T4 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 26 1 T2 1 T12 1 T97 2
others[1] 33 1 T58 1 T99 2 T279 1
others[2] 35 1 T6 1 T63 1 T405 2
others[3] 27 1 T2 1 T3 2 T13 1
others[4] 41 1 T2 1 T4 1 T68 4
others[5] 27 1 T4 1 T12 1 T13 2
others[6] 33 1 T58 2 T103 2 T280 1
others[7] 33 1 T4 2 T12 1 T58 1
false 11782 1 T1 2 T2 6 T3 16
true 19331 1 T1 4 T2 8 T3 30


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T97 2 T68 4 T174 4
others[1] 106 1 T10 2 T104 2 T68 2
others[2] 68 1 T98 2 T125 6 T174 2
others[3] 106 1 T10 2 T102 2 T103 2
others[4] 86 1 T10 2 T68 2 T125 2
others[5] 112 1 T68 2 T105 2 T125 2
others[6] 68 1 T10 2 T68 6 T378 10
others[7] 108 1 T10 2 T91 2 T92 2
false 8070 1 T1 2 T2 6 T3 2
true 17012 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 104 1 T3 2 T68 2 T202 4
others[1] 78 1 T3 2 T10 2 T96 2
others[2] 78 1 T99 2 T125 2 T174 2
others[3] 110 1 T103 2 T68 4 T105 2
others[4] 94 1 T94 2 T68 2 T125 2
others[5] 120 1 T3 2 T97 2 T98 2
others[6] 80 1 T174 2 T378 2 T406 2
others[7] 98 1 T97 2 T105 2 T174 4
false 7118 1 T1 2 T2 6 T3 1
true 16782 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T103 2 T96 2 T68 2
others[1] 90 1 T10 6 T11 2 T68 2
others[2] 96 1 T102 2 T96 2 T98 2
others[3] 92 1 T10 2 T98 2 T125 2
others[4] 82 1 T93 4 T104 2 T32 2
others[5] 90 1 T3 2 T10 2 T62 2
others[6] 88 1 T97 2 T68 2 T99 2
others[7] 120 1 T3 2 T10 2 T68 2
false 7461 1 T1 2 T2 6 T3 3
true 16784 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 37 1 T142 1 T24 2 T254 1
others[1] 57 1 T2 1 T3 2 T12 1
others[2] 37 1 T2 1 T279 1 T177 1
others[3] 32 1 T2 1 T94 2 T58 2
others[4] 38 1 T10 2 T372 2 T369 1
others[5] 31 1 T281 1 T176 2 T88 2
others[6] 30 1 T2 1 T12 1 T58 1
others[7] 39 1 T4 1 T58 2 T279 1
false 11723 1 T1 2 T2 6 T3 16
true 19248 1 T1 4 T2 8 T3 30


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 46 1 T93 2 T378 4 T372 2
others[1] 58 1 T68 2 T105 4 T174 2
others[2] 78 1 T103 2 T98 2 T125 2
others[3] 66 1 T103 2 T68 2 T172 2
others[4] 48 1 T91 2 T66 2 T151 2
others[5] 64 1 T10 2 T98 2 T32 2
others[6] 80 1 T10 2 T103 2 T62 2
others[7] 62 1 T3 2 T10 2 T93 2
false 9000 1 T1 2 T2 6 T3 2
true 17013 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T6 1 T58 2 T245 1
others[1] 31 1 T4 1 T6 1 T94 4
others[2] 44 1 T12 1 T13 1 T58 1
others[3] 24 1 T95 2 T162 1 T404 1
others[4] 41 1 T4 1 T6 1 T103 2
others[5] 31 1 T2 1 T58 1 T63 1
others[6] 28 1 T4 1 T58 2 T279 1
others[7] 48 1 T2 2 T4 1 T6 1
false 11656 1 T1 2 T2 6 T3 16
true 19191 1 T1 4 T2 8 T3 30


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 76 1 T104 2 T99 4 T125 2
others[1] 90 1 T125 2 T174 2 T378 2
others[2] 88 1 T10 4 T96 2 T68 2
others[3] 86 1 T10 2 T68 4 T239 2
others[4] 84 1 T31 2 T68 2 T32 2
others[5] 94 1 T10 2 T91 2 T93 2
others[6] 86 1 T93 2 T68 2 T174 2
others[7] 114 1 T11 2 T125 2 T239 2
false 7880 1 T1 2 T2 6 T3 2
true 16928 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T4 1 T58 1 T279 1
others[1] 37 1 T2 1 T280 1 T378 2
others[2] 34 1 T4 1 T58 2 T96 2
others[3] 24 1 T2 1 T280 1 T258 2
others[4] 25 1 T13 1 T177 1 T245 1
others[5] 35 1 T10 2 T13 2 T58 1
others[6] 32 1 T281 1 T177 1 T286 1
others[7] 35 1 T94 2 T13 1 T58 1
false 11617 1 T1 2 T2 6 T3 16
true 19203 1 T1 4 T2 8 T3 29


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T96 2 T68 2 T372 2
others[1] 40 1 T31 2 T125 2 T174 2
others[2] 24 1 T31 2 T96 2 T378 2
others[3] 30 1 T96 2 T125 4 T407 2
others[4] 44 1 T11 2 T92 2 T99 2
others[5] 26 1 T10 2 T104 2 T99 2
others[6] 42 1 T125 2 T174 2 T378 4
others[7] 56 1 T10 2 T92 2 T97 4
false 10263 1 T1 2 T2 6 T3 16
true 16986 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T10 2 T97 2 T68 4
others[1] 90 1 T10 2 T91 2 T97 4
others[2] 112 1 T96 2 T97 2 T68 2
others[3] 112 1 T93 2 T105 2 T125 2
others[4] 70 1 T68 2 T202 2 T125 4
others[5] 84 1 T97 4 T202 2 T32 2
others[6] 106 1 T3 2 T93 2 T68 4
others[7] 126 1 T3 4 T95 2 T96 2
false 7169 1 T1 2 T2 6 T3 2
true 16779 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 88 1 T32 2 T125 4 T408 2
others[1] 108 1 T97 2 T68 2 T105 2
others[2] 98 1 T3 2 T95 2 T96 2
others[3] 88 1 T3 2 T93 2 T68 2
others[4] 92 1 T10 4 T105 2 T125 2
others[5] 116 1 T103 4 T97 2 T68 2
others[6] 72 1 T31 2 T378 6 T38 2
others[7] 100 1 T91 2 T93 2 T97 2
false 7169 1 T1 2 T2 6 T3 2
true 16779 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 96 1 T92 2 T94 2 T103 4
others[1] 102 1 T10 2 T99 2 T32 2
others[2] 90 1 T97 2 T105 4 T175 4
others[3] 86 1 T10 4 T91 2 T99 2
others[4] 94 1 T92 2 T68 4 T98 2
others[5] 108 1 T94 2 T99 2 T125 2
others[6] 94 1 T10 2 T31 2 T378 2
others[7] 130 1 T93 2 T104 2 T97 2
false 6468 1 T1 1 T2 6 T3 3
true 16764 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 92 1 T94 2 T97 2 T68 2
others[1] 84 1 T10 2 T68 2 T32 2
others[2] 92 1 T92 2 T96 2 T97 2
others[3] 72 1 T3 2 T91 2 T93 2
others[4] 78 1 T10 2 T96 2 T68 6
others[5] 88 1 T10 2 T96 2 T174 2
others[6] 98 1 T68 4 T99 2 T202 2
others[7] 128 1 T3 2 T104 2 T68 6
false 6468 1 T1 1 T2 6 T3 3
true 16764 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 56 1 T10 2 T68 2 T125 2
others[1] 52 1 T10 2 T104 2 T105 2
others[2] 58 1 T174 4 T75 4 T409 2
others[3] 62 1 T99 2 T125 6 T378 4
others[4] 88 1 T68 2 T98 2 T174 6
others[5] 102 1 T125 2 T174 4 T175 2
others[6] 80 1 T174 4 T66 2 T410 4
others[7] 88 1 T68 2 T125 4 T174 2
false 7027 1 T1 1 T2 5 T3 9
true 18184 1 T1 4 T2 9 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 70 1 T125 4 T174 2 T378 6
others[1] 74 1 T93 2 T96 2 T68 2
others[2] 64 1 T93 2 T174 4 T175 2
others[3] 76 1 T174 2 T378 4 T372 2
others[4] 72 1 T97 2 T174 2 T175 2
others[5] 82 1 T68 2 T174 4 T175 2
others[6] 44 1 T68 2 T125 2 T378 2
others[7] 62 1 T96 2 T98 2 T125 2
false 7027 1 T1 1 T2 5 T3 9
true 18184 1 T1 4 T2 9 T3 22


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 41 1 T2 1 T6 1 T58 3
others[1] 31 1 T3 2 T58 1 T281 1
others[2] 42 1 T6 1 T58 1 T281 1
others[3] 36 1 T4 1 T91 2 T378 2
others[4] 23 1 T12 1 T58 2 T259 1
others[5] 34 1 T94 2 T258 1 T63 3
others[6] 38 1 T4 1 T6 1 T99 2
others[7] 47 1 T2 1 T4 1 T13 1
false 11857 1 T1 3 T2 6 T3 16
true 19334 1 T1 5 T2 8 T3 29


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T95 2 T97 2 T99 4
others[1] 98 1 T68 4 T99 2 T32 2
others[2] 94 1 T10 2 T97 2 T68 4
others[3] 96 1 T3 2 T93 2 T103 2
others[4] 98 1 T10 2 T102 2 T97 2
others[5] 100 1 T10 2 T68 4 T98 2
others[6] 108 1 T96 2 T97 2 T68 2
others[7] 92 1 T31 2 T104 2 T99 2
false 7963 1 T1 2 T2 6 T3 2
true 16967 1 T1 4 T2 7 T3 20


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T2 1 T12 1 T58 1
others[1] 33 1 T58 3 T162 1 T369 1
others[2] 44 1 T2 2 T3 2 T10 2
others[3] 32 1 T94 2 T279 1 T280 1
others[4] 27 1 T282 1 T411 2 T143 1
others[5] 36 1 T2 1 T4 1 T12 1
others[6] 43 1 T279 1 T176 2 T177 1
others[7] 48 1 T94 2 T281 1 T177 2
false 14476 1 T1 4 T2 6 T3 20
true 2387 1 T2 2 T3 10 T4 7

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%