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Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 9 1 10.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 10144 1 T1 3 T2 2 T3 1
true 16640 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 8 2 20.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
others[0] 0 1 1
others[1] 0 1 1
others[2] 0 1 1
others[3] 0 1 1
others[4] 0 1 1
others[5] 0 1 1
others[6] 0 1 1
others[7] 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
false 11029 1 T1 3 T2 2 T3 2
true 16697 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 122 1 T96 2 T16 2 T134 2
others[1] 114 1 T56 2 T101 2 T126 2
others[2] 116 1 T4 2 T98 2 T72 2
others[3] 80 1 T96 2 T18 2 T98 2
others[4] 72 1 T5 2 T16 2 T101 2
others[5] 88 1 T5 2 T56 4 T101 2
others[6] 94 1 T4 2 T97 2 T64 2
others[7] 116 1 T13 2 T109 2 T101 2
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 94 1 T18 2 T98 4 T16 2
others[1] 104 1 T13 2 T99 2 T72 2
others[2] 116 1 T4 2 T64 2 T16 6
others[3] 80 1 T102 2 T111 2 T72 4
others[4] 104 1 T16 6 T102 2 T111 4
others[5] 72 1 T13 2 T56 2 T64 2
others[6] 68 1 T5 2 T16 4 T101 2
others[7] 114 1 T96 2 T97 2 T66 2
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 84 1 T16 2 T43 2 T111 2
others[1] 104 1 T13 2 T18 2 T99 2
others[2] 78 1 T5 2 T13 2 T66 2
others[3] 92 1 T66 2 T16 2 T101 2
others[4] 82 1 T101 2 T102 2 T72 4
others[5] 98 1 T111 2 T72 2 T51 2
others[6] 72 1 T18 2 T106 2 T16 4
others[7] 100 1 T5 2 T56 2 T43 2
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 38 1 T16 4 T372 2 T131 4
others[1] 72 1 T16 2 T72 2 T122 2
others[2] 62 1 T18 4 T134 2 T197 2
others[3] 56 1 T13 2 T373 2 T374 2
others[4] 54 1 T13 2 T16 2 T102 2
others[5] 56 1 T375 2 T376 2 T377 2
others[6] 60 1 T96 2 T16 4 T175 2
others[7] 60 1 T16 2 T72 2 T335 2
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T66 2 T98 2 T16 2
others[1] 106 1 T56 2 T18 2 T98 2
others[2] 92 1 T106 2 T102 4 T111 2
others[3] 98 1 T16 2 T102 2 T126 2
others[4] 86 1 T16 2 T72 2 T378 2
others[5] 92 1 T5 2 T56 2 T16 4
others[6] 84 1 T16 4 T216 2 T374 2
others[7] 98 1 T101 2 T378 2 T175 2
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 44 1 T66 2 T111 2 T216 2
others[1] 38 1 T5 2 T102 2 T72 2
others[2] 32 1 T4 2 T101 2 T91 2
others[3] 30 1 T4 2 T216 2 T91 2
others[4] 40 1 T5 2 T126 2 T111 2
others[5] 38 1 T111 2 T72 4 T59 2
others[6] 40 1 T72 2 T91 2 T292 4
others[7] 46 1 T5 2 T72 4 T91 2
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T4 2 T13 2 T56 2
others[1] 106 1 T101 2 T102 2 T111 2
others[2] 76 1 T98 2 T378 2 T70 2
others[3] 122 1 T13 2 T102 4 T72 2
others[4] 104 1 T64 6 T16 2 T72 2
others[5] 78 1 T4 2 T5 2 T96 2
others[6] 66 1 T4 2 T100 2 T101 4
others[7] 124 1 T16 4 T111 4 T134 2
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T5 4 T102 2 T72 2
others[1] 80 1 T13 2 T66 2 T16 2
others[2] 116 1 T64 2 T16 2 T101 2
others[3] 84 1 T101 2 T68 2 T122 2
others[4] 70 1 T72 4 T379 2 T131 4
others[5] 90 1 T66 2 T126 2 T380 2
others[6] 104 1 T13 2 T126 2 T111 4
others[7] 104 1 T16 2 T102 2 T72 2
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 82 1 T56 2 T16 2 T111 2
others[1] 90 1 T98 2 T16 2 T381 2
others[2] 76 1 T98 2 T16 4 T102 4
others[3] 110 1 T56 2 T98 2 T134 2
others[4] 106 1 T13 2 T16 2 T102 2
others[5] 72 1 T16 4 T101 4 T111 2
others[6] 92 1 T97 2 T99 2 T101 2
others[7] 82 1 T16 2 T102 2 T68 2
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 90 1 T64 2 T16 2 T102 4
others[1] 76 1 T16 2 T101 2 T102 2
others[2] 100 1 T4 2 T96 2 T16 2
others[3] 74 1 T5 2 T56 2 T98 2
others[4] 76 1 T16 2 T72 2 T68 2
others[5] 98 1 T97 2 T101 2 T72 8
others[6] 84 1 T101 2 T72 4 T51 2
others[7] 96 1 T16 2 T111 2 T72 2
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 1 9 90.00


User Defined Bins for cp_value

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
true 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T4 2 T5 2 T111 2
others[1] 90 1 T18 2 T64 2 T16 2
others[2] 84 1 T109 2 T16 2 T101 2
others[3] 106 1 T18 4 T102 2 T72 2
others[4] 90 1 T13 2 T56 2 T16 2
others[5] 104 1 T13 2 T18 2 T64 2
others[6] 94 1 T101 2 T102 4 T72 2
others[7] 140 1 T4 2 T5 2 T96 2
false 14218 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 32 1 T14 3 T29 1 T220 1
others[1] 43 1 T8 1 T14 2 T111 2
others[2] 33 1 T102 2 T95 1 T274 2
others[3] 34 1 T14 1 T29 1 T20 1
others[4] 28 1 T324 1 T261 1 T274 1
others[5] 35 1 T14 1 T15 1 T139 1
others[6] 28 1 T29 1 T95 1 T324 1
others[7] 38 1 T4 2 T14 1 T29 1
false 14218 1 T1 4 T2 4 T3 4
true 2187 1 T4 5 T5 8 T13 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 34 1 T14 2 T95 2 T69 1
others[1] 31 1 T111 2 T20 1 T220 1
others[2] 33 1 T8 1 T14 2 T260 1
others[3] 33 1 T14 1 T220 1 T219 1
others[4] 27 1 T15 2 T29 2 T20 1
others[5] 33 1 T102 2 T95 1 T382 1
others[6] 45 1 T14 3 T29 2 T95 1
others[7] 36 1 T4 2 T324 1 T261 1
false 11509 1 T1 3 T2 3 T3 3
true 18846 1 T1 4 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T4 2 T56 6 T64 2
others[1] 108 1 T97 2 T134 2 T197 2
others[2] 96 1 T98 2 T16 2 T126 2
others[3] 112 1 T4 2 T98 2 T16 2
others[4] 76 1 T96 2 T111 4 T134 2
others[5] 94 1 T5 2 T72 2 T383 2
others[6] 102 1 T5 2 T13 2 T109 2
others[7] 108 1 T96 2 T18 2 T16 2
false 7916 1 T1 3 T2 3 T3 3
true 16765 1 T1 4 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 102 1 T96 2 T66 2 T18 2
others[1] 110 1 T13 4 T98 2 T16 8
others[2] 90 1 T4 2 T98 2 T16 2
others[3] 64 1 T64 2 T102 2 T134 2
others[4] 74 1 T5 2 T64 2 T111 2
others[5] 98 1 T16 2 T101 2 T111 2
others[6] 110 1 T64 2 T16 6 T43 2
others[7] 104 1 T97 2 T56 2 T16 2
false 6895 1 T1 1 T2 2 T3 1
true 16511 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 80 1 T99 2 T101 2 T102 2
others[1] 78 1 T43 2 T101 2 T102 2
others[2] 60 1 T66 2 T18 2 T113 2
others[3] 92 1 T16 4 T101 2 T102 2
others[4] 78 1 T5 2 T106 2 T101 4
others[5] 108 1 T56 2 T66 2 T16 4
others[6] 98 1 T5 2 T13 2 T16 2
others[7] 116 1 T13 2 T18 2 T43 2
false 7333 1 T1 3 T2 2 T3 2
true 16528 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 17 1 T141 1 T274 1 T263 1
others[1] 25 1 T14 2 T15 3 T20 1
others[2] 26 1 T8 1 T14 2 T29 3
others[3] 26 1 T4 2 T14 2 T20 1
others[4] 33 1 T92 2 T139 1 T233 1
others[5] 22 1 T29 2 T220 1 T219 1
others[6] 37 1 T8 1 T15 1 T29 1
others[7] 25 1 T14 1 T260 1 T95 1
false 11441 1 T1 3 T2 2 T3 3
true 18789 1 T1 4 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 54 1 T16 2 T134 2 T122 2
others[1] 72 1 T16 2 T72 2 T68 2
others[2] 34 1 T102 2 T72 2 T131 2
others[3] 48 1 T16 2 T290 2 T335 2
others[4] 68 1 T13 2 T16 4 T113 2
others[5] 80 1 T96 2 T18 2 T16 4
others[6] 62 1 T18 2 T197 2 T165 2
others[7] 40 1 T13 2 T335 2 T372 2
false 9031 1 T1 3 T2 2 T3 3
true 16723 1 T1 4 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 23 1 T29 1 T220 1 T219 1
others[1] 23 1 T15 1 T383 2 T233 1
others[2] 33 1 T8 1 T14 1 T72 2
others[3] 24 1 T14 1 T260 1 T219 1
others[4] 42 1 T8 1 T20 1 T384 2
others[5] 33 1 T8 1 T14 1 T260 1
others[6] 35 1 T107 2 T8 1 T14 1
others[7] 31 1 T14 1 T72 2 T95 2
false 11401 1 T1 3 T2 2 T3 3
true 18781 1 T1 4 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 106 1 T66 2 T18 2 T98 2
others[1] 104 1 T101 2 T111 4 T72 2
others[2] 74 1 T16 2 T126 2 T72 4
others[3] 82 1 T56 2 T98 2 T16 6
others[4] 112 1 T106 2 T111 2 T72 2
others[5] 84 1 T16 8 T102 2 T72 2
others[6] 90 1 T5 2 T56 2 T72 2
others[7] 102 1 T101 2 T102 2 T126 2
false 7871 1 T1 3 T2 2 T3 3
true 16678 1 T1 4 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 28 1 T29 1 T216 2 T233 1
others[1] 29 1 T14 3 T260 1 T219 1
others[2] 26 1 T15 1 T29 1 T219 1
others[3] 32 1 T29 1 T20 1 T95 1
others[4] 31 1 T8 1 T15 2 T29 1
others[5] 23 1 T14 1 T15 1 T29 1
others[6] 12 1 T15 1 T95 1 T326 1
others[7] 31 1 T146 2 T29 1 T37 1
false 11361 1 T1 3 T2 2 T3 3
true 18789 1 T1 4 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 30 1 T91 2 T92 2 T385 2
others[1] 32 1 T111 2 T92 2 T292 2
others[2] 52 1 T4 2 T111 2 T72 2
others[3] 44 1 T4 2 T5 2 T111 2
others[4] 56 1 T101 2 T126 2 T72 2
others[5] 36 1 T5 2 T72 4 T216 2
others[6] 30 1 T5 2 T216 2 T91 4
others[7] 28 1 T66 2 T102 2 T386 2
false 9851 1 T1 3 T2 2 T3 3
true 16721 1 T1 4 T2 4 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T13 2 T64 2 T43 2
others[1] 74 1 T98 2 T64 2 T111 2
others[2] 102 1 T13 2 T16 4 T134 2
others[3] 110 1 T4 2 T16 2 T101 2
others[4] 84 1 T111 2 T72 2 T372 4
others[5] 100 1 T64 2 T101 2 T102 2
others[6] 130 1 T4 4 T5 2 T96 2
others[7] 80 1 T16 4 T101 2 T102 4
false 7004 1 T1 1 T2 2 T3 1
true 16518 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 98 1 T101 2 T102 2 T72 4
others[1] 88 1 T5 2 T13 2 T102 2
others[2] 90 1 T16 2 T72 2 T373 2
others[3] 96 1 T13 2 T16 2 T68 2
others[4] 112 1 T64 2 T16 2 T101 2
others[5] 82 1 T5 2 T66 2 T102 2
others[6] 76 1 T102 2 T126 2 T72 2
others[7] 86 1 T66 2 T111 2 T72 4
false 7004 1 T1 1 T2 2 T3 1
true 16518 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 100 1 T56 2 T102 2 T134 2
others[1] 64 1 T101 2 T102 2 T72 4
others[2] 106 1 T13 2 T97 2 T56 2
others[3] 90 1 T98 2 T99 2 T381 2
others[4] 90 1 T16 6 T290 2 T335 2
others[5] 98 1 T16 6 T101 2 T102 4
others[6] 78 1 T98 2 T16 2 T72 2
others[7] 84 1 T98 2 T16 2 T111 2
false 6441 1 T1 2 T2 1 T3 1
true 16501 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 72 1 T16 2 T101 2 T72 4
others[1] 100 1 T96 2 T16 2 T101 2
others[2] 74 1 T98 2 T16 2 T102 2
others[3] 82 1 T72 2 T51 2 T216 2
others[4] 96 1 T64 2 T16 2 T101 2
others[5] 80 1 T5 2 T101 2 T72 2
others[6] 92 1 T4 2 T16 2 T102 2
others[7] 98 1 T97 2 T56 2 T111 6
false 6441 1 T1 2 T2 1 T3 1
true 16501 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 78 1 T13 2 T106 2 T16 2
others[1] 70 1 T72 2 T175 2 T374 2
others[2] 62 1 T4 2 T175 2 T386 2
others[3] 52 1 T16 2 T101 2 T102 2
others[4] 56 1 T16 2 T113 2 T131 2
others[5] 36 1 T66 2 T126 2 T387 2
others[6] 86 1 T98 2 T16 4 T101 2
others[7] 94 1 T102 2 T72 2 T175 2
false 6881 1 T1 1 T2 1 T3 1
true 17858 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 66 1 T13 2 T16 2 T91 2
others[1] 66 1 T13 2 T64 2 T378 2
others[2] 74 1 T18 2 T98 2 T64 2
others[3] 60 1 T96 2 T16 2 T72 2
others[4] 86 1 T13 2 T175 2 T372 4
others[5] 66 1 T96 2 T98 2 T126 2
others[6] 64 1 T101 2 T372 2 T388 2
others[7] 80 1 T16 2 T111 2 T68 2
false 6881 1 T1 1 T2 1 T3 1
true 17858 1 T1 4 T2 4 T3 4


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 31 1 T219 1 T343 1 T139 1
others[1] 23 1 T14 1 T15 1 T220 1
others[2] 26 1 T95 2 T139 1 T332 1
others[3] 26 1 T8 1 T20 1 T260 1
others[4] 27 1 T15 1 T29 1 T20 1
others[5] 38 1 T175 2 T343 1 T325 1
others[6] 25 1 T8 1 T14 1 T29 1
others[7] 30 1 T4 2 T8 2 T14 1
false 11594 1 T1 3 T2 3 T3 3
true 18969 1 T1 4 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 118 1 T96 2 T101 2 T68 2
others[1] 110 1 T4 2 T5 2 T13 2
others[2] 98 1 T18 2 T64 2 T16 2
others[3] 78 1 T5 2 T101 2 T102 2
others[4] 82 1 T13 2 T56 2 T109 2
others[5] 82 1 T18 6 T64 2 T16 2
others[6] 106 1 T4 2 T111 2 T72 2
others[7] 114 1 T18 2 T106 2 T72 10
false 7775 1 T1 3 T2 3 T3 3
true 16717 1 T1 4 T2 5 T3 5


Summary for Variable cp_value

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 10 0 10 100.00


User Defined Bins for cp_value

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
others[0] 21 1 T15 1 T29 1 T92 2
others[1] 21 1 T4 2 T8 1 T15 1
others[2] 21 1 T14 2 T15 1 T95 1
others[3] 34 1 T20 2 T260 1 T220 1
others[4] 29 1 T8 1 T14 3 T29 2
others[5] 31 1 T29 2 T20 1 T219 1
others[6] 26 1 T14 1 T37 1 T20 1
others[7] 27 1 T14 1 T15 1 T20 1
false 14218 1 T1 4 T2 4 T3 4
true 2186 1 T4 7 T5 10 T13 9

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%