Summary for Variable dai_access_cmd
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for dai_access_cmd
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
dai_digest |
2079 |
1 |
|
|
T1 |
1 |
|
T9 |
1 |
|
T4 |
1 |
dai_wr |
3962 |
1 |
|
|
T1 |
2 |
|
T2 |
2 |
|
T9 |
3 |
dai_rd |
6750 |
1 |
|
|
T1 |
1 |
|
T2 |
2 |
|
T9 |
3 |
Summary for Variable lc_creator_seed_sw_rw_en
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for lc_creator_seed_sw_rw_en
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
5552 |
1 |
|
|
T1 |
3 |
|
T5 |
1 |
|
T18 |
3 |
auto[1] |
7239 |
1 |
|
|
T1 |
1 |
|
T2 |
4 |
|
T9 |
7 |
Summary for Cross dai_access_secret2
Samples crossed: lc_creator_seed_sw_rw_en dai_access_cmd
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
6 |
0 |
6 |
100.00 |
|
Automatically Generated Cross Bins for dai_access_secret2
Bins
lc_creator_seed_sw_rw_en | dai_access_cmd | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
dai_digest |
1156 |
1 |
|
|
T1 |
1 |
|
T5 |
1 |
|
T7 |
5 |
auto[0] |
dai_wr |
1314 |
1 |
|
|
T1 |
1 |
|
T18 |
1 |
|
T19 |
1 |
auto[0] |
dai_rd |
3082 |
1 |
|
|
T1 |
1 |
|
T18 |
2 |
|
T19 |
1 |
auto[1] |
dai_digest |
923 |
1 |
|
|
T9 |
1 |
|
T4 |
1 |
|
T12 |
1 |
auto[1] |
dai_wr |
2648 |
1 |
|
|
T1 |
1 |
|
T2 |
2 |
|
T9 |
3 |
auto[1] |
dai_rd |
3668 |
1 |
|
|
T2 |
2 |
|
T9 |
3 |
|
T4 |
2 |