Unified Coverage Report :: Group Instance : mubi8_cov_of_mubi8_cov_of_tb.dut.rot_creator_auth_codesign_read_lock_mubi_cov_if

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	9	1	10.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
true	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

12575

1

T1

8

T2

8

T3

3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	9	1	10.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
true	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

12575

1

T1

8

T2

8

T3

3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	8	2	20.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

9091

1

T1

7

T2

5

T3

1

true

14849

1

T1

8

T2

8

T3

3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	8	2	20.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

false

9884

1

T1

7

T2

7

T3

1

true

14909

1

T1

8

T2

8

T3

3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	74	1			T28	2		T15	2		T64	6
others[1]	82	1			T15	2		T64	2		T96	2
others[2]	68	1			T4	2		T29	2		T39	2
others[3]	68	1			T95	2		T106	2		T176	4
others[4]	86	1			T64	8		T97	2		T182	2
others[5]	82	1			T64	4		T96	4		T245	2
others[6]	74	1			T64	2		T96	2		T60	2
others[7]	58	1			T64	2		T126	2		T116	2
false	12575	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	96	1			T39	2		T64	4		T96	6
others[1]	96	1			T39	2		T64	6		T105	2
others[2]	62	1			T15	2		T97	2		T239	2
others[3]	76	1			T64	2		T107	4		T176	2
others[4]	78	1			T64	2		T96	2		T106	2
others[5]	78	1			T64	2		T96	2		T107	2
others[6]	70	1			T104	2		T96	4		T97	2
others[7]	86	1			T64	6		T245	2		T176	2
false	12575	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	74	1			T64	8		T96	2		T97	2
others[1]	76	1			T39	2		T64	4		T104	2
others[2]	76	1			T64	4		T176	6		T206	2
others[3]	78	1			T64	4		T106	2		T175	2
others[4]	68	1			T64	4		T96	4		T100	2
others[5]	66	1			T64	2		T96	4		T207	2
others[6]	78	1			T96	2		T175	2		T176	2
others[7]	84	1			T64	4		T96	4		T100	2
false	12575	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	58	1			T15	2		T174	2		T40	2
others[1]	54	1			T39	4		T64	4		T100	2
others[2]	50	1			T206	2		T207	2		T261	2
others[3]	56	1			T64	6		T100	4		T75	2
others[4]	50	1			T15	2		T96	4		T106	2
others[5]	38	1			T96	2		T106	2		T229	2
others[6]	60	1			T15	2		T64	4		T207	4
others[7]	80	1			T28	2		T39	2		T64	2
false	12575	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	80	1			T29	2		T64	4		T96	2
others[1]	62	1			T64	4		T96	4		T116	2
others[2]	72	1			T15	2		T64	4		T95	2
others[3]	78	1			T64	2		T104	2		T96	2
others[4]	72	1			T176	2		T207	4		T40	2
others[5]	86	1			T64	8		T96	4		T100	4
others[6]	58	1			T39	2		T108	2		T174	2
others[7]	82	1			T64	8		T96	2		T108	2
false	12575	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	36	1			T96	2		T206	2		T207	2
others[1]	38	1			T96	2		T176	2		T206	2
others[2]	32	1			T29	2		T116	2		T206	4
others[3]	36	1			T96	2		T176	2		T390	2
others[4]	30	1			T96	2		T116	2		T176	2
others[5]	38	1			T64	2		T104	2		T175	2
others[6]	24	1			T96	2		T91	2		T46	2
others[7]	42	1			T29	2		T64	2		T206	2
false	12575	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	64	1			T64	2		T95	2		T207	2
others[1]	86	1			T64	2		T96	2		T97	2
others[2]	82	1			T28	2		T64	8		T96	2
others[3]	74	1			T64	4		T96	4		T98	2
others[4]	74	1			T39	2		T64	2		T108	2
others[5]	72	1			T29	2		T107	2		T206	2
others[6]	82	1			T29	2		T64	2		T96	4
others[7]	84	1			T28	2		T64	4		T97	4
false	12575	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	88	1			T64	2		T104	2		T96	2
others[1]	68	1			T39	2		T64	2		T96	2
others[2]	64	1			T64	4		T116	2		T229	2
others[3]	76	1			T29	2		T64	4		T96	2
others[4]	84	1			T28	2		T104	2		T96	2
others[5]	90	1			T64	4		T98	2		T107	2
others[6]	70	1			T29	2		T64	2		T107	2
others[7]	102	1			T29	2		T64	6		T104	2
false	12575	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	90	1			T4	2		T29	4		T64	6
others[1]	70	1			T64	2		T116	2		T391	2
others[2]	86	1			T64	4		T96	2		T245	2
others[3]	72	1			T64	2		T116	2		T107	2
others[4]	72	1			T30	2		T176	2		T207	2
others[5]	56	1			T64	8		T96	2		T30	2
others[6]	52	1			T28	2		T108	2		T206	2
others[7]	102	1			T39	2		T15	2		T64	4
false	12575	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	48	1			T97	2		T176	2		T207	2
others[1]	88	1			T4	2		T39	2		T64	2
others[2]	60	1			T29	2		T64	2		T229	2
others[3]	84	1			T29	2		T64	4		T96	2
others[4]	78	1			T64	2		T107	2		T206	2
others[5]	72	1			T175	2		T30	2		T176	4
others[6]	68	1			T64	2		T392	2		T393	2
others[7]	100	1			T29	4		T64	2		T106	2
false	12575	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	1	9	90.00

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
true	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	50	1			T96	4		T97	2		T394	2
others[1]	76	1			T29	2		T96	2		T75	2
others[2]	82	1			T64	4		T96	2		T107	2
others[3]	82	1			T64	6		T30	2		T176	4
others[4]	90	1			T39	2		T64	4		T96	2
others[5]	82	1			T64	8		T96	2		T108	4
others[6]	84	1			T96	2		T97	2		T182	2
others[7]	76	1			T39	2		T64	4		T104	2
false	12575	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	20	1			T14	1		T259	1		T395	1
others[1]	25	1			T13	1		T65	1		T259	1
others[2]	29	1			T6	1		T14	2		T207	2
others[3]	17	1			T8	2		T27	1		T16	1
others[4]	19	1			T6	2		T17	1		T396	2
others[5]	25	1			T27	1		T16	1		T98	2
others[6]	26	1			T6	1		T13	1		T17	1
others[7]	36	1			T6	1		T13	2		T27	2
false	12575	1			T1	8		T2	8		T3	3
true	1849	1			T5	1		T8	1		T4	2

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	33	1			T6	1		T13	1		T27	2
others[1]	27	1			T14	1		T16	1		T17	1
others[2]	18	1			T13	1		T14	1		T17	1
others[3]	21	1			T13	1		T14	1		T98	2
others[4]	21	1			T6	2		T17	1		T207	2
others[5]	14	1			T6	1		T96	2		T17	1
others[6]	33	1			T8	2		T13	1		T27	1
others[7]	30	1			T6	1		T27	1		T16	1
false	10293	1			T1	7		T2	8		T3	2
true	16742	1			T1	8		T2	8		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	70	1			T15	2		T97	2		T174	2
others[1]	62	1			T28	2		T15	2		T97	2
others[2]	80	1			T4	2		T64	2		T96	6
others[3]	74	1			T64	6		T96	2		T176	4
others[4]	84	1			T64	2		T96	2		T176	2
others[5]	72	1			T64	4		T96	2		T106	2
others[6]	52	1			T64	4		T95	2		T116	2
others[7]	98	1			T29	2		T39	2		T64	6
false	7081	1			T1	7		T2	8		T3	2
true	14959	1			T1	8		T2	8		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	80	1			T64	2		T206	2		T397	2
others[1]	88	1			T96	2		T97	2		T107	2
others[2]	60	1			T15	2		T64	8		T96	2
others[3]	80	1			T64	2		T104	2		T96	2
others[4]	86	1			T39	2		T64	2		T96	2
others[5]	64	1			T39	2		T64	2		T96	2
others[6]	88	1			T64	4		T96	2		T175	2
others[7]	96	1			T64	2		T96	2		T106	2
false	6179	1			T1	3		T2	4		T3	1
true	14724	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	82	1			T64	4		T96	2		T97	2
others[1]	62	1			T64	4		T96	4		T100	2
others[2]	72	1			T64	2		T96	2		T398	2
others[3]	86	1			T39	2		T64	4		T96	8
others[4]	80	1			T64	2		T96	4		T100	2
others[5]	58	1			T64	6		T106	2		T107	2
others[6]	70	1			T64	4		T96	2		T176	4
others[7]	90	1			T64	4		T104	2		T106	2
false	6650	1			T1	5		T2	6		T3	1
true	14758	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	24	1			T14	3		T64	2		T27	1
others[1]	26	1			T27	2		T17	2		T18	1
others[2]	32	1			T27	1		T65	1		T259	1
others[3]	16	1			T13	1		T27	1		T16	1
others[4]	27	1			T28	2		T6	1		T13	1
others[5]	20	1			T27	1		T395	2		T18	1
others[6]	18	1			T207	4		T399	1		T343	1
others[7]	23	1			T6	1		T13	1		T27	1
false	10236	1			T1	7		T2	8		T3	2
true	16750	1			T1	8		T2	8		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	70	1			T39	2		T15	2		T100	2
others[1]	68	1			T39	2		T15	2		T64	4
others[2]	40	1			T64	2		T219	2		T121	2
others[3]	80	1			T28	2		T39	2		T64	4
others[4]	46	1			T15	2		T64	2		T100	2
others[5]	32	1			T64	2		T106	2		T108	2
others[6]	44	1			T96	2		T100	2		T176	2
others[7]	66	1			T64	2		T106	2		T206	2
false	8181	1			T1	7		T2	8		T3	2
true	14944	1			T1	8		T2	8		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	18	1			T6	1		T13	1		T65	1
others[1]	21	1			T13	1		T16	1		T395	1
others[2]	28	1			T17	1		T260	1		T400	2
others[3]	17	1			T14	1		T65	2		T207	2
others[4]	18	1			T17	1		T341	1		T342	1
others[5]	19	1			T6	1		T27	2		T65	1
others[6]	19	1			T6	2		T259	1		T341	1
others[7]	36	1			T27	1		T16	1		T370	1
false	10191	1			T1	7		T2	8		T3	2
true	16720	1			T1	8		T2	8		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	58	1			T15	2		T95	2		T207	2
others[1]	88	1			T64	6		T96	6		T116	2
others[2]	72	1			T29	2		T108	2		T174	2
others[3]	84	1			T64	4		T105	2		T100	4
others[4]	86	1			T64	4		T96	4		T97	2
others[5]	62	1			T64	4		T229	2		T176	2
others[6]	62	1			T39	2		T64	2		T96	2
others[7]	78	1			T64	10		T104	2		T96	2
false	7023	1			T1	7		T2	8		T3	2
true	14876	1			T1	8		T2	8		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	32	1			T6	1		T260	1		T395	3
others[1]	20	1			T14	1		T17	1		T207	2
others[2]	28	1			T259	1		T260	1		T18	1
others[3]	22	1			T65	1		T233	1		T359	1
others[4]	26	1			T27	1		T96	2		T207	2
others[5]	24	1			T13	1		T27	2		T17	2
others[6]	18	1			T6	2		T13	1		T14	2
others[7]	28	1			T14	1		T16	1		T65	2
false	10155	1			T1	7		T2	8		T3	2
true	16656	1			T1	8		T2	8		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	30	1			T207	2		T401	2		T210	2
others[1]	24	1			T96	2		T176	2		T401	2
others[2]	46	1			T96	4		T207	2		T402	2
others[3]	36	1			T29	2		T64	2		T96	2
others[4]	48	1			T29	2		T116	2		T206	6
others[5]	28	1			T116	2		T175	2		T176	2
others[6]	36	1			T206	2		T146	2		T90	2
others[7]	28	1			T64	2		T104	2		T96	2
false	8768	1			T1	7		T2	8		T3	2
true	14928	1			T1	8		T2	8		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	50	1			T96	4		T229	2		T207	4
others[1]	78	1			T29	2		T96	4		T97	2
others[2]	70	1			T64	6		T100	2		T106	2
others[3]	84	1			T64	2		T97	2		T107	2
others[4]	74	1			T39	2		T64	4		T95	2
others[5]	64	1			T28	2		T64	2		T96	2
others[6]	96	1			T64	4		T96	2		T97	4
others[7]	102	1			T28	2		T29	2		T64	6
false	6372	1			T1	3		T2	3		T3	1
true	14728	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	70	1			T29	2		T64	6		T104	2
others[1]	66	1			T96	2		T107	2		T176	2
others[2]	98	1			T28	2		T64	2		T96	2
others[3]	98	1			T64	6		T116	2		T106	2
others[4]	74	1			T64	2		T96	2		T97	2
others[5]	90	1			T29	2		T39	2		T104	4
others[6]	76	1			T29	2		T64	6		T206	4
others[7]	70	1			T64	2		T108	2		T175	2
false	6372	1			T1	3		T2	3		T3	1
true	14728	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	64	1			T64	2		T107	2		T397	2
others[1]	90	1			T28	2		T64	2		T116	4
others[2]	58	1			T4	2		T39	2		T97	2
others[3]	72	1			T15	2		T64	4		T391	2
others[4]	100	1			T64	6		T107	2		T108	2
others[5]	60	1			T64	8		T116	2		T40	2
others[6]	76	1			T29	2		T64	2		T96	2
others[7]	80	1			T29	2		T64	2		T126	2
false	5810	1			T1	6		T2	4		T3	1
true	14722	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	72	1			T108	2		T229	2		T206	2
others[1]	70	1			T97	2		T107	2		T206	2
others[2]	72	1			T106	2		T175	2		T207	2
others[3]	66	1			T29	2		T64	2		T392	2
others[4]	66	1			T29	2		T64	2		T107	2
others[5]	78	1			T4	2		T29	2		T64	2
others[6]	100	1			T64	4		T176	2		T207	2
others[7]	74	1			T29	2		T39	2		T64	4
false	5810	1			T1	6		T2	4		T3	1
true	14722	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	54	1			T15	2		T106	2		T108	2
others[1]	52	1			T28	2		T15	2		T96	2
others[2]	44	1			T64	4		T207	2		T403	2
others[3]	50	1			T182	2		T175	2		T206	4
others[4]	58	1			T96	4		T100	2		T229	2
others[5]	36	1			T39	2		T64	4		T97	2
others[6]	62	1			T96	2		T106	2		T206	2
others[7]	52	1			T64	6		T96	2		T176	2
false	6285	1			T1	4		T2	3		T3	1
true	15961	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	60	1			T106	2		T245	2		T60	2
others[1]	54	1			T64	2		T96	2		T100	2
others[2]	56	1			T64	2		T176	2		T207	4
others[3]	36	1			T206	2		T393	2		T146	2
others[4]	66	1			T28	2		T229	2		T206	2
others[5]	46	1			T64	4		T108	2		T229	2
others[6]	58	1			T39	2		T64	2		T96	2
others[7]	58	1			T64	6		T96	4		T106	2
false	6285	1			T1	4		T2	3		T3	1
true	15961	1			T1	8		T2	8		T3	3

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	24	1			T17	1		T259	1		T395	1
others[1]	25	1			T14	1		T27	2		T16	1
others[2]	24	1			T27	1		T104	2		T259	1
others[3]	26	1			T96	2		T202	2		T260	1
others[4]	25	1			T39	2		T6	2		T13	1
others[5]	17	1			T6	1		T370	1		T274	1
others[6]	22	1			T64	2		T176	2		T267	1
others[7]	17	1			T27	1		T16	2		T240	1
false	10362	1			T1	7		T2	8		T3	2
true	16827	1			T1	8		T2	8		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	68	1			T64	2		T97	2		T390	2
others[1]	74	1			T64	4		T96	4		T97	2
others[2]	92	1			T64	2		T96	4		T107	2
others[3]	68	1			T64	6		T96	4		T107	2
others[4]	64	1			T64	4		T229	2		T206	2
others[5]	84	1			T64	2		T104	2		T108	2
others[6]	62	1			T39	4		T64	2		T96	4
others[7]	110	1			T29	2		T64	4		T108	4
false	7012	1			T1	7		T2	8		T3	2
true	14899	1			T1	8		T2	8		T3	4

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	24	1			T27	4		T267	1		T399	1
others[1]	19	1			T13	1		T64	2		T27	1
others[2]	26	1			T13	1		T16	2		T106	2
others[3]	28	1			T6	1		T14	1		T96	2
others[4]	18	1			T13	1		T14	1		T17	1
others[5]	16	1			T6	1		T65	1		T207	2
others[6]	32	1			T28	2		T14	1		T16	1
others[7]	23	1			T27	2		T17	1		T207	2
false	12575	1			T1	8		T2	8		T3	3
true	1897	1			T5	1		T4	2		T10	1

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	10	0	10	100.00

User Defined Bins for cp_value

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	32	1			T6	1		T27	1		T17	1
others[1]	29	1			T6	2		T16	1		T65	1
others[2]	18	1			T342	2		T46	2		T344	1
others[3]	16	1			T27	1		T259	1		T341	1
others[4]	23	1			T65	1		T341	1		T370	1
others[5]	14	1			T13	1		T65	1		T260	1
others[6]	19	1			T17	1		T400	2		T18	1
others[7]	25	1			T6	1		T13	1		T14	1
false	12575	1			T1	8		T2	8		T3	3
true	1921	1			T5	1		T8	1		T4	2