SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
100.00 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 6 | 0 | 6 | 100.00 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
read_csr_after_alert_issued | 6 | 0 | 6 | 100.00 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 6 | 0 | 6 | 100.00 |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
error_code | 1469148 | 1 | T4 | 702 | T5 | 663 | T6 | 689 | ||||
status | 409130 | 1 | T4 | 67 | T5 | 55 | T6 | 851 | ||||
direct_access_rdata | 55349 | 1 | T4 | 33 | T5 | 27 | T6 | 19 | ||||
secret_digests | 14064 | 1 | T4 | 30 | T6 | 66 | T11 | 12 | ||||
hw_digests | 9376 | 1 | T4 | 20 | T6 | 44 | T11 | 8 | ||||
unbuffered_digests | 23440 | 1 | T4 | 50 | T6 | 110 | T11 | 20 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |