SCORE | WEIGHT | GOAL | AT LEAST | AUTO BIN MAX | PRINT MISSING |
84.44 | 1 | 100 | 1 | 64 | 64 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Variables | 18 | 1 | 17 | 94.44 |
Crosses | 72 | 13 | 59 | 81.94 |
VARIABLE | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | AUTO BIN MAX | COMMENT |
err_code_vals | 7 | 1 | 6 | 85.71 | 100 | 1 | 1 | 0 | |
partition | 11 | 0 | 11 | 100.00 | 100 | 1 | 1 | 0 |
CROSS | EXPECTED | UNCOVERED | COVERED | PERCENT | GOAL | WEIGHT | AT LEAST | PRINT MISSING | COMMENT |
dai_err_code_for_all_partitions | 72 | 13 | 59 | 81.94 | 100 | 1 | 1 | 0 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 7 | 1 | 6 | 85.71 |
NAME | COUNT | AT LEAST | NUMBER | STATUS |
macro_err | 0 | 1 | 1 |
NAME | COUNT | STATUS |
illegal_err | 0 | Illegal |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | 52698 | 1 | T2 | 83 | T3 | 5 | T6 | 107 | ||||
access_err | 66412 | 1 | T3 | 2 | T4 | 25 | T6 | 9 | ||||
write_blank_err | 456 | 1 | T1 | 1 | T4 | 1 | T6 | 1 | ||||
ecc_uncorr_err | 74609 | 1 | T1 | 269 | T4 | 545 | T6 | 438 | ||||
ecc_corr_err | 1256 | 1 | T27 | 26 | T7 | 1 | T88 | 1 | ||||
no_err | 96493 | 1 | T1 | 9 | T3 | 5 | T4 | 163 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins | 11 | 0 | 11 | 100.00 |
NAME | COUNT | STATUS |
illegal_idx | 0 | Excluded |
NAME | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
life_cycle | 743 | 1 | T4 | 6 | T6 | 7 | T7 | 14 | ||||
secret2 | 25774 | 1 | T4 | 29 | T6 | 9 | T35 | 2 | ||||
secret1 | 33263 | 1 | T1 | 275 | T4 | 17 | T6 | 449 | ||||
secret0 | 35292 | 1 | T4 | 7 | T6 | 13 | T35 | 8 | ||||
hw_cfg1 | 41359 | 1 | T3 | 1 | T4 | 14 | T6 | 7 | ||||
hw_cfg0 | 30080 | 1 | T4 | 10 | T6 | 118 | T35 | 2 | ||||
rot_creator_auth_state | 23845 | 1 | T1 | 1 | T3 | 2 | T4 | 558 | ||||
rot_creator_auth_codesign | 24436 | 1 | T4 | 33 | T6 | 11 | T35 | 6 | ||||
owner_sw_cfg | 21847 | 1 | T1 | 3 | T3 | 1 | T4 | 31 | ||||
creator_sw_cfg | 23142 | 1 | T4 | 8 | T6 | 14 | T35 | 6 | ||||
vendor_test | 32143 | 1 | T2 | 83 | T3 | 8 | T4 | 21 |
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
TOTAL | 72 | 13 | 59 | 81.94 | 13 |
Automatically Generated Cross Bins | 72 | 13 | 59 | 81.94 | 13 |
User Defined Cross Bins | 0 | 0 | 0 |
err_code_vals | partition | COUNT | AT LEAST | NUMBER | STATUS |
[fsm_err] | [life_cycle] | 0 | 1 | 1 | |
[ecc_corr_err] | [vendor_test] | 0 | 1 | 1 | |
[macro_err] | [secret2 , secret1 , secret0 , hw_cfg1 , hw_cfg0 , rot_creator_auth_state , rot_creator_auth_codesign , owner_sw_cfg , creator_sw_cfg , vendor_test] | -- | -- | 10 | |
[no_err] | [life_cycle] | 0 | 1 | 1 |
err_code_vals | partition | COUNT | AT LEAST | STATUS | TEST | COUNT | TEST | COUNT | TEST | COUNT | |||
fsm_err | secret2 | 4637 | 1 | T100 | 164 | T145 | 117 | T315 | 217 | ||||
fsm_err | secret1 | 5868 | 1 | T16 | 363 | T316 | 133 | T138 | 563 | ||||
fsm_err | secret0 | 4790 | 1 | T186 | 255 | T224 | 581 | T226 | 236 | ||||
fsm_err | hw_cfg1 | 2284 | 1 | T146 | 39 | T228 | 41 | T317 | 67 | ||||
fsm_err | hw_cfg0 | 5811 | 1 | T6 | 107 | T73 | 373 | T132 | 35 | ||||
fsm_err | rot_creator_auth_state | 3153 | 1 | T152 | 41 | T146 | 94 | T220 | 289 | ||||
fsm_err | rot_creator_auth_codesign | 4532 | 1 | T14 | 186 | T251 | 377 | T18 | 92 | ||||
fsm_err | owner_sw_cfg | 3796 | 1 | T187 | 46 | T195 | 43 | T318 | 129 | ||||
fsm_err | creator_sw_cfg | 4596 | 1 | T100 | 31 | T146 | 48 | T218 | 297 | ||||
fsm_err | vendor_test | 13231 | 1 | T2 | 83 | T3 | 5 | T27 | 54 | ||||
access_err | life_cycle | 743 | 1 | T4 | 6 | T6 | 7 | T7 | 14 | ||||
access_err | secret2 | 11462 | 1 | T4 | 12 | T35 | 2 | T27 | 11 | ||||
access_err | secret1 | 6567 | 1 | T27 | 3 | T7 | 57 | T90 | 7 | ||||
access_err | secret0 | 5118 | 1 | T27 | 8 | T13 | 7 | T7 | 53 | ||||
access_err | hw_cfg1 | 1366 | 1 | T27 | 2 | T13 | 1 | T7 | 14 | ||||
access_err | hw_cfg0 | 2345 | 1 | T35 | 1 | T27 | 6 | T13 | 1 | ||||
access_err | rot_creator_auth_state | 6510 | 1 | T27 | 15 | T13 | 14 | T7 | 59 | ||||
access_err | rot_creator_auth_codesign | 8562 | 1 | T4 | 1 | T27 | 11 | T13 | 9 | ||||
access_err | owner_sw_cfg | 7271 | 1 | T6 | 1 | T35 | 1 | T27 | 5 | ||||
access_err | creator_sw_cfg | 8494 | 1 | T4 | 2 | T35 | 4 | T27 | 12 | ||||
access_err | vendor_test | 7974 | 1 | T3 | 2 | T4 | 4 | T6 | 1 | ||||
write_blank_err | secret2 | 10 | 1 | T18 | 1 | T253 | 1 | T319 | 1 | ||||
write_blank_err | secret1 | 28 | 1 | T1 | 1 | T6 | 1 | T7 | 2 | ||||
write_blank_err | secret0 | 40 | 1 | T7 | 1 | T14 | 1 | T73 | 1 | ||||
write_blank_err | hw_cfg1 | 81 | 1 | T7 | 2 | T12 | 4 | T150 | 1 | ||||
write_blank_err | hw_cfg0 | 25 | 1 | T100 | 1 | T117 | 1 | T16 | 1 | ||||
write_blank_err | rot_creator_auth_state | 138 | 1 | T4 | 1 | T7 | 9 | T14 | 1 | ||||
write_blank_err | rot_creator_auth_codesign | 71 | 1 | T73 | 3 | T100 | 1 | T320 | 1 | ||||
write_blank_err | owner_sw_cfg | 29 | 1 | T14 | 1 | T321 | 2 | T322 | 3 | ||||
write_blank_err | creator_sw_cfg | 13 | 1 | T73 | 1 | T320 | 3 | T143 | 1 | ||||
write_blank_err | vendor_test | 21 | 1 | T7 | 3 | T100 | 5 | T323 | 1 | ||||
ecc_uncorr_err | secret2 | 3730 | 1 | T157 | 36 | T183 | 71 | T18 | 562 | ||||
ecc_uncorr_err | secret1 | 11415 | 1 | T1 | 269 | T6 | 438 | T7 | 858 | ||||
ecc_uncorr_err | secret0 | 16175 | 1 | T7 | 396 | T14 | 38 | T73 | 521 | ||||
ecc_uncorr_err | hw_cfg1 | 26210 | 1 | T7 | 260 | T12 | 964 | T150 | 297 | ||||
ecc_uncorr_err | hw_cfg0 | 8775 | 1 | T117 | 478 | T16 | 455 | T152 | 46 | ||||
ecc_uncorr_err | rot_creator_auth_state | 4931 | 1 | T4 | 545 | T88 | 141 | T100 | 452 | ||||
ecc_uncorr_err | rot_creator_auth_codesign | 1649 | 1 | T88 | 67 | T73 | 469 | T195 | 42 | ||||
ecc_uncorr_err | owner_sw_cfg | 667 | 1 | T88 | 76 | T152 | 34 | T146 | 46 | ||||
ecc_uncorr_err | creator_sw_cfg | 1057 | 1 | T146 | 48 | T247 | 80 | T324 | 19 | ||||
ecc_corr_err | secret2 | 61 | 1 | T27 | 4 | T62 | 1 | T29 | 2 | ||||
ecc_corr_err | secret1 | 119 | 1 | T27 | 2 | T62 | 6 | T152 | 1 | ||||
ecc_corr_err | secret0 | 172 | 1 | T152 | 2 | T146 | 1 | T157 | 1 | ||||
ecc_corr_err | hw_cfg1 | 264 | 1 | T27 | 5 | T7 | 1 | T12 | 1 | ||||
ecc_corr_err | hw_cfg0 | 203 | 1 | T27 | 1 | T62 | 3 | T100 | 1 | ||||
ecc_corr_err | rot_creator_auth_state | 125 | 1 | T27 | 3 | T100 | 1 | T152 | 1 | ||||
ecc_corr_err | rot_creator_auth_codesign | 113 | 1 | T27 | 6 | T88 | 1 | T152 | 1 | ||||
ecc_corr_err | owner_sw_cfg | 100 | 1 | T27 | 3 | T62 | 4 | T152 | 2 | ||||
ecc_corr_err | creator_sw_cfg | 99 | 1 | T27 | 2 | T152 | 1 | T325 | 1 | ||||
no_err | secret2 | 5874 | 1 | T4 | 17 | T6 | 9 | T27 | 3 | ||||
no_err | secret1 | 9266 | 1 | T1 | 5 | T4 | 17 | T6 | 10 | ||||
no_err | secret0 | 8997 | 1 | T4 | 7 | T6 | 13 | T35 | 8 | ||||
no_err | hw_cfg1 | 11154 | 1 | T3 | 1 | T4 | 14 | T6 | 7 | ||||
no_err | hw_cfg0 | 12921 | 1 | T4 | 10 | T6 | 11 | T35 | 1 | ||||
no_err | rot_creator_auth_state | 8988 | 1 | T1 | 1 | T3 | 2 | T4 | 12 | ||||
no_err | rot_creator_auth_codesign | 9509 | 1 | T4 | 32 | T6 | 11 | T35 | 6 | ||||
no_err | owner_sw_cfg | 9984 | 1 | T1 | 3 | T3 | 1 | T4 | 31 | ||||
no_err | creator_sw_cfg | 8883 | 1 | T4 | 6 | T6 | 14 | T35 | 2 | ||||
no_err | vendor_test | 10917 | 1 | T3 | 1 | T4 | 17 | T6 | 4 |
NAME | COUNT | STATUS |
vendor_test_ecc_uncorrectable_err | 0 | Illegal |
life_cycle_ignore | 0 | Excluded |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |